Chapter 4

Metal Oxide Semiconductor

Field Effect Transistors (FET)
Construction, Device and Operation
By
Wan Rosmaria Wan Ahmad
for ELE424/ELE422
March – Aug 2023
Content in MOSFET Construction, Device &
Operation
1. Introduction
2. MOSFET Construction
3. MOSFET Operation
4. MOSFET Non-Ideal Behaviour and Other Types
 In 1948
Introduction:
MOSFET: Its Impact
• The metal-oxide-semiconductor field-effect transistor
(MOSFET) is a major type of transistor.
• The MOSFET led to the electronics revolution of the 1970s
and 1980s, in which the microprocessor made possible
powerful and portable computers and all sorts of sophisticated
electronic systems. http://globalfirstsandfacts.com/2018/02
/14/bell-telephone-laboratories-invents-
• The MOSFET can be made very small, so high density very the-transistor-and-changed-the-world/
large scale integration (VLSI) circuits and high-density
memories are possible. Digital circuits can be designed using
only MOSFETs, with essentially no resistors required.
MOSFETs can also be used in analog circuits.
Introduction:
Diode, BJT, MOSFET
• Diodes have only 2 terminals with one PN junction. It is useful
in rectifying circuits, clipper and clamper circuits and voltage
regulators.
• Then we move on three or more terminals transistors.
• Why an extra terminal? A general application concept of having
3 terminal devices is that a small voltage and/or current
applied at one terminal controls a larger electric flow through
its other two terminals.
• ELE424 will cover 2 types of transistors:
• Bipolar Junction Transistors (BJT)
• Metal-Oxide-Semiconductor Field-Effect Transistor
(MOSFET)
• Diode allows current flow in one direction based on the biasing
applied across its 2 terminals. But transistors offer a control
terminal that decides the flow between the other 2 terminals.
Introduction
Syllabus Contents
• Two complementary devices, the n-channel MOSFET (NMOS) and the p- channel
MOSFET (PMOS), exist.
• In this session, we will study and understand the structure, operation, and characteristics of
the various types of MOSFETs, enough for us to proceed to dc analysis and design
techniques of MOSFET circuits.
• The i–v characteristics of these devices are introduced, and the dc analysis and design
techniques of MOSFET circuits are developed. After that, we will cover small-signal ac
analysis.
• Another type of field-effect transistor is the junction FET (JFET). Two main types of JFET
are pn junction FET (pn JFET) and the metal-semiconductor field-effect transistor
(MESFET). It is not covered in the syllabus of ELE424. Only MOSFET is covered in
ELE424.
 MOSFET Construction
1. Symbol • Two complementary devices, the n-channel
2. Cross-Section MOSFET (NMOS) and the p-channel MOSFET
3. MOS Capacitor
(PMOS), exist.
4. NMOS Enhancement • For each, there is a slightly different symbol and
Device biasing configuration. There is also a slight
5. PMOS Enhancement difference in the current-voltage characteristics.
Device Slightly but significant to operation because of the
6. Other types
doping type.
• Device construction is also different in terms of
dopant type.
 MOSFET Construction
Symbol and Terminals
PMOS
NMOS

• 4 terminals: drain, gate, source, bulk. • 4 terminals: drain, gate, source, bulk.
• vGS controls the channel formation • vSG controls the channel formation.
• vDS compared to vGS-VTn determines the region • vSD compared to vSG+VTp determines the
of operation region of operation
• vSB ensures that current does not flow from • vBS ensures that current does not flow from drain
drain or source to body. 7
or source to body.
 MOSFET Construction: Cross-section
NMOS
PMOS

• The gate (G), oxide, and p-type substrate • The gate (G), oxide, and n-type substrate regions
regions are what forms the MOS capacitor. are what forms the MOS capacitor.
• There are two n-regions, called the source • There are two n-regions, called the source terminal
terminal (S) and drain terminal (D). For (S) and drain terminal (D). For PMOS, this is p-
NMOS, this is n- type. type.
• The current in NMOS is the result of the flow • The current in PMOS is the result of the flow of
of electrons as between S and D in the holes between S and D in the inversion layer
inversion layer (channel region). (channel region).
• L is the distance between S and D. W is the • L is the distance between S and D. W is the width
width of G. of G.
PMOS

VG

VS VD

Gate

Drain Drain
P+ P+

N-type substrate
Other MOSFET Construction
CMOS: PMOS and NMOS
Revision: Parallel Plate Capacitance
• A parallel-plate capacitor shows a top
plate at a negative voltage with respect to
the bottom plate. An insulator material
separates the two plates.
• With this bias, a negative charge exists on
the top plate, a positive charge exists on
the bottom plate, and an electric field is
induced between the two plates, as
shown.
• The capacitive action is affected by
C=εA/d. A and d are determined by
the size and distance between plates. ε is
determined by the insulating material
characteristics.
MOSFET Construction
Metal-Oxide-Semiconductor: MOS Capacitor
• The heart of the MOSFET is the ‘metal-oxide
semiconductor capacitor’
• In most cases, the metal is replaced by a high-
conductivity polycrystalline silicon layer deposited
on the silicon oxide. The parameter tox is the
thickness of the oxide and εox is the oxide
permittivity. This controls the capacitive behaviour.
• Bias between G and S will determine the carriers
presence in the channel region under the G,
between the S and D.
MOSFET Construction:
MOS Capacitor in NMOS VTN = 0.7V (for Si)

E field

Inversion layer of electrons

Accumulation of holes Depletion of holes • With vGS causing E field in the
• With VGS shown, E field • With VGS causing E field in direction shown but is equal or more
causes accumulation of the direction shown but is than the threshold voltage, it induces
holes. less than the threshold an electron inversion layer.
voltage, it causes a • The channel region is now “inverted”
VGS < 0 (Negative) depletion of holes even to have an abundance of electrons
though the substrate is p- even though it is p-type substrate.
type.
0 < VGS < VTN (Positive)
VGS > VTN (Positive)
MOSFET Construction
MOS Capacitor in PMOS VTP = 0.7V (for Si)

Inversion layer of holes

Depletion of electrons • With VSG causing E field in the
Accumulation of
• With VSG causing E field in direction shown but is equal or more
electrons
the direction shown but is than the threshold voltage, it induces
• With VSG shown, E field
less than the threshold an holes inversion layer.
causes accumulation of
electrons in n type voltage, it causes a • The channel region is now “inverted”
substrate. depletion of electrons to have an abundance of holes even
even though the substrate is though it is n-type substrate.
n-type.
VSG > VTP (Positive)
VSG > 0 (Negative) 0 > VSG > VTP (Negative)
MOSFET Construction
Channel Region between S and D
• This phenomenon used to modulate the conductance of a
semiconductor with an electric field perpendicular to the surface is
called the field effect.
• The formation of the inversion
layer allows current to flow
between source and drain.
• VGS forms the inversion layer. vDS allows the carrier in the channel
region to flow between S and D. vDS, wrt to vGS, affects the current
flow and region of operation of the carriers that are in the channel
region. ID is determined by vGS and vDS.
MOSFET Construction
Applied bias and currents in NMOS
• The threshold voltage of NMOS, denoted as VTN , is the
gate voltage with source voltage required to “turn on” the
transistor.
• If vGS is less than VTN, ID is essentially zero. If vGS is
greater than VTN, ID flows if vDS is applied.
• Electrons flow from the source to the drain with an applied
vDS. (The conventional current enters the drain and leaves
the source.)
• Since G is separated from the channel by an oxide or
insulator, there is no gate current. Similarly, since the channel
and substrate are separated by a space-charge region,
there is essentially no current through the substrate.
MOSFET Construction
Applied bias and currents in PMOS
• The threshold voltage of PMOS, denoted as VTP , is the
gate voltage wrt source voltage required to “turn on” the
transistor.
• If vSG is less than |VTP|, ID is essentially zero. If vSG is
greater than |VTP|, ID flows if vSD is applied.
• Holes flow from the source to the drain with an applied
vSD. (The conventional current enters the source and
leaves the drain.)
• Since G is separated from the channel by an oxide or
insulator, there is no gate current. Similarly, since the
channel and substrate are separated by a space-charge
region, there is essentially no current through the
substrate.
MOSFET Operation
1. Basic Concept
2. NMOS Operation
3. NMOS IV Characteristics
4. PMOS Operation
5. PMOS IV Characteristics
MOSFET Operation
Basic Concept
• The basic transistor principle is that the
voltage between two terminals controls the
current through the third terminal.
• Will it conduct?
• In what region of operation will it conduct?
MOSFET Operation
NMOS Transfer Characteristics, iD vs vGS
• If a fixed value of vDS is applied, and
vGS is swept from a value of much
less then VTN to a value greater than
VTN, MOSFET transfer
characteristics iD vs vGS is as shown.
MOSFET Operation
NMOS Output Characteristics, iD vs vDS
• Once vGS>vTN, NMOS can conduct current if
vDS is applied. Depending on the value of
vDS, NMOS will operate either in triode
region (non-saturation) or saturation region.
• The value of vDS that separates the triode
from the saturation region is vDS(sat) where:

vDS(sat) = vGS – VTN

• The expression for iD depends on where the

region of operation lies.
NMOS: Ideal Current–Voltage Characteristics
• If it is in triode region: (vDS < vGS – VTN)

• If it is in saturation region:
• (vDS  vGS – VTN)

• The term Kn is transconductance parameter:

µnCox (=kn’) is process conduction parameter which

comes from the fabrication process.

Cox = ox/tox

• W and L comes from the layout (integrated circuit design

parameters) that forms the structure


Example
• Consider NMOS with the following parameters: VTN = 0.4 V, and Kn=1.4 mA/V2.
Determine the current when the transistor is biased in the saturation region for (a)
vGS = 0.8 V and (b) vGS = 1.6 V.
PMOS: Ideal Current–Voltage Characteristics

• If it is in triode region: (vSD < vSG + VTP)

• If it is in saturation region:
(vSD  vSG + VTP)

• The term Kp is transconductance parameter:

• µpCox (=kp’) is process conduction parameter

which comes from the fabrication process:
• W and L comes from the layout (integrated
circuit design parameters) that forms the
structure
Example
Example
Non-Ideal Current-Voltage Characteristics
&
Other MOSFET Types
 Non-Ideal Current-Voltage Characteristics

The textbook covers five nonideal effects in the current–voltage characteristics of

MOS transistors:
• The finite output resistance in the saturation region,
• The body effect,
• Sub-threshold conduction,
• Breakdown effects,
• Temperature effects.
At this stage, we will only discuss on finite output resistance in the saturation region.
Finite output resistance on saturation region
• In the ideal case, when a MOSFET is biased in
the saturation region iD is independent of VDS.
Meaning, iD is horizontal in the saturation
region.
• However, in actual MOSFET iD versus VDS
characteristics, a nonzero slope does exist
beyond the saturation point. The reason for
this is channel length modulation.
• Introducing  as channel length modulation
parameter, saturation region iD becomes:
Other MOSFET Construction
Other MOSFET Type: Depletion Mode
• The term enhancement mode means that a voltage must be
applied to the gate to create an inversion layer.
• There is another type of MOSFET that is called depletion mode
MOSFET. It is ready to conduct with the carriers in the
channel region even without bias. It is “always ON”. Negative
gate-source voltage needs to be applied to remove the
inversion layer.
• A negative gate voltage must be applied to the n-channel
depletion- mode MOSFET to turn the device off.
• So there is NMOS enhancement, PMOS enhancement, n-
channel depletion, p-channel depletion.
Next: MOSFET DC Analysis