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RISCV

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Abhinandan Abhi
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47 views

RISCV

Uploaded by

Abhinandan Abhi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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-CHEPURI SAI SUMANTH(BPD14)

Risc-V Main Project


Generatiing the Netlist using Design Compiler:

Inputs for generating Netlist : RTL files,Technology files,Constraints Files,lib files.

Invoke the Dc shell using the command ]$ dc_shell -gui

Set the technology files and synthetic lib and reference lib
Create the milkway library

Set the Target,link,ref libraries

Read the RTL files


Schematic diagram

Check for current design

Run the compile ultra for the optimization


Write the all the output files into one directory for the use of pnr flow

Performing pnr flow using IC compiler2:

Input files:Netlist,power defined files,tech and lib files,floorplan files,constraints file.

Invoke the icc2 shell using the command ]$ icc2_shell -gui


Initially we need to create a library file using command create_lib

Read the netlist and link the block to top and read sdc file
Initialize the floorplan

Read parasitic technology files and set some default values

Perform the power planning


Create placement for floorplan for placing the cells iinn excact positions and check for legalization

Place the pins


Check quality of report before CTS and routing

Perform Clock optimization and observe the design clearly


So after performing cts there is reduce DRCs

Perform Route_auto
And perform route optimization
After that perform route eco and check lvs
Check for timing violations
Check for utilization rate

Congestion report

Quality of report
Report design

Save the block by using command save_block

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