1 /**

2 * @file xmc_ccu8.c
3 * @date 2017-04-27
4 *
5 * @cond
6 *****************************************************************************
7 * XMClib v2.2.0 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2020, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Boost Software License - Version 1.0 - August 17th, 2003
13 *
14 * Permission is hereby granted, free of charge, to any person or organization
15 * obtaining a copy of the software and accompanying documentation covered by
16 * this license (the "Software") to use, reproduce, display, distribute,
17 * execute, and transmit the Software, and to prepare derivative works of the
18 * Software, and to permit third-parties to whom the Software is furnished to
19 * do so, all subject to the following:
20 *
21 * The copyright notices in the Software and this entire statement, including
22 * the above license grant, this restriction and the following disclaimer,
23 * must be included in all copies of the Software, in whole or in part, and
24 * all derivative works of the Software, unless such copies or derivative
25 * works are solely in the form of machine-executable object code generated by
26 * a source language processor.
27 *
28 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
29 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
30 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
31 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
32 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
33 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
34 * DEALINGS IN THE SOFTWARE.
35 *
36 * To improve the quality of the software, users are encouraged to share
37 * modifications, enhancements or bug fixes with Infineon Technologies AG
38 * at [email protected].
39 *****************************************************************************
40 *
41 * Change History
42 * --------------
43 *
44 * 2015-02-20:
45 * - Initial <br>
46 *
47 * 2015-06-20:
48 * - Removed definition of GetDriverVersion API <br>
49 * - Added XMC_CCU8_SLICE_LoadSelector() API, to select which compare register
value has to be loaded
50 * during external load event.
51 *
52 * 2015-07-24:
53 * - XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent() is updated to support XMC14
device. <br>
54 *
55 * 2015-08-17:
56 * - XMC_CCU8_SLICE_CHC_CONFIG_MASK is not applicable to XMC14 devices. <br>
57 * - Start of prescaler XMC_CCU8_StartPrescaler() is invoked in XMC_CCU8_Init()
API. <br>
58 * - In XMC_CCU8_SLICE_CompareInit(), CHC register is updated according to the
device. <br>
59 * - Bug fix XMC_CCU8_SLICE_ConfigureEvent() during the level setting for XMC14
devices. <br>
60 * - XMC_CCU8_EnableShadowTransfer() definition is removed, since the API is made
as inline. <br>
61 *
62 * 2015-10-07:
63 * - XMC_CCU8_SLICE_GetEvent() is made as inline.
64 * - DOC updates for the newly added APIs.
65 *
66 * 2017-02-25:
67 * - XMC_CCU8_lAssertReset(), XMC_CCU8_lDeassertReset(), XMC_CCU8_lGateClock()
 and XMC_CCU8_lUngateClock() fix compilation warnings.
68 *
69 * 2017-04-27:
70 * - XMC_CCU8_SLICE_SetPrescaler() changed div_val parameter to type
XMC_CCU8_SLICE_PRESCALER_t
71 *
72 * 2019-04-29:
73 * - XMC_CCU8_SLICE_SetTimerRepeatMode() fix assertion
74 *
75 * @endcond
76 */
77 /*************************************************************************************
********************************
78 * HEADER FILES
79
*************************************************************************************
*******************************/
80 #include "xmc_ccu8.h"
81
82 #if defined(CCU80)
83 #include "xmc_scu.h"
84
85 /*************************************************************************************
********************************
86 * MACROS
87
*************************************************************************************
*******************************/
88 #define XMC_CCU8_NUM_SLICES_PER_MODULE (4U)
89 #define XMC_CCU8_SLICE_DITHER_PERIOD_MASK (1U)
90 #define XMC_CCU8_SLICE_DITHER_DUTYCYCLE_MASK (2U)
91 #define XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK (3U)
92 #define XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK (1U)
93 #define XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK (3U)
94 #if defined(CCU8V3) /* Defined for XMC1400 devices */
95 #define XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK CCU8_CC8_INS1_EV0IS_Msk
96 #else
97 #define XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK CCU8_CC8_INS_EV0IS_Msk
98 #endif
99 #define XMC_CCU8_GIDLC_CLOCK_MASK (15U)
100 #define XMC_CCU8_GCSS_SLICE0_MASK (1U)
101 #define XMC_CCU8_GCSS_SLICE1_MASK (16U)
102 #define XMC_CCU8_GCSS_SLICE2_MASK (256U)
103 #define XMC_CCU8_GCSS_SLICE3_MASK (4096U)
104 #define XMC_CCU8_SLICE_DEAD_TIME_CONFIG_MASK (63U)
105 #if !defined(CCU8V3) /* Defined for all devices except XMC1400 */
106 #define XMC_CCU8_SLICE_CHC_CONFIG_MASK (20U)
107 #endif
108
109 #define XMC_CCU8_SLICE_CHECK_DTC_DIV(div) \
110 ((div == XMC_CCU8_SLICE_DTC_DIV_1) || \
111 (div == XMC_CCU8_SLICE_DTC_DIV_2) || \
112 (div == XMC_CCU8_SLICE_DTC_DIV_4) || \
113 (div == XMC_CCU8_SLICE_DTC_DIV_8))
114
115 #define XMC_CCU8_SLICE_CHECK_CLOCK(clock) \
116 ((clock == XMC_CCU8_CLOCK_SCU) || \
117 (clock == XMC_CCU8_CLOCK_EXTERNAL_A) || \
118 (clock == XMC_CCU8_CLOCK_EXTERNAL_B) || \
119 (clock == XMC_CCU8_CLOCK_EXTERNAL_C))
120
121 #define XMC_CCU8_SLICE_CHECK_OUTPUT(out) \
122 ((out == XMC_CCU8_SLICE_OUTPUT_0) || \
123 (out == XMC_CCU8_SLICE_OUTPUT_1) || \
124 (out == XMC_CCU8_SLICE_OUTPUT_2) || \
125 (out == XMC_CCU8_SLICE_OUTPUT_3))
126
127 #define XMC_CCU8_SLICE_CHECK_END_MODE(end_mode) \
128 ((end_mode == XMC_CCU8_SLICE_END_MODE_TIMER_STOP) || \
129 (end_mode == XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR) || \
130 (end_mode == XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR))
131
132 #define XMC_CCU8_SLICE_CHECK_EVENT_ID(event_id) \
133 ((event_id == XMC_CCU8_SLICE_EVENT_NONE)|| \
134 (event_id == XMC_CCU8_SLICE_EVENT_0) || \
135 (event_id == XMC_CCU8_SLICE_EVENT_1) || \
136 (event_id == XMC_CCU8_SLICE_EVENT_2))
137
138 #define XMC_CCU8_SLICE_CHECK_EDGE_SENSITIVITY(edge) \
139 ((edge == XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE) || \
140 (edge == XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE) || \
141 (edge == XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE)|| \
142 (edge == XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE))
143
144 #define XMC_CCU8_SLICE_CHECK_EVENT_FILTER(cycles) \
145 ((cycles == XMC_CCU8_SLICE_EVENT_FILTER_DISABLED) || \
146 (cycles == XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES) || \
147 (cycles == XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES) || \
148 (cycles == XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES))
149
150 #define XMC_CCU8_SLICE_CHECK_CAP_TIMER_CLEAR_MODE(mode) \
151 ((mode == XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER) || \
152 (mode == XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH)|| \
153 (mode == XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW) || \
154 (mode == XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS))
155
156 #define XMC_CCU8_SLICE_CHECK_MCS_ACTION(mcs_action) \
157 ((mcs_action == XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR) || \
158 (mcs_action == XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP) || \
159 (mcs_action == XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT))
160
161 #define XMC_CCU8_SLICE_CHECK_SR_ID(id) \
162 ((id == XMC_CCU8_SLICE_SR_ID_0) || \
163 (id == XMC_CCU8_SLICE_SR_ID_1) || \
164 (id == XMC_CCU8_SLICE_SR_ID_2) || \
165 (id == XMC_CCU8_SLICE_SR_ID_3))
166
167 #define XMC_CCU8_SLICE_CHECK_MODULATION_CHANNEL(channel) \
168 ((channel == XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE) || \
169 (channel == XMC_CCU8_SLICE_MODULATION_CHANNEL_1) || \
170 (channel == XMC_CCU8_SLICE_MODULATION_CHANNEL_2) || \
171 (channel == XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2))
172
173 #if((UC_SERIES == XMC13) || (UC_SERIES == XMC14))
174 #define XMC_CCU8_SLICE_CHECK_SLICE_STATUS(channel) \
175 ((channel == XMC_CCU8_SLICE_STATUS_CHANNEL_1) || \
176 (channel == XMC_CCU8_SLICE_STATUS_CHANNEL_2) || \
177 (channel == XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2) || \
178 (channel == XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2))
179 #else
180 #define XMC_CCU8_SLICE_CHECK_SLICE_STATUS(channel) \
181 ((channel == XMC_CCU8_SLICE_STATUS_CHANNEL_1) || \
182 (channel == XMC_CCU8_SLICE_STATUS_CHANNEL_2) || \
183 (channel == XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2))
184 #endif
185
186 /*************************************************************************************
********************************
187 * LOCAL ROUTINES
188
*************************************************************************************
*******************************/
189 #if defined(PERIPHERAL_RESET_SUPPORTED)
190 __STATIC_INLINE void XMC_CCU8_lAssertReset(const XMC_CCU8_MODULE_t *const module)
191 {
192 if (module == CCU80)
193 {
194 XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU80);
195 }
196 #if defined(CCU81)
197 else if (module == CCU81)
198 {
199 XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU81);
200 }
201 #endif
202 else
203 {
204 XMC_ASSERT("XMC_CCU8_lAssertReset:Invalid Module Pointer", 0);
205 }
206 }
207
208 __STATIC_INLINE void XMC_CCU8_lDeassertReset(const XMC_CCU8_MODULE_t *const module)
209 {
210 if (module == CCU80)
211 {
212 XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU80);
213 }
214 #if defined(CCU81)
215 else if (module == CCU81)
216 {
217 XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU81);
218 }
219 #endif
220 else
221 {
222 XMC_ASSERT("XMC_CCU8_lDeassertReset:Invalid Module Pointer", 0);
223 }
224 }
225 #endif
226
227 #if defined(CLOCK_GATING_SUPPORTED)
228 __STATIC_INLINE void XMC_CCU8_lGateClock(XMC_CCU8_MODULE_t *const module)
229 {
230 if (module == CCU80)
231 {
232 XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU80);
233 }
234 #if defined(CCU81)
235 else if (module == CCU81)
236 {
237 XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU81);
238 }
239 #endif
240 else
241 {
242 XMC_ASSERT("XMC_CCU8_lGateClock:Invalid Module Pointer", 0);
243 }
244 }
245
246 __STATIC_INLINE void XMC_CCU8_lUngateClock(XMC_CCU8_MODULE_t *const module)
247 {
248 if (module == CCU80)
249 {
250 XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU80);
251 }
252 #if defined(CCU81)
253 else if (module == CCU81)
254 {
255 XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU81);
256 }
257 #endif
258 else
259 {
260 XMC_ASSERT("XMC_CCU8_lUngateClock:Invalid Module Pointer", 0);
261 }
262 }
263 #endif
264
265 #if defined (XMC_ASSERT_ENABLE)
266 __STATIC_INLINE bool XMC_CCU8_SLICE_IsInputvalid(XMC_CCU8_SLICE_INPUT_t input)
267 {
268 #if (UC_SERIES == XMC14)
269 return (input < 48U);
270 #else
271 return (input < 16U);
272 #endif
273 }
274 #endif
275 /*************************************************************************************
 ********************************
276 * API IMPLEMENTATION
277
*************************************************************************************
*******************************/
278
279 /* API to set the CCU8 module as active and enable the clock */
280 void XMC_CCU8_EnableModule(XMC_CCU8_MODULE_t *const module)
281 {
282 XMC_ASSERT("XMC_CCU8_EnableModule:Invalid Module Pointer", XMC_CCU8_IsValidModule(
module));
283
284 #if (UC_FAMILY == XMC4)
285 /* Enable CCU8 module clock */
286 XMC_SCU_CLOCK_EnableClock(XMC_SCU_CLOCK_CCU);
287 #endif
288
289 #if defined(CLOCK_GATING_SUPPORTED)
290 XMC_CCU8_lUngateClock(module);
291 #endif
292
293 #if defined(PERIPHERAL_RESET_SUPPORTED)
294 XMC_CCU8_lDeassertReset(module);
295 #endif
296 }
297
298 /* API to set the CCU8 module as idle and disable the clock */
299 void XMC_CCU8_DisableModule(XMC_CCU8_MODULE_t *const module)
300 {
301 XMC_ASSERT("XMC_CCU8_DisableModule:Invalid Module Pointer", XMC_CCU8_IsValidModule(
module));
302
303 #if defined(PERIPHERAL_RESET_SUPPORTED)
304 XMC_CCU8_lAssertReset(module);
305 #endif
306
307 #if defined(CLOCK_GATING_SUPPORTED)
308 XMC_CCU8_lGateClock(module);
309 #endif
310 }
311
312 /* API to initialize CCU8 global resources */
313 void XMC_CCU8_Init(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SLICE_MCMS_ACTION_t
mcs_action)
314 {
315 uint32_t gctrl;
316
317 XMC_ASSERT("XMC_CCU8_Init:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
318 XMC_ASSERT("XMC_CCU8_Init:Invalid mcs action", XMC_CCU8_SLICE_CHECK_MCS_ACTION(
mcs_action));
319
320 /* Enable CCU8 module */
321 XMC_CCU8_EnableModule(module);
322 /* Start the prescaler */
323 XMC_CCU8_StartPrescaler(module);
324
325 gctrl = module->GCTRL;
326 gctrl &= ~((uint32_t) CCU8_GCTRL_MSDE_Msk);
327 gctrl |= (uint32_t)mcs_action << CCU8_GCTRL_MSDE_Pos;
328
329 module->GCTRL = gctrl;
330 }
331
332 /* API to select CCU8 module clock */
333 void XMC_CCU8_SetModuleClock(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_CLOCK_t
clock)
334 {
335 uint32_t gctrl;
336
337 XMC_ASSERT("XMC_CCU8_SetModuleClock:Invalid Module Pointer", XMC_CCU8_IsValidModule(
module));
338 XMC_ASSERT("XMC_CCU8_SetModuleClock:Invalid Module Clock",
XMC_CCU8_SLICE_CHECK_CLOCK(clock));
339
340 gctrl = module->GCTRL;
341 gctrl &= ~((uint32_t) CCU8_GCTRL_PCIS_Msk);
342 gctrl |= ((uint32_t) clock) << CCU8_GCTRL_PCIS_Pos;
343
344 module->GCTRL = gctrl;
345 }
346
347 /* API to configure CC8 Slice in Compare mode */
348 void XMC_CCU8_SLICE_CompareInit(XMC_CCU8_SLICE_t *const slice,
349 const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const
compare_init)
350 {
351 XMC_ASSERT("XMC_CCU8_SLICE_CompareInit:Invalid Slice Pointer", XMC_CCU8_IsValidSlice
(slice));
352 XMC_ASSERT("XMC_CCU8_SLICE_CompareInit:Timer Init Pointer is NULL",
353 (XMC_CCU8_SLICE_COMPARE_CONFIG_t *) NULL != compare_init);
354 /* Stops the timer */
355 XMC_CCU8_SLICE_StopTimer(slice);
356 /* Program the timer mode */
357 slice->TC = compare_init->tc;
358 /* Enable the timer concatenation */
359 slice->CMC = (uint32_t)compare_init->timer_concatenation << CCU8_CC8_CMC_TCE_Pos;
360 /* Program initial prescaler divider value */
361 slice->PSC = (uint32_t) compare_init->prescaler_initval;
362 /* Program floating prescaler compare value */
363 slice->FPCS = (uint32_t) compare_init->float_limit;
364 /* Program the dither compare value */
365 slice->DITS = (uint32_t) compare_init->dither_limit;
366 /* Program timer output passive level */
367 slice->PSL = (uint32_t) compare_init->psl;
368 /* Asymmetric PWM and Slice output routing configuration */
369 #if defined(CCU8V3) /* Defined for XMC1400 devices only */
370 slice->CHC = (uint32_t) compare_init->chc;
371 #else
372 slice->CHC = (uint32_t)((uint32_t)compare_init->chc ^ XMC_CCU8_SLICE_CHC_CONFIG_MASK
);
373 #endif
374 }
375
376 /* API to configure CC8 Slice in Capture mode */
377 void XMC_CCU8_SLICE_CaptureInit(XMC_CCU8_SLICE_t *const slice,
378 const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const
capture_init)
379 {
380 XMC_ASSERT("XMC_CCU8_SLICE_CaptureInit:Invalid Slice Pointer", XMC_CCU8_IsValidSlice
(slice));
381 XMC_ASSERT("XMC_CCU8_SLICE_CaptureInit:Capture Init Pointer is NULL",
382 (XMC_CCU8_SLICE_CAPTURE_CONFIG_t *) NULL != capture_init);
383 /* Stops the timer */
384 XMC_CCU8_SLICE_StopTimer(slice);
385 /* Capture mode configuration */
386 slice->TC = capture_init->tc;
387 /* Enable the timer concatenation */
388 slice->CMC = (uint32_t)capture_init->timer_concatenation << CCU8_CC8_CMC_TCE_Pos;
389 /* Program floating prescaler compare value */
390 slice->FPCS = (uint32_t) capture_init->float_limit;
391 /* Program initial prescaler divider value */
392 slice->PSC = (uint32_t) capture_init->prescaler_initval;
393 }
394
395 /* API to configure the each output of the slice with either STx or inverted STx. */
396 void XMC_CCU8_SLICE_SetOutPath(XMC_CCU8_SLICE_t *const slice, const uint32_t
out_path_msk)
397 {
398 uint32_t chc;
399 XMC_ASSERT("XMC_CCU8_SLICE_SetOutPath:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(
slice));
400 chc = slice->CHC;
401 #if !defined(CCU8V3) /* Defined for all devices except XMC1400 */
402 chc &= ~((uint32_t)out_path_msk >> 16U);
403 chc |= ((uint32_t)out_path_msk & 0xFFFFU);
404 #else
405 chc &= ~((uint32_t)((uint32_t)(out_path_msk & 0xCCCC0U) >> 2U));
406 chc |= ((uint32_t)out_path_msk & 0x33330U);
407 #endif
408 slice->CHC = chc;
409 }
410
411 /* API to configure the multichannel shadow transfer request via SW and via the
CCU8x.MCSS input. */
412 void XMC_CCU8_SetMultiChannelShadowTransferMode(XMC_CCU8_MODULE_t *const module, const
uint32_t slice_mode_msk)
413 {
414 uint32_t gctrl;
415
416 XMC_ASSERT("XMC_CCU8_SetMultiChannelShadowTransferMode:Invalid module Pointer",
XMC_CCU8_IsValidModule(module));
417
418 gctrl = module->GCTRL;
419 gctrl &= ~((uint32_t)slice_mode_msk >> 16U);
420 gctrl |= ((uint32_t)slice_mode_msk & 0xFFFFU);
421 module->GCTRL = gctrl;
422 }
423
424
425 /* API to configure the Start trigger function of a slice*/
426 void XMC_CCU8_SLICE_StartConfig(XMC_CCU8_SLICE_t *const slice,
427 const XMC_CCU8_SLICE_EVENT_t event,
428 const XMC_CCU8_SLICE_START_MODE_t start_mode)
429 {
430 uint32_t cmc;
431 uint32_t tc;
432
433 XMC_ASSERT("XMC_CCU8_SLICE_StartConfig:Invalid Slice Pointer", XMC_CCU8_IsValidSlice
(slice));
434 XMC_ASSERT("XMC_CCU8_SLICE_StartConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
435 XMC_ASSERT("XMC_CCU8_SLICE_StartConfig:Invalid Start Mode",
436 ((start_mode == XMC_CCU8_SLICE_START_MODE_TIMER_START) || \
437 (start_mode == XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR)));
438 cmc = slice->CMC;
439
440 cmc &= ~((uint32_t) CCU8_CC8_CMC_STRTS_Msk);
441 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_STRTS_Pos;
442
443 slice->CMC = cmc;
444
445 tc = slice->TC;
446
447 if (start_mode == XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR)
448 {
449 tc |= (uint32_t) CCU8_CC8_TC_STRM_Msk;
450 }
451 else
452 {
453 tc &= ~((uint32_t) CCU8_CC8_TC_STRM_Msk);
454 }
455
456 slice->TC = tc;
457 }
458
459 /* API to configure the Stop trigger function of a slice */
460 void XMC_CCU8_SLICE_StopConfig(XMC_CCU8_SLICE_t *const slice,
461 const XMC_CCU8_SLICE_EVENT_t event,
462 const XMC_CCU8_SLICE_END_MODE_t end_mode)
463 {
464 uint32_t cmc;
465 uint32_t tc;
466
467 XMC_ASSERT("XMC_CCU8_SLICE_StopConfig:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(
slice));
468 XMC_ASSERT("XMC_CCU8_SLICE_StopConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
469 XMC_ASSERT("XMC_CCU8_SLICE_StopConfig:Invalid End Mode",
XMC_CCU8_SLICE_CHECK_END_MODE(end_mode));
470
471 cmc = slice->CMC;
472 /* First, Bind the event with the stop function */
473 cmc &= ~((uint32_t) CCU8_CC8_CMC_ENDS_Msk);
474 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_ENDS_Pos;
475
476 slice->CMC = cmc;
477
478 /* Configure the stop mode */
479 tc = slice->TC;
480 tc &= ~((uint32_t) CCU8_CC8_TC_ENDM_Msk);
481 tc |= ((uint32_t) end_mode) << CCU8_CC8_TC_ENDM_Pos;
482
483 slice->TC = tc;
484 }
485
486 /* API to configure the Load trigger function of a slice*/
487 void XMC_CCU8_SLICE_LoadConfig(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_EVENT_t event)
488 {
489 uint32_t cmc;
490
491 XMC_ASSERT("XMC_CCU8_SLICE_LoadConfig:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(
slice));
492 XMC_ASSERT("XMC_CCU8_SLICE_LoadConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
493
494 cmc = slice->CMC;
495
496 /* First, Bind the event with the load function */
497 cmc &= ~((uint32_t) CCU8_CC8_CMC_LDS_Msk);
498 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_LDS_Pos;
499
500 slice->CMC = cmc;
501 }
502
503 /* API to configure, which compare register value has to be loaded during external
load event */
504 void XMC_CCU8_SLICE_LoadSelector(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
505 {
506 uint32_t tc;
507
508 XMC_ASSERT("XMC_CCU8_SLICE_LoadSelector:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
509 XMC_ASSERT("XMC_CCU8_SLICE_LoadSelector:Invalid Channel number",
XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(ch_num));
510
511 tc = slice->TC;
512
513 /* First, Bind the event with the load function */
514 tc &= ~((uint32_t) CCU8_CC8_TC_TLS_Msk);
515 tc |= (uint32_t)ch_num << CCU8_CC8_TC_TLS_Pos;
516
517 slice->TC = tc;
518 }
519
520 /* API to configure the slice modulation function */
521 void XMC_CCU8_SLICE_ModulationConfig(XMC_CCU8_SLICE_t *const slice,
522 const XMC_CCU8_SLICE_EVENT_t event,
523 const XMC_CCU8_SLICE_MODULATION_MODE_t mod_mode,
524 const XMC_CCU8_SLICE_MODULATION_CHANNEL_t channel
,
525 const bool synch_with_pwm)
526 {
527 uint32_t cmc;
528 uint32_t tc;
529
530 XMC_ASSERT("XMC_CCU8_SLICE_ModulationConfig:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
531 XMC_ASSERT("XMC_CCU8_SLICE_ModulationConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
532 XMC_ASSERT("XMC_CCU8_SLICE_ModulationConfig:Invalid channel for modulation",
533 XMC_CCU8_SLICE_CHECK_MODULATION_CHANNEL(channel));
534 XMC_ASSERT("XMC_CCU8_SLICE_ModulationConfig:Invalid Modulation Mode",
535 ((mod_mode == XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT) || \
536 (mod_mode == XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT)));
537
538 cmc = slice->CMC;
539
540 /* First, Bind the event with the modulation function */
541 cmc &= ~((uint32_t) CCU8_CC8_CMC_MOS_Msk);
542 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_MOS_Pos;
543
544 slice->CMC = cmc;
545
546 tc = slice->TC;
547
548 /* Next, Modulation mode */
549 if (mod_mode == XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT)
550 {
551 tc |= (uint32_t) CCU8_CC8_TC_EMT_Msk;
552 }
553 else
554 {
555 tc &= ~((uint32_t) CCU8_CC8_TC_EMT_Msk);
556 }
557
558 /* Synchronization of modulation effect with PWM cycle */
559 if (synch_with_pwm == true)
560 {
561 tc |= (uint32_t) CCU8_CC8_TC_EMS_Msk;
562 }
563 else
564 {
565 tc &= ~((uint32_t) CCU8_CC8_TC_EMS_Msk);
566 }
567
568 /* Configure on which channel external modulation to be applied */
569 tc &= ~((uint32_t) CCU8_CC8_TC_EME_Msk);
570 tc |= (uint32_t)channel << CCU8_CC8_TC_EME_Pos;
571
572 slice->TC = tc;
573 }
574
575 /* API to configure the slice count function */
576 void XMC_CCU8_SLICE_CountConfig(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_EVENT_t event)
577 {
578 uint32_t cmc;
579
580 XMC_ASSERT("XMC_CCU8_SLICE_CountConfig:Invalid Slice Pointer", XMC_CCU8_IsValidSlice
(slice));
581 XMC_ASSERT("XMC_CCU8_SLICE_CountConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
582
583 cmc = slice->CMC;
584
585 /* First, Bind the event with the count function */
586 cmc &= ~((uint32_t) CCU8_CC8_CMC_CNTS_Msk);
587 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_CNTS_Pos;
588
589 slice->CMC = cmc;
590 }
591
592 /* API to configure slice gate function */
593 void XMC_CCU8_SLICE_GateConfig(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_EVENT_t event)
594 {
595 uint32_t cmc;
596
597 XMC_ASSERT("XMC_CCU8_SLICE_GateConfig:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(
slice));
598 XMC_ASSERT("XMC_CCU8_SLICE_GateConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
599
600 cmc = slice->CMC;
601
602 /* First, Bind the event with the gate function */
603 cmc &= ~((uint32_t) CCU8_CC8_CMC_GATES_Msk);
604 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_GATES_Pos;
605
606 slice->CMC = cmc;
607 }
608
609 /* API to configure Capture-0 function */
610 void XMC_CCU8_SLICE_Capture0Config(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_EVENT_t event)
611 {
612 uint32_t cmc;
613
614 XMC_ASSERT("XMC_CCU8_SLICE_Capture0Config:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
615 XMC_ASSERT("XMC_CCU8_SLICE_Capture0Config:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
616
617 cmc = slice->CMC;
618
619 /* First, Bind the event with the gate function */
620 cmc &= ~((uint32_t) CCU8_CC8_CMC_CAP0S_Msk);
621 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_CAP0S_Pos;
622
623 slice->CMC = cmc;
624 }
625
626 /* API to configure Capture-1 function */
627 void XMC_CCU8_SLICE_Capture1Config(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_EVENT_t event)
628 {
629 uint32_t cmc;
630
631 XMC_ASSERT("XMC_CCU8_SLICE_Capture1Config:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
632 XMC_ASSERT("XMC_CCU8_SLICE_Capture1Config:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
633
634
635 cmc = slice->CMC;
636
637 /* First, Bind the event with the gate function */
638 cmc &= ~((uint32_t) CCU8_CC8_CMC_CAP1S_Msk);
639 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_CAP1S_Pos;
640
641 slice->CMC = cmc;
642 }
643
644 /* API to configure direction function */
645 void XMC_CCU8_SLICE_DirectionConfig(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_EVENT_t event)
646 {
647 uint32_t cmc;
648
649 XMC_ASSERT("XMC_CCU8_SLICE_DirectionConfig:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
650 XMC_ASSERT("XMC_CCU8_SLICE_DirectionConfig:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
651
652 cmc = slice->CMC;
653
654 /* First, Bind the event with the direction function */
655 cmc &= ~((uint32_t) CCU8_CC8_CMC_UDS_Msk);
656 cmc |= ((uint32_t) event) << CCU8_CC8_CMC_UDS_Pos;
657
658 slice->CMC = cmc;
659 }
660
661 /* API to configure slice status bit override function */
662 void XMC_CCU8_SLICE_StatusBitOverrideConfig(XMC_CCU8_SLICE_t *const slice)
663 {
664 uint32_t cmc;
665
666 XMC_ASSERT("XMC_CCU8_SLICE_StatusBitOverrideConfig:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
667
668 cmc = slice->CMC;
669
670 /* Map status bit trigger override to Event 1 &
671 status bit value override to Event 2 */
672 cmc &= ~((uint32_t) CCU8_CC8_CMC_OFS_Msk);
673 cmc |= ((uint32_t) 1) << CCU8_CC8_CMC_OFS_Pos;
674
675 slice->CMC = cmc;
676 }
677
678 /* API to configure trap function*/
679 void XMC_CCU8_SLICE_TrapConfig(XMC_CCU8_SLICE_t *const slice,
680 const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t exit_mode,
681 const bool synch_with_pwm)
682 {
683 uint32_t cmc;
684 uint32_t tc;
685
686 XMC_ASSERT("XMC_CCU8_SLICE_TrapConfig:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(
slice));
687 XMC_ASSERT("XMC_CCU8_SLICE_TrapConfig:Invalid Exit Mode", ((exit_mode ==
XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC) || \
688 (exit_mode == XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW)));
689
690 cmc = slice->CMC;
691
692 /* Map trap function to Event 2 */
693 cmc &= ~((uint32_t) CCU8_CC8_CMC_TS_Msk);
694 cmc |= ((uint32_t) 1) << CCU8_CC8_CMC_TS_Pos;
695
696 slice->CMC = cmc;
697
698 tc = slice->TC;
699
700 /* Configure synchronization option */
701 if (synch_with_pwm == true)
702 {
703 tc |= (uint32_t) CCU8_CC8_TC_TRPSE_Msk;
704 }
705 else
706 {
707 tc &= ~((uint32_t) CCU8_CC8_TC_TRPSE_Msk);
708 }
709
710 /* Configure exit mode */
711 if (exit_mode == XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW)
712 {
713 tc |= (uint32_t) CCU8_CC8_TC_TRPSW_Msk;
714 }
715 else
716 {
717 tc &= ~((uint32_t) CCU8_CC8_TC_TRPSW_Msk);
718 }
719
720 slice->TC = tc;
721 }
722
723 /* API to configure a slice Status Bit Override event */
724 void XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent(XMC_CCU8_SLICE_t *const slice,
725 const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev1_config,
726 const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev2_config)
727 {
728 uint32_t ins;
729
730 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
731 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Input",
732 XMC_CCU8_SLICE_IsInputvalid(ev1_config->mapped_input));
733 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Edge Sensitivity"
,
734 XMC_CCU8_SLICE_CHECK_EDGE_SENSITIVITY(ev1_config->edge));
735 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Level
Sensitivity",
736 ((ev1_config->level == XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH
) || \
737 (ev1_config->level == XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW
)));
738 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Debounce Period",
739 XMC_CCU8_SLICE_CHECK_EVENT_FILTER(ev1_config->duration));
740 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Input",
741 XMC_CCU8_SLICE_IsInputvalid(ev2_config->mapped_input));
742 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Edge Sensitivity"
,
743 XMC_CCU8_SLICE_CHECK_EDGE_SENSITIVITY(ev2_config->edge));
744 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Level
Sensitivity",
745 ((ev2_config->level == XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH
) || \
746 (ev2_config->level == XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW
)));
747 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent:Invalid Debounce Period",
748 XMC_CCU8_SLICE_CHECK_EVENT_FILTER(ev2_config->duration));
749
750 #if defined(CCU8V3) /* Defined for XMC1400 devices only */
751 ins = slice->INS2;
752
753 /* Configure the edge sensitivity for event 1 */
754 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK) <<
CCU8_CC8_INS2_EV1EM_Pos);
755 ins |= ((uint32_t) ev1_config->edge) << CCU8_CC8_INS2_EV1EM_Pos;
756
757 /* Configure the edge sensitivity for event 2 */
758 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK) <<
CCU8_CC8_INS2_EV2EM_Pos);
759 ins |= ((uint32_t) ev2_config->edge) << CCU8_CC8_INS2_EV2EM_Pos;
760
761 /* Configure the level sensitivity for event 1 */
762 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK) <<
CCU8_CC8_INS2_EV1LM_Pos);
763 ins |= ((uint32_t) ev1_config->level) << CCU8_CC8_INS2_EV1LM_Pos;
764
765 /* Configure the level sensitivity for event 2 */
766 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK) <<
CCU8_CC8_INS2_EV2LM_Pos);
767 ins |= ((uint32_t) ev2_config->level) << CCU8_CC8_INS2_EV2LM_Pos;
768
769 /* Configure the debounce filter for event 1 */
770 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK) <<
CCU8_CC8_INS2_LPF1M_Pos);
771 ins |= ((uint32_t) ev1_config->duration) << CCU8_CC8_INS2_LPF1M_Pos;
772
773 /* Configure the debounce filter for event 2 */
774 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK) <<
CCU8_CC8_INS2_LPF2M_Pos);
775 ins |= ((uint32_t) ev2_config->duration) << CCU8_CC8_INS2_LPF2M_Pos;
776
777 slice->INS2 = ins;
778
779 ins = slice->INS1;
780 /* Next, the input for Event1 */
781 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) <<
CCU8_CC8_INS1_EV1IS_Pos);
782 ins |= ((uint32_t) ev1_config->mapped_input) << CCU8_CC8_INS1_EV1IS_Pos;
783
784 /* Finally, the input for Event2 */
785 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) <<
CCU8_CC8_INS1_EV2IS_Pos);
786 ins |= ((uint32_t) ev2_config->mapped_input) << CCU8_CC8_INS1_EV2IS_Pos;
787
788 slice->INS1 = ins;
789 #else
790 ins = slice->INS;
791
792 /* Configure the edge sensitivity for event 1 */
793 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK) <<
CCU8_CC8_INS_EV1EM_Pos);
794 ins |= ((uint32_t) ev1_config->edge) << CCU8_CC8_INS_EV1EM_Pos;
795
796 /* Configure the edge sensitivity for event 2 */
797 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK) <<
CCU8_CC8_INS_EV2EM_Pos);
798 ins |= ((uint32_t) ev2_config->edge) << CCU8_CC8_INS_EV2EM_Pos;
799
800 /* Configure the level sensitivity for event 1 */
801 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK) <<
CCU8_CC8_INS_EV1LM_Pos);
802 ins |= ((uint32_t) ev1_config->level) << CCU8_CC8_INS_EV1LM_Pos;
803
804 /* Configure the level sensitivity for event 2 */
805 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK) <<
CCU8_CC8_INS_EV2LM_Pos);
806 ins |= ((uint32_t) ev2_config->level) << CCU8_CC8_INS_EV2LM_Pos;
807
808 /* Configure the debounce filter for event 1 */
809 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK) <<
CCU8_CC8_INS_LPF1M_Pos);
810 ins |= ((uint32_t) ev1_config->duration) << CCU8_CC8_INS_LPF1M_Pos;
811
812 /* Configure the debounce filter for event 2 */
813 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK) <<
CCU8_CC8_INS_LPF2M_Pos);
814 ins |= ((uint32_t) ev2_config->duration) << CCU8_CC8_INS_LPF2M_Pos;
815
816 /* Next, the input for Event1 */
817 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) <<
CCU8_CC8_INS_EV1IS_Pos);
818 ins |= ((uint32_t) ev1_config->mapped_input) << CCU8_CC8_INS_EV1IS_Pos;
819
820 /* Finally, the input for Event2 */
821 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) <<
CCU8_CC8_INS_EV2IS_Pos);
822 ins |= ((uint32_t) ev2_config->mapped_input) << CCU8_CC8_INS_EV2IS_Pos;
823
824 slice->INS = ins;
825 #endif
826 }
827
828 /* API to configure a slice trigger event */
829 void XMC_CCU8_SLICE_ConfigureEvent(XMC_CCU8_SLICE_t *const slice,
830 const XMC_CCU8_SLICE_EVENT_t event,
831 const XMC_CCU8_SLICE_EVENT_CONFIG_t *const config)
832 {
833 uint32_t ins;
834 uint8_t pos;
835 uint8_t offset;
836
837 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureEvent:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
838 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureEvent:Invalid Event ID",
XMC_CCU8_SLICE_CHECK_EVENT_ID(event));
839 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureEvent:Invalid Input",
XMC_CCU8_SLICE_IsInputvalid(config->mapped_input));
840 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureEvent:Invalid Edge Sensitivity",
841 XMC_CCU8_SLICE_CHECK_EDGE_SENSITIVITY(config->edge));
842 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureEvent:Invalid Level Sensitivity",
843 ((config->level == XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH) ||
\
844 (config->level == XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW)));
845 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureEvent:Invalid Debounce Period",
846 XMC_CCU8_SLICE_CHECK_EVENT_FILTER(config->duration));
847
848 /* Calculate offset with reference to event */
849 offset = ((uint8_t) event) - 1U;
850
851 #if defined(CCU8V3) /* Defined for XMC1400 devices only */
852 ins = slice->INS2;
853
854 /* First, configure the edge sensitivity */
855 pos = ((uint8_t) CCU8_CC8_INS2_EV0EM_Pos) + (uint8_t)(offset << 2U);
856 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK) << pos);
857 ins |= ((uint32_t) config->edge) << pos;
858
859 /* Next, the level */
860 pos = ((uint8_t) CCU8_CC8_INS2_EV0LM_Pos) + (uint8_t)(offset << 2U);
861 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK) << pos);
862 ins |= ((uint32_t) (config->level)) << pos;
863
864 /* Next, the debounce filter */
865 pos = ((uint8_t) CCU8_CC8_INS2_LPF0M_Pos) + (uint8_t)(offset << 2U);
866 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK) << pos);
867 ins |= ((uint32_t) config->duration) << pos;
868
869 slice->INS2 = ins;
870
871 ins = slice->INS1;
872
873 /* Finally the input */
874 pos = ((uint8_t) CCU8_CC8_INS1_EV0IS_Pos) + (uint8_t)(offset << 3U);
875 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) << pos);
876 ins |= ((uint32_t) config->mapped_input) << pos;
877
878 slice->INS1 = ins;
879
880 #else
881 ins = slice->INS;
882
883 /* First, configure the edge sensitivity */
884 pos = ((uint8_t) CCU8_CC8_INS_EV0EM_Pos) + (uint8_t)(offset << 1U);
885 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_EDGE_CONFIG_MASK) << pos);
886 ins |= ((uint32_t) config->edge) << pos;
887
888 /* Next, the level */
889 pos = ((uint8_t) CCU8_CC8_INS_EV0LM_Pos) + offset;
890 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_LEVEL_CONFIG_MASK) << pos);
891 ins |= ((uint32_t) (config->level)) << pos;
892
893 /* Next, the debounce filter */
894 pos = ((uint8_t) CCU8_CC8_INS_LPF0M_Pos) + (uint8_t)(offset << 1U);
895 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_FILTER_CONFIG_MASK) << pos);
896 ins |= ((uint32_t) config->duration) << pos;
897
898 /* Finally the input */
899 pos = ((uint8_t) CCU8_CC8_INS_EV0IS_Pos) + (uint8_t)(offset << 2U);
900 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) << pos);
901 ins |= ((uint32_t) config->mapped_input) << pos;
902
903 slice->INS = ins;
904 #endif
905 }
906
907 /* API to bind an input to a slice trigger event */
908 void XMC_CCU8_SLICE_SetInput(XMC_CCU8_SLICE_t *const slice,
909 const XMC_CCU8_SLICE_EVENT_t event,
910 const XMC_CCU8_SLICE_INPUT_t input)
911 {
912 uint32_t ins;
913 uint8_t pos;
914 uint8_t offset;
915
916 XMC_ASSERT("XMC_CCU8_SLICE_SetInput:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(
slice));
917 XMC_ASSERT("XMC_CCU8_SLICE_SetInput:Invalid Event ID", XMC_CCU8_SLICE_CHECK_EVENT_ID
(event));
918 XMC_ASSERT("XMC_CCU8_SLICE_SetInput:Invalid Input", XMC_CCU8_SLICE_IsInputvalid(
input));
919
920 /* Calculate offset with reference to event */
921 offset = ((uint8_t) event) - 1U;
922
923 #if defined(CCU8V3) /* Defined for XMC1400 devices only */
924 pos = ((uint8_t) CCU8_CC8_INS1_EV0IS_Pos) + (uint8_t) (offset << 3U);
925 ins = slice->INS1;
926 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) << pos);
927 ins |= ((uint32_t) input) << pos;
928
929 slice->INS1 = ins;
930 #else
931
932 pos = ((uint8_t) CCU8_CC8_INS_EV0IS_Pos) + (uint8_t) (offset << 2U);
933 ins = slice->INS;
934 ins &= ~(((uint32_t) XMC_CCU8_SLICE_EVENT_INPUT_CONFIG_MASK) << pos);
935 ins |= ((uint32_t) input) << pos;
936
937 slice->INS = ins;
938 #endif
939 }
940
941 /* API to program timer repeat mode - Single shot vs repeat */
942 void XMC_CCU8_SLICE_SetTimerRepeatMode(XMC_CCU8_SLICE_t *const slice,
943 const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t mode)
944 {
945 uint32_t tc;
946
947 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerRepeatMode:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
948 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerRepeatMode:Invalid Timer Repeat Mode",
949 ((mode == XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT) || \
950 (mode == XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE)));
951
952 tc = slice->TC;
953
954 if (XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT == mode)
955 {
956 tc &= ~((uint32_t) CCU8_CC8_TC_TSSM_Msk);
957 }
958 else
959 {
960 tc |= (uint32_t) CCU8_CC8_TC_TSSM_Msk;
961 }
962
963 slice->TC = tc;
964 }
965
966 /* Programs timer counting mode */
967 void XMC_CCU8_SLICE_SetTimerCountingMode(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_TIMER_COUNT_MODE_t mode)
968 {
969 uint32_t tc;
970
971 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCountingMode:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
972 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCountingMode:Invalid Timer Count Mode",
973 ((mode == XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA) || \
974 (mode == XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA)));
975
976 tc = slice->TC;
977
978 if (XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA == mode)
979 {
980 tc &= ~((uint32_t) CCU8_CC8_TC_TCM_Msk);
981 }
982 else
983 {
984 tc |= (uint32_t) CCU8_CC8_TC_TCM_Msk;
985 }
986
987 slice->TC = tc;
988 }
989
990 /* Programs period match value of the timer */
991 void XMC_CCU8_SLICE_SetTimerPeriodMatch(XMC_CCU8_SLICE_t *const slice, const uint16_t
period_val)
992 {
993 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerPeriodMatch:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
994 slice->PRS = (uint32_t) period_val;
995 }
996
997 /* Retrieves desired capture register value */
998 uint32_t XMC_CCU8_SLICE_GetCaptureRegisterValue(const XMC_CCU8_SLICE_t *const slice,
const uint8_t reg_num)
999 {
1000 XMC_ASSERT("XMC_CCU8_SLICE_GetCaptureRegisterValue:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1001 XMC_ASSERT("XMC_CCU8_SLICE_GetCaptureRegisterValue:Invalid register number", (
reg_num < 4U));
1002 return (slice->CV[reg_num]);
1003 }
1004
1005 /* @brief Retrieves the latest captured timer value */
1006 XMC_CCU8_STATUS_t XMC_CCU8_SLICE_GetLastCapturedTimerValue(const XMC_CCU8_SLICE_t *
const slice,
1007 const XMC_CCU8_SLICE_CAP_REG_SET_t set,
1008 uint32_t *val_ptr)
1009 {
1010
1011 XMC_CCU8_STATUS_t retval;
1012 uint8_t i;
1013 uint8_t start;
1014 uint8_t end;
1015
1016 XMC_ASSERT("XMC_CCU8_SLICE_GetLastCapturedTimerValue:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1017 XMC_ASSERT("XMC_CCU8_SLICE_GetLastCapturedTimerValue:Invalid Register Set",
1018 ((set == XMC_CCU8_SLICE_CAP_REG_SET_LOW) || \
1019 (set == XMC_CCU8_SLICE_CAP_REG_SET_HIGH)));
1020
1021 retval = XMC_CCU8_STATUS_ERROR;
1022
1023 /* First check if extended capture mode is enabled */
1024 if ((slice->TC) & CCU8_CC8_TC_ECM_Msk)
1025 {
1026 /* Extended capture mode has been enabled. So start with the lowest capture
register and work your way up */
1027 start = 0U;
1028 end = XMC_CCU8_NUM_SLICES_PER_MODULE;
1029 }
1030 else
1031 {
1032 /* Extended capture mode is not enabled */
1033 if (set == XMC_CCU8_SLICE_CAP_REG_SET_HIGH)
1034 {
1035 start = ((uint8_t) XMC_CCU8_NUM_SLICES_PER_MODULE) >> 1U;
1036 end = (uint8_t) XMC_CCU8_NUM_SLICES_PER_MODULE;
1037 }
1038 else
1039 {
1040 start = 0U;
1041 end = ((uint8_t) XMC_CCU8_NUM_SLICES_PER_MODULE) >> 1U;
1042 }
1043 }
1044
1045 for (i = start; i < end; i++)
1046 {
1047 if ( (slice->CV[i]) & CCU8_CC8_CV_FFL_Msk )
1048 {
1049 *val_ptr = slice->CV[i];
1050 retval = XMC_CCU8_STATUS_OK;
1051 break;
1052 }
1053 }
1054
1055 return retval;
1056 }
1057 /* Retrieves timer capture value from a FIFO made of capture registers */
1058 #if defined(CCU8V1) /* Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200,
XMC4100 devices only */
1059 int32_t XMC_CCU8_GetCapturedValueFromFifo(const XMC_CCU8_MODULE_t *const module, const
uint8_t slice_number)
1060 {
1061 int32_t cap;
1062 uint32_t extracted_slice;
1063
1064 XMC_ASSERT("XMC_CCU8_GetCapturedValueFromFifo:Invalid Slice Pointer",
XMC_CCU8_IsValidModule(module));
1065
1066 /* First read the global fifo register */
1067 cap = (int32_t) module->ECRD;
1068
1069 extracted_slice = (((uint32_t) cap) & ((uint32_t) CCU8_ECRD_SPTR_Msk)) >>
CCU8_ECRD_SPTR_Pos;
1070
1071 /* Return captured result only if it were applicable to this slice */
1072 if (extracted_slice != ((uint32_t)slice_number))
1073 {
1074 cap = -1;
1075 }
1076
1077 return (cap);
1078 }
1079 #else
1080 /* Retrieves timer capture value from a FIFO made of capture registers */
1081 uint32_t XMC_CCU8_SLICE_GetCapturedValueFromFifo(const XMC_CCU8_SLICE_t *const slice,
const XMC_CCU8_SLICE_CAP_REG_SET_t set)
1082 {
1083 uint32_t cap;
1084
1085 XMC_ASSERT("XMC_CCU8_SLICE_GetCapturedValueFromFifo:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1086 XMC_ASSERT("XMC_CCU8_SLICE_GetCapturedValueFromFifo:Invalid Register Set",
1087 ((set == XMC_CCU8_SLICE_CAP_REG_SET_LOW) || \
1088 (set == XMC_CCU8_SLICE_CAP_REG_SET_HIGH)));
1089
1090 if (XMC_CCU8_SLICE_CAP_REG_SET_LOW == set)
1091 {
1092 cap = slice->ECRD0;
1093 }
1094 else
1095 {
1096 cap = slice->ECRD1;
1097 }
1098
1099 return cap;
1100 }
1101 #endif
1102
1103 /* Enables PWM dithering feature */
1104 void XMC_CCU8_SLICE_EnableDithering(XMC_CCU8_SLICE_t *const slice,
1105 const bool period_dither,
1106 const bool duty_dither,
1107 const uint8_t spread)
1108 {
1109 uint32_t tc;
1110
1111 XMC_ASSERT("XMC_CCU8_SLICE_EnableDithering:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1112
1113 tc = slice->TC;
1114 tc &= ~((uint32_t) CCU8_CC8_TC_DITHE_Msk);
1115
1116 if (true == period_dither)
1117 {
1118 tc |= (((uint32_t) XMC_CCU8_SLICE_DITHER_PERIOD_MASK) << CCU8_CC8_TC_DITHE_Pos);
1119 }
1120 if (true == duty_dither)
1121 {
1122 tc |= (((uint32_t) XMC_CCU8_SLICE_DITHER_DUTYCYCLE_MASK) << CCU8_CC8_TC_DITHE_Pos
);
1123 }
1124
1125 slice->TC = tc;
1126
1127 XMC_CCU8_SLICE_SetDitherCompareValue((XMC_CCU8_SLICE_t *)slice, (uint8_t)spread);
1128 }
1129
1130 /* Programs Pre-scaler divider */
1131 void XMC_CCU8_SLICE_SetPrescaler(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_PRESCALER_t div_val)
1132 {
1133 uint32_t fpc;
1134
1135 XMC_ASSERT("XMC_CCU8_SLICE_SetPrescaler:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1136
1137 /* If the prescaler is not running, update directly the divider*/
1138 fpc = slice->FPC;
1139 fpc &= ~((uint32_t) CCU8_CC8_FPC_PVAL_Msk);
1140 fpc |= ((uint32_t) div_val) << CCU8_CC8_FPC_PVAL_Pos;
1141 slice->FPC = fpc;
1142
1143 /*
1144 * In any case, update the initial value of the divider which is to be loaded once
the prescaler increments to the
1145 * compare value.
1146 */
1147 slice->PSC = (uint32_t) div_val;
1148 }
1149
1150 /* Programs timer compare match value for channel 1 or 2 */
1151 void XMC_CCU8_SLICE_SetTimerCompareMatch(XMC_CCU8_SLICE_t *const slice,
1152 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel,
1153 const uint16_t compare_val)
1154 {
1155 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCompareMatch:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1156 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCompareMatch:Invalid channel",
XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(channel));
1157
1158 if (XMC_CCU8_SLICE_COMPARE_CHANNEL_1 == channel)
1159 {
1160 slice->CR1S = (uint32_t) compare_val;
1161 }
1162 else
1163 {
1164 slice->CR2S = (uint32_t) compare_val;
1165 }
1166 }
1167
1168 /* Returns the timer compare match value for channel 1 or 2 */
1169 uint16_t XMC_CCU8_SLICE_GetTimerCompareMatch(const XMC_CCU8_SLICE_t *const slice,
1170 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)
1171 {
1172 uint16_t compare_value;
1173
1174 XMC_ASSERT("XMC_CCU8_SLICE_GetCompareMatch:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1175 XMC_ASSERT("XMC_CCU8_SLICE_GetCompareMatch:Invalid channel",
XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(channel));
1176
1177 if (XMC_CCU8_SLICE_COMPARE_CHANNEL_1 == channel)
1178 {
1179 compare_value = (uint16_t) slice->CR1;
1180 }
1181 else
1182 {
1183 compare_value = (uint16_t) slice->CR2;
1184 }
1185
1186 return (compare_value);
1187 }
1188
1189 /* Binds a capcom event to an NVIC node */
1190 void XMC_CCU8_SLICE_SetInterruptNode(XMC_CCU8_SLICE_t *const slice,
1191 const XMC_CCU8_SLICE_IRQ_ID_t event,
1192 const XMC_CCU8_SLICE_SR_ID_t sr)
1193 {
1194 uint32_t srs;
1195 uint32_t mask;
1196 int32_t pos;
1197
1198 XMC_ASSERT("XMC_CCU8_SLICE_SetInterruptNode:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1199 XMC_ASSERT("XMC_CCU8_SLICE_SetInterruptNode:Invalid SR ID ",
XMC_CCU8_SLICE_CHECK_SR_ID(sr));
1200 XMC_ASSERT("XMC_CCU8_SLICE_SetInterruptNode:Invalid event",
XMC_CCU8_SLICE_CHECK_INTERRUPT(event));
1201
1202 switch (event)
1203 {
1204 case XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH:
1205 case XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH:
1206 mask = ((uint32_t) CCU8_CC8_SRS_POSR_Msk);
1207 pos = CCU8_CC8_SRS_POSR_Pos;
1208 break;
1209
1210 case XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1:
1211 case XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1:
1212 mask = ((uint32_t) CCU8_CC8_SRS_CM1SR_Msk);
1213 pos = CCU8_CC8_SRS_CM1SR_Pos;
1214 break;
1215
1216 case XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2:
1217 case XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2:
1218 mask = ((uint32_t) CCU8_CC8_SRS_CM2SR_Msk);
1219 pos = CCU8_CC8_SRS_CM2SR_Pos;
1220 break;
1221
1222 case XMC_CCU8_SLICE_IRQ_ID_EVENT0:
1223 mask = ((uint32_t) CCU8_CC8_SRS_E0SR_Msk);
1224 pos = CCU8_CC8_SRS_E0SR_Pos;
1225 break;
1226
1227 case XMC_CCU8_SLICE_IRQ_ID_EVENT1:
1228 mask = ((uint32_t) CCU8_CC8_SRS_E1SR_Msk);
1229 pos = CCU8_CC8_SRS_E1SR_Pos;
1230 break;
1231
1232 case XMC_CCU8_SLICE_IRQ_ID_EVENT2:
1233 case XMC_CCU8_SLICE_IRQ_ID_TRAP:
1234 mask = ((uint32_t) CCU8_CC8_SRS_E2SR_Msk);
1235 pos = CCU8_CC8_SRS_E2SR_Pos;
1236 break;
1237
1238 default:
1239 mask = 0;
1240 pos = 0;
1241 break;
1242 }
1243
1244 if (mask != 0)
1245 {
1246 srs = slice->SRS;
1247 srs &= ~mask;
1248 srs |= (uint32_t)sr << pos;
1249 slice->SRS = srs;
1250 }
1251 }
1252
1253 /* Asserts passive level for the slice output */
1254 void XMC_CCU8_SLICE_SetPassiveLevel(XMC_CCU8_SLICE_t *const slice,
1255 const XMC_CCU8_SLICE_OUTPUT_t out,
1256 const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level)
1257 {
1258 uint32_t psl;
1259
1260 XMC_ASSERT("XMC_CCU8_SLICE_SetPassiveLevel:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1261 XMC_ASSERT("XMC_CCU8_SLICE_SetPassiveLevel:Invalid Slice Output",
XMC_CCU8_SLICE_CHECK_OUTPUT(out));
1262 XMC_ASSERT("XMC_CCU8_SLICE_SetPassiveLevel:Invalid Passive Level",
1263 ((level == XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW) || \
1264 (level == XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH)));
1265
1266 psl = slice->PSL;
1267
1268 psl &= ~((uint32_t) out);
1269 psl |= (uint32_t) level << ((uint32_t)out >> 1U);
1270
1271 /* Program CC8 slice output passive level */
1272 slice->PSL = psl;
1273 }
1274
1275 /* Initializes Dead time configuration for the slice outputs */
1276 void XMC_CCU8_SLICE_DeadTimeInit(XMC_CCU8_SLICE_t *const slice,
1277 const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const config
)
1278 {
1279 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureDeadTime:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1280
1281 /* Program dead time value for channel 1 */
1282 slice->DC1R = config->dc1r;
1283 /* Program dead time value for channel 2 */
1284 slice->DC2R = config->dc2r;
1285 /* Program dead time control configuration */
1286 slice->DTC = config->dtc;
1287 }
1288
1289 /* Activates or deactivates dead time for compare channel and ST path */
1290 void XMC_CCU8_SLICE_ConfigureDeadTime(XMC_CCU8_SLICE_t *const slice, const uint8_t
mask)
1291 {
1292 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureDeadTime:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1293 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureDeadTime:Invalid Channel", (mask <=
XMC_CCU8_SLICE_DEAD_TIME_CONFIG_MASK));
1294
1295 slice->DTC &= ~((uint32_t) XMC_CCU8_SLICE_DEAD_TIME_CONFIG_MASK);
1296 slice->DTC |= (uint32_t) mask;
1297 }
1298
1299 /* Configures rising edge delay and falling edge delay for dead time */
1300 void XMC_CCU8_SLICE_SetDeadTimeValue(XMC_CCU8_SLICE_t *const slice,
1301 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel,
1302 const uint8_t rise_value,
1303 const uint8_t fall_value)
1304 {
1305 XMC_ASSERT("XMC_CCU8_SLICE_SetDeadTimeValue:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1306 XMC_ASSERT("XMC_CCU8_SLICE_SetDeadTimeValue:Invalid channel",
XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(channel));
1307
1308 if (XMC_CCU8_SLICE_COMPARE_CHANNEL_1 == channel)
1309 {
1310 slice->DC1R = (((uint32_t) fall_value) << CCU8_CC8_DC1R_DT1F_Pos) | ((uint32_t)
rise_value);
1311 }
1312 else
1313 {
1314 slice->DC2R = (((uint32_t) fall_value) << CCU8_CC8_DC2R_DT2F_Pos) | ((uint32_t)
rise_value);
1315 }
1316 }
1317
1318 /* Configures clock division factor for dead time */
1319 void XMC_CCU8_SLICE_SetDeadTimePrescaler(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_DTC_DIV_t div_val)
1320 {
1321 XMC_ASSERT("XMC_CCU8_SLICE_SetDeadTimePrescaler:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1322 XMC_ASSERT("XMC_CCU8_SLICE_SetDeadTimePrescaler:Invalid divider value",
XMC_CCU8_SLICE_CHECK_DTC_DIV(div_val));
1323
1324 slice->DTC &= ~((uint32_t) CCU8_CC8_DTC_DTCC_Msk);
1325 slice->DTC |= ((uint32_t) div_val) << CCU8_CC8_DTC_DTCC_Pos;
1326 }
1327
1328 /* Configures status ST1, ST2 mapping to STy */
1329 void XMC_CCU8_SLICE_ConfigureStatusBitOutput(XMC_CCU8_SLICE_t *const slice, const
XMC_CCU8_SLICE_STATUS_t channel)
1330 {
1331 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOutput:Invalid Slice Pointer",
XMC_CCU8_IsValidSlice(slice));
1332 XMC_ASSERT("XMC_CCU8_SLICE_ConfigureStatusBitOutput:Invalid Channel",
XMC_CCU8_SLICE_CHECK_SLICE_STATUS(channel));
1333
1334 slice->TC &= ~((uint32_t) CCU8_CC8_TC_STOS_Msk);
1335 slice->TC |= ((uint32_t) channel) << CCU8_CC8_TC_STOS_Pos;
1336 }
1337
1338 #endif /* CCU80 */
1339