Chapter Three

Bipolar Junction Transistors

 3.1: Introduction
Transistors are manufactured by sandwiching one of
the semiconductor (p-type or N-type) materials
between two layers of the other semiconductor
materials. Transistors are basically grouped into two
broad classifications.
 Bipolar Junction Transistor (BJT) type: As the name implies
that the output current is the contribution of both minority
and majority charge carriers. BJT is a current controlled
device which means the output current is controlled by the
input current.
 Field Effect Transistor (FET) : is a unipolar three terminal
device, in such type of transistor , the output current is as a
result of either holes or electrons flow i.e majority charge
carriers only . The Output current is controlled by the input
voltage, hence FET is called voltage controlled device
Introduction (cont)…
 BJT Construction
• The Bipolar junction transistor is a three-layer semiconductor
device consisting of;
two n-type and one p-type layers of material(npn
transistor) or
two p-type and one n-type layers of material(pnp
transistor)
 Emitter: It is more heavily doped than any of the other
regions because its main function is to supply majority charge
carries (either electrons or holes) to the base.
 Base: It forms the middle section of the transistor. It is very
thin (10–6m) as compared to either the emitter or collector
and is very lightly-doped.
 Collector: Its main function (as indicated by its name) is to
collect majority charge carriers coming from the emitter and
passing through the base
 Contd…

a) NPN Bipolar Junction Transistor b) PNP Bipolar

Junction Transistor

Figure 3.1 Symbols and simplified models for (a) NPN and (b) PNP
bipolar junction transistors
Contd…

a) NPN transistor construction b) PNP transistor construction

Figure 3.2 Construction Feature of Bipolar Junction Transistor

 BJT Operating Regions
 A BJT has two junctions i.e. base-emitter and base-
collector junctions either of which could be forward-
biased or reverse-biased. With two junctions, there are
four possible combinations of bias condition.
 Both junctions reverse-biased
 Both junctions forward-biased
 BE junction forward-biased, BC junction reverse-biased.
 BE junction reverse-biased, BC junction forward-biased.
 Since the last condition is generally not used, the
remain is tabulated below.
 BJT Operating region cont…

Based on the biasing arrangement of the junctions, the

transistor operates in three regions , These are
 Active Region
 Saturation Region
 Cut-off regions
 BJT Operating region cont…
 Cut-off: This condition corresponds to reverse-bias for both base-
emitter and base-collector junctions. In fact, both diodes act like
open circuits under these conditions as shown in fig below which is
true for an ideal transistor. The reverse leakage current has been
neglected. As seen, the three transistor terminals are uncoupled
from each other. In cut-off, VCE = VCC.
 Saturation: This condition corresponds to forward-bias for both
base-emitter and base-collector junctions. The transistor becomes
saturated i.e. there is perfect short-circuit for both base-emitter
and base-collector diodes. The ideal case, where the three
transistor terminals have been connected together thereby
acquiring equal potentials. In this case, VCE = 0.
 Active Region: This condition corresponds to forward-bias for base-
emitter junction and reverse bias for base-collector junction. In this,
VCE > 0.
.

Biasing For Cutoff Biasing For Active

Biasing For saturation

 BJT operation

• In normal operation, the base-emitter is forward-

biased and the base-collector is reverse-biased.
• For the npn type ;
– the collector is more positive than the base, which is
more positive than the emitter.

• For the pnp type, the voltages are reversed to

maintain the forward-reverse bias.
Contd…

Figure 3.3: Bias voltages and current flow for (a) NPN and (b)
PNP bipolar junction transistors
 BJT operation(npn type)

Electrons from the emitter flowing to the base

Contd…
• When the base to emitter junction is forward
biased;
– The free electrons start to cross from the emitter to base
region
• Since emitter is highly doped a large number of
electrons crosses the junction
• But the base is very thin and also lightly doped,
and all electrons do not recombine with the holes
in this region
• Only a 2 % to 5% of electrons recombine with holes
Contd…

• Only a few electrons recombines with the holes in base

Contd…
• This electron hole recombination contributes a
base current.
• the base current circulates through base, emitter
and the voltage source.
 Contd…
• The rest 95% to 98% of the free electrons cross the
base to collector junction;
– due to the kinetic energy gained from the
electrostatic force of base to emitter voltage.
Contd…
• The excess free electrons in the base region can
easily cross the reverse-biased base-collector
junction.
• Because this free electrons in the base region are
minority carriers and the reverse –biased base to
collector junction do not oppose the flow of
minority charge carriers
• If the base to emitter forward-biased voltage
increases;
– the number electrons crossing the junctions also
increases proportionally
 Contd

• The ratio of collector current to base current is

called current gain in common emitter mode.
Contd…
• The base region is very narrow so that carriers are
swept across it from emitter to collector and

• only a relatively small current flow in the base

• To put this into context, the current flowing in the

emitter circuit is typically 100 times greater than
that flowing in the base.
Contd…
• The equation that relates current flow in the
collector, base, and emitter currents is;
IE = IB + IC

• Where IE is the emitter current, IB is the base

current, and
• IC is the collector current (all expressed in the same
units).
Contd…
• The collector current, however, comprises two
components;
– the majority and the minority carriers
• The minority-current component is called the
leakage current and is given the symbol ICO (IC
current with emitter terminal Open).
• The collector current, therefore, is determined in
total by;
 BJT Transistor Circuit Configurations
 Basically, there are three types of circuit connections
(called configurations) for operating a transistor.
1. Common-base (CB) 2. Common-emitter (CE)
3. Common-collector (CC).
 The term ‘common’ is used to denote the electrode
that is common to the input and output circuits.
Because the common electrode is generally grounded,
these modes of operation are frequently referred to as
grounded-base, grounded-emitter and grounded-
collector configuration.
 Since a transistor is a 3-terminal (and not a 4-terminal)
device, one of its terminals has to be common to the
input and output circuits.
 CB Configuration
In this configuration, emitter current IE is the
input current and collector current IC is the
output current. The input signal is applied
between the emitter and base whereas
output is taken out from the collector and
base as shown in Fig. 3.6. The collector
current is the summation of part of Emitter
current 𝛼 𝐼𝐸 collected by collector plus
current due to minority charge carriers 𝐼𝐶𝑂
 CB Configuration cont’

Fig 3.6

𝐼𝐶 = 𝛼𝐼𝐸 + 𝐼𝐶𝑂

The ratio of the collector current to the emitter current is called

alpha 𝛼 of a transistor is given by
𝛼 = 𝐼𝐶 − 𝐼𝐶𝑂 𝐼𝐸
Since 𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 , Neglecting 𝐼𝐶𝑂 ,

𝐼𝐸 = 𝛼𝐼𝐸 + 𝐼𝐵 i.e, 𝐼𝐵 = 1 − 𝛼 𝐼𝐸
 Common Base Static Characteristics
(a) Input Characteristic
It shows how IE varies with VBE when voltage VCB is held constant. The method of
determining this characteristic is as follows: First, voltage VCB is adjusted to a suitable
value with the help of adjustable resistance and next, voltage VBE is increased in a
number of discrete steps and corresponding values of IE are noted from the millimeter
connected for the purpose. When plotted, we get the input characteristic shown in
Fig.3.7

Fig 3.7 input characteristics

CB configuration

Input characteristics
VCB=constant
A small change VBE there will be a large change in IE
𝛥𝑉𝐵𝐸
Input resistance Rin is given by, 𝑅𝑖𝑛 = , VCB=constant, Rin is very small
𝛥𝐼𝐸
IE is almost independent of VCB
 Output Characteristic (CB)
 It shows the way IC varies with VCB when IE is held constant.
The method of obtaining this characteristic is as follows:
 First, the adjustable resistance is changed to get a suitable
value of VBE and hence that of IE. While keeping IE constant
at this value, VCB is increased from zero in a number of
steps and the corresponding collector current IC that flows
is noted. Next, VCB is reduced back to zero, IE is increased to
a value a little higher than before and the whole procedure
is repeated. In this way, whole family of curves is obtained,
a typical family being shown in Fig. 3.8

• Fig 3.8
 Output Characteristic (CB)
Output characteristics
1. The reciprocal of the near horizontal part of the characteristic gives the
output resistance Rout of the transistor which it would offer to an input signal.
Since the characteristic is linear over most of its length (meaning that IC is
virtually independent of VCB). Rout is very high, a typical value being 500k
𝟏
𝑹𝒐𝒖𝒕 =
𝛥𝐼C
𝛥𝑉BC
2. Another important feature of the characteristic is that a small amount of
collector current flows even when emitter current IE = 0, this due to collector
leakage current ICBO.
3. This characteristic may be used to find (α) the transistor as shown in
Fig.3.8
𝛥𝐼C
𝛼=
𝛥𝐼 E
4. Another point worth noting is that although IC is practically independent of
VC B over the working range of the transistor, yet if VCB is permitted to
increase beyond a certain value, IC eventually increases rapidly due to
avalanche breakdown as shown in Fig 5.8
.

Common Emitter
 Here, input signal is applied between the base and emitter and
output signal is taken out from the collector and emitter circuit.
As seen from Fig. 3.9, IB is the input current and IC is the
output current. The ratio of the d.c. collector current to dc base
current is called beta (β). 𝐼𝐶 = 𝛽𝐼𝐵
Fig 3.9

Note when the input is AC , the current ratio is given by

Δ𝐼
βac = 𝐶 , The relationship between β and α, we have
Δ𝐼B
β
α=
β+1
 Common Emitter Static Characteristics
(a) Input Characteristic
It shows how IB varies with changes in VBE when VCE is held constant at a
particular value. To begin with, voltage VCE is maintained constant at a
convenient value and then VBE is increased in steps. Corresponding values of IB
are noted at each step. The procedure is then repeated for a different but
constant value of VCE. A typical input characteristic is shown in Fig.3.9 like CB
connection, the overall shape resembles the forward characteristic of a P-N
diode.
Fig 3.9

𝟏 𝛥VBE
𝑹in = 𝛥IB = 𝛥IB
𝛥VBE

The reciprocal of the slope gives the input resistance Rin of the transistor.
Due to initial non-linearity of the curve, Rin varies considerably from a value of 4 k
Ω near the origin to a value of 600 Ω over the more linear part of the curve.
 Output or Collector Characteristic
It indicates the way in which IC varies with changes in VCE when IB
is held constant. For obtaining this characteristic, first IB is set to
a convenient value and maintained constant and then VCE is
increased from zero in steps, IC being noted at each step. Next,
VCE is reduced to zero and IB increased to another convenient
value and the whole procedure repeated. In this way, a family of
curves (Fig.3.10) is obtained.
• Fig 3.10
 Output Characteristic (cont)..
 It is seen that as VCE increases from zero, IC rapidly increases
to a near saturation level for a fixed value of IB. As shown, a
small amount of collector current flows even when IB= 0. It is
called ICEO . Since, main collector current is zero, the transistor
is said to be cut-off. It may be noted that if VCE is allowed to
increase too far, .C/B junction completely breaks down and
due to this avalanche breakdown, IC increases rapidly and may
cause damage to the transistor. When VCE has very low value
(ideally zero), the transistor is said to be saturated and it
operates in the saturation region of the characteristic. Here,
change in IB does not produce a corresponding change in IC.
keeping IB constant
𝛥VCE
𝑹out =
𝛥IC
.

CC Configuration
 In this case, input signal is applied between base and collector
and output signal is taken out from emitter-collector circuit
[Fig. 3.11 (a)]. Conventionally speaking, here IB is the input
current and IE is the output current as shown in Fig. 3.11(b).

IE
ɣ= = (1 + β)
IB

As shown in Fig. 3.11, in this case, collector terminal is common carrier to both the
input (CB) and output (CE) carriers circuits. The output characteristic is IE versus VCE
for several fixed values of IB. Since IC ≅ IE, this characteristic is practically identical to
that of the CE circuit and is shown in Fig.3.12
 Common Collector Static
Characteristics

Common collector is characterized by high current gain,

nearly unit voltage gain, high input resistance, and low
output resistance. Hence, it is used for impedance matching
circuit.
BJT Modes of Operation

Mode EBJ CBJ

Cutoff Reverse Reverse

Active Forward Reverse

(forward)
Reverse Reverse Forward
Active
Saturation Forward Forward

35
 Operating Limits for Each
Configuration
• VCE is at maximum and IC is at minimum
(ICmax= ICEO) in the cutoff region.

• IC is at maximum and VCE is at minimum

(VCE min = VCEsat = VCEO) in the saturation
region.

• The transistor operates in the active region

between saturation and cutoff.
 Operating Limits for Each
Configuration
• For each transistor there is a region of operation on
the characteristics that will ensure that;
– the maximum ratings are not being exceeded
– and the output signal exhibits minimum
distortion.

• Some of the limits of operation are;

– maximum collector current;
– maximum collector-to-emitter voltage (often
abbreviated as BV CEO or V(BR)CEO)
 Power Dissipation

Common-base:
PCmax  VCB I C

Common-emitter:
PCmax  VCE I C

Common-collector:

PCmax  VCE I E
 3.4. Biasing methods
The term biasing is the application of dc voltages to
establish a fixed level of current and voltage in a
transistor .
For transistor amplifiers the resulting dc current and
voltage establish an operating point on the
characteristics
Because the operating point is a fixed point on the
characteristics, it is also called the quiescent point
(abbreviated Q -point).
By definition, quiescent means quiet, still.

• The analysis of a transistor amplifier requires a

knowledge of both the dc and the ac response of the
system.
 Biasing methods (cont)…
Need for DC biasing
To determine the operating point of the
transistor so that transistor used as an amplifier
The input voltage should exceed cut-in
voltage for the transistor to be ON.
The BJT should be in the active region, to be
operated as an amplifier.
 Biasing methods (cont)…
Factors affecting the operating point
The main factor that affect the operating point is the
temperature. The operating point shifts due to change
in temperature.
As temperature increases, the values of ICE, β, VBE gets
affected.
ICBO gets doubled (for every 10o rise)
VBE decreases by 2.5mv (for every 1o rise)
Operating point should be made independent of
the temperature so as to achieve stability. To
achieve this, biasing circuits are introduced.
 Biasing methods (cont)…
 Need for Stabilization
 Stabilization of the operating point has to be achieved due
to the following reasons.
 Temperature dependence of IC
 Individual variations: As the value of β and the value of VBE are
not same for every transistor, whenever a transistor is replaced,
the operating point tends to change. Hence it is necessary to
stabilize the operating point.
 Thermal runaway : As the expression for collector current IC is
IC=βIB+ICEO =βIB+(β+1)ICBO
The flow of collector current and also the collector leakage
current causes heat dissipation. If the operating point is not
stabilized, there occurs a cumulative effect which increases
this heat dissipation.
 Biasing methods (cont)…
Stability Factor (S)
It is understood that IC should be kept constant in spite of
variations of ICBO or ICO.
Stability factor , biasing circuit should maintain constant IC
regardless of variation of ICBO or ICO

The stability factor should be as low as possible so that the

collector current doesn’t get affected, S=1 is the ideal value.

Hence the stability factor S depends on β, IB and IC.

 1, FIXED-BIAS CONFIGURATION
The fixed-bias circuit shown below provides a
relatively straightforward and simple introduction
to transistor dc bias analysis.

(a) (b)
Figure 3.21: (a) Fixed-bias circuit, (b):DC equivalent circuit
 Input characteristics
 Writing Kirchhoff’s voltage equation in the
clockwise direction for the loop, we obtain
+VCC - IBRB – VBE = 0

Substituting this expression in

stability equation we have

Base–emitter loop
Output characteristics
VCE + ICRC - VCC = 0
VCE = VCC – ICRC
VCE = VC - VE
VCE = VC, for VE = 0
VBE = VB – VE
VBE = VB, for VE = 0
 1. FIXED-BIAS CONFIGURATION
Advantages
The circuit is simple.
Only one resistor RE is required.
Biasing conditions are set easily.
No loading effect as no resistor is present at base-emitter
junction.
 Disadvantages
 The stabilization is poor as heat development can’t be
stopped.
 The stability factor is very high. So, there are strong
chances of thermal run away.
 Hence, this method is rarely employed.
1.FIXED-BIAS CONFIGURATION (cont)…
Example 1:
• Determine the following for the fixed-bias
configuration of Figure shown below.
• (a) IBQ and ICQ
• (b) VCEQ
• (c) VB and VC
• (d)VBC
1.FIXED-BIAS CONFIGURATION (cont)…

Figure 3.22: DC fixed-bias circuit for Example 1

1.FIXED-BIAS CONFIGURATION (cont)…
Solution
• a,

• b,

• c,

• d,
 Load-Line Analysis
• In the previous analysis the value of β is used to find
the operating point(Q-point) of the fixed-bias
configuration.
• We will now investigate how the network
parameters define the possible range of Q-points.
and how the actual Q-point is determined.
• The network of the Figure shown below establishes
an output equation that relates the variables IC and
VCE in the following manner:
VCE = VCC - ICRC
• The output characteristics of the transistor also
relate the two variables IC and VCE
1.FIXED-BIAS CONFIGURATION (cont)…
• Now let us draw the straight line defined by the
above equation on the characteristics.
• The most direct method of plotting the above
equation on the output characteristics is to use the
fact that a straight line is defined by two points.
VCE = VCC
FIXED-BIAS CONFIGURATION (cont)…

Figure 3.26: Fixed-bias load line

1.FIXED-BIAS CONFIGURATION (cont)…
Example 2
• Given the load line of the Figure shown below and
the defined Q-point, determine the required values
of VCC, RC, and RB for a fixed-bias configuration.
1.FIXED-BIAS CONFIGURATION (cont)…
Solution
2. Collector-feedback bias.
+VCC VCC   I C  I B  RC  I B RB  VBE
VCC  VBE
IB 
(hFE  1) RC  RB
RC
RB
ICQ  hFE I B

VCEQ  VCC   hFE  1 I B RC

IC
IB
 VCC  I CQ RC

IE

56
 2. Collector-feedback bias (contd)…
Example Determine the values of ICQ and VCEQ for the
amplifier .
+10 V
VCC  VBE
IB 
RB   hFE  1 RC
RC
10V  0.7V
1.5 k   28.05μA
RB 180kΩ  1011.5kΩ
ICQ  hFE I B  100  28.05μA
180 k
 2.805mA
hFE = 100
VCEQ  VCC  (hFE  1) I B RC
 10V  101 28.05μA 1.5kΩ
 5.75V 57
 2. Circuit Stability of
Collector-Feedback Bias (contd)…
+VCC hFE increases
(𝛽+1)(𝑅𝐵 +𝑅𝐶 )
S=
𝑅𝐵 +(𝛽+1)𝑅𝐶
IC increases (if IB is the same)
RC
RB VCE decreases

IC
IB
IB decreases

IE
IC does not increase that much.
Good Stability. Less dependent
on hFE and temperature.
58
 Collector-Feedback
Characteristics (contd)…
+VCC
Circuit recognition: The base
resistor is connected between
the base and the collector
RC terminals of the transistor.
RB Advantage: A simple circuit
with relatively stable Q-point.
IC Disadvantage: Relatively poor
IB
ac characteristics.
Applications: Used primarily to
IE
bias linear amplifiers.

59
3.Emitter-Stabilized Bias Configuration
This dc bias network contains an emitter resistor to
improve the stability level over that of the fixed-bias
configuration. The analysis will be performed by first
examining the base–emitter loop and then using the
results to investigate the collector–emitter loop.
 Input characteristics
Base–Emitter Loop
Writing Kirchhoff’s voltage law around the
indicated loop in the clockwise direction will
result in the following equation:

Base–emitter
loop
Input characteristics (Contd)…
+VCC – IBRB – VBE – IERE= 0
IE = (β + 1) IB
Substitute for IE in the above equation will result
+VCC – IBRB – VBE – (β + 1) IB RE= 0
Grouping terms will then provide the following:
- IB (RB + (β + 1) RE) + VCC - VBE = 0
Multiplying through by (-1) we have
IB (RB + (β + 1) RE) - VCC + VBE = 0
IB (RB + (β + 1) RE) = VCC - VBE
Solve for IB
 Input characteristics (Contd)…
𝑑𝐼𝐵 𝑅𝐸
=− →
𝑑𝐼𝐶 𝑅𝐸 +𝑅𝐵

Substituting the derivative expression in stability

factor expression we have ,
1+β
S= 𝑅𝐸
1+β 𝑅 +𝑅
𝐸 𝐵

This expression shows improvement in the stability with

cost of reducing gain as compared with fixed biasing
Output characteristics (Contd)…
Collector–Emitter Loop
• Writing Kirchhoff’s voltage law for the indicated
loop in the clockwise direction will result in
+ IERE + VCE + ICRC - VCC = 0
• Substituting IE ≈ IC and grouping terms gives

• While the voltage from collector to ground can be

determined from;
Output characteristics (Contd)…

• The voltage at the base with

respect to ground can be
determined from

Collector–emitter loop.
 3. Emitter-Stabilized Bias
Configuration
Advantages
 The circuit is simple as it needs only one resistor.
 This circuit provides some stabilization, for lesser changes.
Disadvantages
 The circuit doesn’t provide good stabilization.
 The circuit provides negative feedback.
Emitter-Stabilized configuration(Contd)…
Example 3
• For the emitter bias network of shown below
determine:
(a) IB, (b) IC, (c) VCE
(d) VC (e) VE (f) VB (g) VBC

Figure 3.29: Emitter-stabilized

bias circuit for Example 3
Emitter-Stabilized configuration(Contd)…
Solution
Emitter-Stabilized configuration(Contd)…

Saturation Level
The collector saturation level or maximum collector current for an
emitter-bias design can be determined using the same approach
applied to the fixed-bias configuration:
Apply a short circuit between the collector–emitter terminals and
calculate the resulting collector current
Emitter-Stabilized configuration(Contd)…

EXAMPLE 4
Determine the saturation current for
the network of the above Example.
Solution

This is about three times of the level

of ICQ for the above Example

Figure 3.30: Determining ICsat for the emitter stabilized

bias configuration.
 Load-Line Analysis
• The load-line analysis of the emitter-bias
network is only slightly different from that
encountered for the fixed-bias configuration.
• The collector–emitter loop equation that defines
the load line is given by;

Load line for the emitter-bias

configuration
 4. Voltage divider bias
The name voltage divider comes from the voltage divider formed by
R1 and R2. The voltage drop across R2 forward biases the base-emitter
junction. This causes the base current and hence collector current
flow in the zero signal conditions.
Assume that I2 > 10IB.
+VCC
R2
VB  VCC = 𝑉2
R1  R2

IC RC VE  VB  0.7V
I1 R1
VE
IE 
IB
Output
RE
Assume that ICQ  IE (or
Input
hFE >> 1). Then
I2 R2
IE RE
𝑉𝐵 − 𝑉𝐵𝐸
𝐼𝐶 =
𝑅𝐸 72
 4. Voltage divider bias (contd). ..
 From equation of IC above voltage divider circuit is almost
independent of transistor parameters and hence good
stabilization is achieved.
Base input resistance. (1)
VCC VCC

VE  I E RE  I B (hFE  1) RE
VE
I1 R1
IC RC
I1 R1
RIN (base)   (hFE  1) RE
IB
0.7 V
IB
 hFE RE

I2 R2 I2 R2 IB RIN(base)
RE
IE
RIN(base)
 4. Voltage divider bias (contd). ..
Base input resistance. (2)
R2 // RIN (base)
VCC VB  VCC
R1  R2 // RIN (base)
R2 //  hFE RE 
 VCC
R1  R2 //  hFE RE 
I1 R1
IB
VB
REQ
 VCC
R1  REQ REQ  R2 //  hFE RE 
I2 R2 IB RIN(base)

74
 4.Voltage divider bias (contd). ..

Collector-Emitter Voltage, VCE

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 + 𝐼𝐶 𝑅𝐸 𝐴𝑠𝑠𝑢𝑚𝑖𝑛𝑔 𝐼𝐶 ≅ 𝐼𝐸
𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑅𝐸 + 𝑉𝐶𝐸
→ 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 + 𝑅𝐸

RE provides excellent stabilization in this circuit.

Suppose there is a rise in temperature, then the collector
current IC decreases, which causes the voltage drop across
RE to increase. As the voltage drop across R2 is V2, which is
independent of IC, the value of VBE decreases. The reduced
value of IB tends to restore IC to the original value.
 4.Voltage divider bias (contd)…
Stability Factor
 The equation for Stability factor of this circuit is
obtained as

If the ratio R0/RE is very small, then R0/RE can be neglected

as compared to 1 and the stability factor becomes

This is the smallest possible value of S and leads to the

maximum possible thermal stability.
Load line for voltage divider bias circuit.

IC (mA)

VCC 10V
25 IC (sat)    20mA
RC  RE 260Ω+240Ω
20
Circuit values are from
15
Example2.
10
VCE (off )  VCC  10V
5

VCE (V)
2 4 6 8 10 12
77
 4.Voltage divider bias (contd). ..
VCC
I C (sat) 
Circuit recognition: The
Load line RC  RE
equations:
voltage divider in the base VCE (off )  VCC
circuit.
Advantages: The circuit Q-point Q-point equations (assume
values are stable against changes that hFERE > 10R2):
in hFE.
R2
VB  VCC
Disadvantages: Requires more R1  R2
components than most other
VE  VB  0.7V
biasing circuits.
VE
Applications: Used primarily to I CQ  I E 
bias linear amplifier. RE
VCEQ  VCC  I CQ  RC  RE 
 Example1 (1)
Determine the values of ICQ and VCEQ for the circuit shown in Fig. 7.15.
+10 V R2
VB  VCC
R1  R2
4.7kΩ
 10V   2.07V
22.7kΩ
RC
R1
IC
3 k VE  VB  0.7V
I1
18 k  2.07V  0.7V  1.37V
IB Because ICQ  IE (or hFE >> 1),
hFE = 50 VE 1.37V
ICQ    1.25mA
RE 1.1kΩ
R2
I2
4.7 k
RE VCEQ  VCC  I CQ  RC  RE 
1.1 k
IE  10V  1.25mA  4.1kΩ   4.87V

79
 Example1 (2)
Verify that I2 > 10 IB.
+10 V
VB 2.07V
I2    440.4μA
R2 4.7kΩ
IE 1.25mA
RC IB  
R1
IC
3 k hFE  1 50+1
I1
18 k  24.51μA

IB  I 2  10 I B
hFE = 50

R2
I2 RE
4.7 k
1.1 k
IE

80