UVM Mindmap 1704943887
UVM Mindmap 1704943887
Introduction to
UVM methodology
the UVM
Setting up UVM
UVM Object
UVM Component
Base class
library UVM Driver and UVM
Monitor
UVM Phases
Building a UVM
testbench
UVM testbench
architecture Running a UVM
testbench
Analysis and
reporting
Creating Sequence
Items
Sequences and
sequence Creating Sequences
generation
Starting Sequences
Connecting to
Sequencers
Stimulus
generation Sequencers
Arbitration and
Scheduling
UVM reporter
Scoreboarding
Checking and
techniques
scoreboard
Coverage
Collection and
Analysis
Creating Register
Models
Register Modeling
Connecting Register
Models
Register Testing
and Coverage
Acceleration
Techniques
Testbench
acceleration and Emulation
Techniques
emulation
UVM Connect
Configuration and
Factory
Layered Sequences