EXPERIMENT NO, { (This page needs to be fi Aim of the Experiment: Applica ang amps ithe lled by pencil only) - 7 - 2 Oh Eircry, Me poem b dn gab ern onbiotant Apparatus/Equipment used: Rumater 40K, Regulated — Re on ow Auth wie VOR, 0, Shana o wey, Circuit Diagram: 4) Ada = Si) Lubteneton - & ta v “S- Resul/Outcome of Experinient: Wa Agu adi d, Ue 1 Pephie, Ue nes weepliiee > uaktaroten 2 duty (ox Ohm - 4), op amp 44, ay | “Y fuuetion oes OM eting Abela, pi ey Vw. ANG ' ie 8 Gut bude Ga) Debord ote = NOK r we S-av | = Oiotue | ' | “ys | mp > &4y J LOL ba 4 ag 4 =Ditterentiato: essta plifier is replaced by capacitor «it forms an inverting differentiator . The output of the circuit is the seevative of the input. Gain of the differentiator increases with increase‘ frequency which makes the circuit unstable. This is the drawback of this circuit, high frequency it becomes unstable Differentiator functions as High pass filter. At and breaks into oscillation, Input impedance decreases with inerease in frequency hich makes the circuit very susceptible to high frequency noise. dy, = RC UT Figure 4.Differentiator circuit PROCEDURE: wrel for adder and Figure 2 (a) Connect the circuit as shown in the Figu for subtractor. er supply voltages to pin 7 and pin 14 put voltages V) and V2. voltages and note the output. put on multimeter or CRO. (b) Apply pows (©) Apply the in (@) Vary the input (e) Measure the out (Verify this output with theoretical equation. Observation Table ‘Summing amplifier (RFRI=10K) Vo= - Re /Ri (Vit V2) 10 ~ 6.01 ee —12 UR voli WP volt i vie vav) 5 5 5 4 5 5) 5 2ot ” vor whut t ° ' : dopo on oy? worenge wane oh i yd ober “ L Yaa # i don Muatorredat ) i ‘ol Ve=ReRi (VeVi) V2 5 0 5 391 | 4 2 [5 | 310 | EE ae 3 —— 5 I 24 Jj Integrator Oumursianat | Square wave Fig 3. Output waveform of integrator Differentiator Fig 4. Output waveform of differentiator Studied te OF priaation hep oup:PRECAUTIONS: 1. Do not connect more than #15 V at pin 7 and 4 of op-amp and don’t forget connect the ground pin of supply to ground of the op-amp circuit 2. The wires should be connected properly to the bread board. 3, Measurement should be taken properly. 4. Properly ground the circuit VIVA QUESTION: 1 Explain the concept of virtual short-circuit and virtual ground? ane J ‘Ans: ViMunl Lhoyt ebrcudk too (ondliion ‘{ w oth ond w ws ir. such os ow spo in utr cmp ust {youll thomete oun vou by ot nade 4 te oro dat ws et otiol wut aut oa dieu | Joop and closed loop operation of an op- amp? Explain the meaning of open i ALALDO-EK ba me Pena e ra f eer] tht oe He 4 tu fosbbuek rust ut ued Ee dou Leep gave - 5, What is a practical op-amp? Draw its equivalent circuit ult Ans: Aw Op We On Uw tock Heo Jakes oo dU" | wedtog app ond produus 0 Und vodka OP +Vee Ve va vy Ave Vee 4. Why a resistor is shunted across the feedback capacitor in the practical integrator? Ans Ty dapat coun I HL fusbeck ai -| tex sia eine at tak gpa Ht ardare tor 9 TU (to vue UH teed vu Lert UL ae fudbeak oe orWhat are the application in which integrator is used? Ans) Trtep voto ciyeuik us ynedty vid on snoig dio, analog do sigital MRL anal “pong rots el Atle ; . | Marks obtained Name & Signature of Faculty beeEXPERIMENT NO. A (This page needs to be filled by pencil only) ppowronl {mpqin Pur Aim of the Experiment: Mensur 4 f : arm, CHAR, Stow is Common wed jun oy forms a mode gow i Rout apo (ik 2), - ante (fe-141 ) tutta ‘Apparatus/Equipment used: 4 ii Ai amend wud power “apy » Punekion qenanater Circuit Diagram: = faye ntnt es me Vo Bh (yew) herd darn v : i Result/Outcome of Experiment: PHxM™~utore of obinabbial fupor : co, } f “ti :1. Common Mode Rejection rate (CMHRY (1) Connect the circuit as shown in figure 2 apply samme sngit ter both tnpeat terminals (2) Measure the output voltage, find Common more yaw G) Apply different V) and ¥; inputs (4) Measure the output voltage, find differential gain (5) Lind CMRR using CMRR fin dB= 200g 0A/Acm /P | frequency(Hz) Result: Pormmudir, s tp Oaup vs wuned Precaution: 1) Make connections proper. 2). Check supply voltages are proper 3). Make sure CRO is calibrated.Viva Questions: 1. What is the input impedance of a non inverting op-amp amplifier? Ans The, 1? trnp darts of Oo won- win aa Jaws us ugh ty 9 UL T/P Cmpedanus the (4 Ur Ob bp wodifud tas fiutbece no 2. If the open loop gain of an op-amp Ws very large, does the closed loop gain depend upon the extemal components or the ee amp? ‘Ans: TRE, Oonasal et Un an Oe keg ed tatuaa! | tow a pin . eee tae ‘tae a d ttl feta spe w eat rere ou 3 Define common mode rejectidn ratio, Ans: Carmine ¥ a COMRL) we “tae roti t He Conn yode wna Weds pu CHRR> Ad t eth “Rom 4. Explain the meaning of open loop and closed Joop operation of an op- amp? 7 ty rasnns thu da we feelh Ok: whe os Uoud Sptakion wus tue uy Adan bl M fete wihicd, us [Malbock cinco Ma sup 5 What is a practical op-amp? Draw its equivalent ant ans: ARK bhuuchional vehi ap ane raat ets tube eae Up cd Vasige a i: P be Alnglitnde uw + Me Vd Vouk - yy Ave Vee Marks obtained Name & Signature of FacultyEXPERIMENT NO. 5 (This page needs to be filled by pencil ‘Aim of the Experiment: (waxnervcictses 0) GIT! OST im vanes ‘enfin (auch af CEPCS , CB/OG, CC/ CD). “to plot wa usa tae input cod cut fut cum acters, er ony tation tw Cowumon LAM LOC Apparatus/Equipment used: Thasiator cho fovmeetinme Lott Gnd Power ty Q only) wenetoccste Kit, Mabtiwata =— Circuit Diagram: won Result/Outcome of Experiment: Ti ound, ut ut craroscnicnis 4 se commen OWL Ot refi potion bs fisted und shudied !EXPERIMENT NO. 3(b) ‘AIM OF THE EXPERIMENT: - Characteristic of BUT: BUT in various confi CEICS, CBICG, CCICD).To plot and study the input and output characterist common-emitter configuration. of BIT in APPARATUS REQUIRED: - Transistor Characteristic Kit Multimeter, Connecting Teads and Power Supply “THEORY: In common Emitter configuration input is applied Betti base and emitter Hae matput i taken across emitter and collector. Thus the emitter forms the vaveat common to doth input and output circuits, The load resistance is connected at collector. CIRCUIT DIAGRAL OCED! {ayConnect the circuit as per the circuit diagram. Input characteristics a Keep emitter - collector voltage constant by Vary emitter-base voltage in steps fand note down base current > nec) Readings are tabulated and graph is drawn. . Output characteristics a) Keep ase current constant. B) Vary collector-emitter voltage in steps and note down emitter 2) Mar.) Readings are tabulated and graph is drawn rations (such as OBSERVATION TABLE: Input charact(Vee=Cons.) ‘Output charact. (1b i Const.) SNo_ | Vbe(Vorts) | Tom) ‘VeetWoits) | Tema) a 1 WV 0 Ww o 5 mA 2 25 ° av do mA 2: sv SMA y 5 mA | a SMR \oW a0 \sv VomAapt na CoB sab sas CMa Upp db radon:RE! Te i ound oudput cimmuactiati o BIT Ww ain Cet asin wa fuatted antec DISCUSSION: With the help of output characteristics we can calculate ACE DC current gain in common emitter configuration. PRECAUTIONS: ‘a) Connections should be tight ) Handle the equipments with care Quiz: (QI: What do you mean ty biasing of transistor? Ans. THeutisten i ae bay wal ces do oon be tunmpli Sot what s de curd xin il commen imental common, hou Ans Ta CL, tera Books {Q3: What is typical value for d.c. current eran Ans. Th 8 DC (went ae ae us 0-467. (Q4: What is a.c. current ae in CB configuration? Ans Te tC. Guat qe iia C8 Woufiquantion ua 0-98 gsi What are input chara cmactes se eer na rao | Marks obtained Name & Signature of FacultyEXPERIMENT NO. Ds (This page needs to be filled by pencil only) Aim of the Experiment: PiutaL ee 1 aes din ke dkome Cet aang (tex = put qt Tate’ + { Uandt4 tmpud iXipubicae , TULUM, Ke Ancilysis 4 fey iy vetpente (smo £oUtee Liki, Apparatus/Equipment used: Pawoen “bbl, FET channetortene Kip GAME, tury Ma bi mccton a qeeeg aM > Amv sabi, Circuit Diagram: ak R 6 PS SR4stoK SRReIk set: | j jeueeal i a I ns , = irons Anise Areplifion CY out Sauplaraeutaauon Result/Outcome of Experiment: 0 nL consign iareae HuPonte 4 Comeau; Lounreeezor ‘te few tered (aata9e) womos (¥) sansereaaer s:uousoa\ [oTaeususs\seTTze9ded-1 Soros UeuUCD\Dz\(S-T) FaPTOS PED\:P } { \ eeResult Pnequeoey Auaponse 4 Conncow (ayConnections should be tight (b)Hlandle the equipment with care a Questions 1). tn practical applications, can we use this CS amplifier without having resistors R3 and R4 in thee creo Find ot the way 10 do the same, Any Ua PYMLRLeal opp Liceut om obsunte of Ry ZRy wile dU Jas eke ae tae wird Un bard COL, wun here fe Compromdide OM oe “4 Mobility acter. 2). What is the coed aaa OF CS amplifier? State coins where it ean be used. Gh com he uae cites & Ans ee Th a» ede eh reg mt hey ae u 3), How will u relate the effect Senie capacitance to 3db frequency? 8 Wat wht happen if you remove C from the circuit from input stage? ‘Ans TAL UP: epee nce Capes tL gain . owl Games it Ua tank ta SAB (AH. Removal opt cape wit expect HL openarnry eins & Vente, Aw vv: ak bi tee Oveuk 4), Analyze the effect of input coupling capacitor by vakying its value from low to high and heck the fr ON » ee nc) EC amg tn unt mgt He na a potatos Urb wr : Aw Lay Ke nueaidy ee fog apposed 1 5 Oxpaten ptacle Roo hoy be paar ehie 5), How does a common source amplifier behaves under varying load vi fons? ls ay bait he et cy pe allot tu vee Ae tae ate Alg id wun we fet acaagat vet run re Lod cee ah tp thw Okyrs Law Marks obtained Name & Signature of FacultyEXPERIMENT NO. CThis page needs to be filled by ps only) af herd Oy Alone wad We ‘Aim of the Experiments | i uty Apparatus/Equipment used: & ( Coupled Awl 4 Aunt uy and Power V ( Circuit Diagram: \ . Lo je 3 | L . be fF RSz100 Jn } 1990 | at . PO Ao yph sab Awl ‘oe Pu teat Sept MUEt ARE esult/Outcome of Experiment: Fagus hupeute og dongle dtmye halide : ts ae,__ez0z_'90 sune seaea pztotieg towts a ea | —abes ZHWOOT ZH 2 . (zreo)a @ (ZiTOVA e (Zt6wWA _ foe ar zu00T 2HHOT zHHO'T 2HOOt ZHOT 2HO"T el = noResult- Frequent Retpone ct dingl those fees semper vg WER Pree 1. Use appropriate command for analysis. 2. Pat voltage, current and power marker at appropriate places. 3. ldemtify the nodes correctly in SPICE netlisting. 4. Choose voltages carefully for analysis. Viva questions Q: How the frequency of a function yenerator is controlled? — wt jude of wad Ans: TAL {yey Mo Cavddro Usa 4 Aa wate! dunt — dsiug Ee ait Sn eS fe ADH ee Ans:. pet ko wointotin aw OL PY ‘ ipa te ws od ns b Changs conaleta wes yup Q —— ofa regulated pos ae supply? - fas tsi, SULiLOW vURkifr i Sa le ma gens @ vache tg ra aT (ro ; Ans: Vilkuge Xe OU a power apply . vst et AN “UA ni ae ae uur di Q. what is breadboard? Ans. eee rosalean vis @ vel pif eee o pas mith fer rn se iseut caltoure Camp ae bs semua, 3 Q. What is the difference between active and passive ete Ans. Rafiuy Lomtoncnks Ut pode ip om euebvic tireudt , cayurst dulimpe pad > Do dew Marks obtained Name & Signature of FacultyEXPERIMENT NO. Is to be filled by pencil only) (this pay Aim of the Experiment: Apparatus/Equipment us Cireuit Dia: Ur uaat vara fox Ww Swe Avlaiar Result/Outcome of Experiment: SAMA LAL OLeLLL>tCireuit Diagram: OFFSET NULL 1 st] xc INVERTING INPUT 2 7 ve NON-INVERTING INPUT 3 6 ouTPuT 4 s OFFSET NULL Figure! Pin Diagram Figure 2 Cireuit diag sam of Wien bridge oscillator Where C1,C2 = 0.1mF RIERIE1.6K.@ , RIM16K @, RA32K O Observation :Draw output waveform on graph paper with proper voltage a Frequency specifications. Procedure: 1.Connect the circuit as shown in figure? 2 Observe the waveform on CRO. 3. Calculate the oscillation frequency practically and theoretically Caleutation: f= s-9¢ Put the value of R and C and Calculate value theoretically. Result: Simseldal areitiete us MaticPrecaution: 1, Make sure that there are no lose connections. . Handle the IC carefully. 3. Voltage and current must he kept in a specific limit. Take care of no two unwanted wires are shorted to each other. Viva Questions: 1. The Wein bridge oscillator requires the external phase shift of? Ans Kum Sure ‘What i barkhgusen criterion? 0) Pouk ty ctsced sop ain us (ual de L |AB/= 2 Ans gy Fans, ta clave Aeap pase are Aqua to0'd 360" Difference between RC Phase shif osillator and wein bridge osilatoy Re phos 7 Ue Bi ps UsaRer bow pry 6 mi ee > Gh cap we Ga Unt liap un used - a How j ‘he gona condition for zero phase shit vein bridge os orm is achieved? vin as VELL Sear ee pas ). Whe the other name of sinusoidal oscillator? Tamed Uti Wrillobou ow 4 aie GF). Ans aes : aio frye ( ¥ Marks obtained Name & Signature of FacultyEXPERIMENT NO. 1. this page needs to be filled by peneil only) ‘Aim of the Experiment: “4 4 mame Lusi ui ycacnal ss dot ortaterr AL Apparatus/Equipment used: TOTAL, tonnveliny ods, Buadbaaed, Vb “fl CRO, Redreter , eee pl Circuit Diagram: § nua, hour j unatrr ue Result/Outcome of Experiment: Don- Arend aidad ofcrllat or Rats seudieslpoquey 4 elation = c ein Proedicnh ware qa 408 Ave Theprrtiech valour of “4 Se _ Tn ATK X OURO y bg — Ghar 33HWavetnnins Procedure (Astable): 1, Switch OFF the power supply. 2. Connect the componentsequipment as showa in the eireuit diagram 3. Switeh ON the power supply, 4 Connect the input to the channel-1 of CRO and output to the ehannel-2 of CRO. 5. Set up the circuit alter testing the components, a Setup the square wave generator ns shown in figure and observe the output wavetorm and note down their amplitudes and frequencies, Results Now = Sus eal Ofer Uber Aauey Ben dle dica Precautions: 1 Make the connections according to the cireuit diagram 2. All connections should be tight. ¥ The voltage level should not exceed the limit 4 ion should be checked before switching onVIVA QUESTION: 1. What is a square wave Generator? Ans 4 equ, wane qe Ut ow Wstion wieuit whole Powis AUS wd What are the applications of square wave generator? Ans | ae pa ud by Cod al ronaing of Mperation ie Joy thiwad © 0 Fre nite ud teat Pau fom empl: layup te cymblie comtrel Yry stem Which type of feedback is used in square wave generator? Ans syne jaan ia Whol UW Aqua we a |. What is pulse and square wave generator? anctagand pu Ua Us On UALTEMWe Goreut ratte oa Lh) HULA tyne tame masta tt Sqm WOES, Which IC is used in square wave generator? ‘Ans Op wmp Ie -741 Marks obtained Name & Signature of FacultyEXPERIMENT NO. _! (This page needs to be filled by penal only) Aim ofthe Experiment: fiw Labs Ow 4 Uadtuiky dada oe cas [ab awd wuarrrmnent af awd. AM au wana tab eae on whe ad “ae HAY a a UL, 4 a uy May aaa. Apparatus/Equipment used: 1 PICE Sofhons Circuit Diagram: re =F love, Voip ov ia wv yun a0 0k | Result/Outcome of Experiment: ¢ iwulpdion, 4 eee ui eutb uy the be )ee: ——__. £202 *60 sune :exeq 40 “goby “Am90T Mas ‘aug t= | | ay T awoot | (earaoe) edxs (vy Ov ig teanaersduer 9v52S78r €2/60/90 tunz ouTLjeaeq ZemoTTos soznos,Rs 4.0 6k (246 Lut RL. 6.0 60k model mos! nmos (Kp=50m Vto=ly lambda=0.01) m1 3244 most Vad $0 DC 10V Vin 1 0 sin(0 100m 1000khz) op tran us 10us Ous 0.1ns probe end Result: a) Input Voltage faquns 4 a eee dapat woctege Pobk Vin = (00 mV Punk’ Vins 200 mV- b) Output Voltage Page 8 ene fw Peok Vout loomy Pew! Veut = KoomV b) Output Voltage mye sna autput woltoge unk Vout = 100 mV Peak’ Vaut = 200 mV.VIVA QUESTION: 1) What is the full form PSPICE? Ans. Posowal Aimulstion Paerom with, aces Cyt | Cpa 2) What are the characteristics of Source Follower Circuit? ! Ans. 3 Be Odors ea Kanteen woven 4 uo Jule A, ay te uy tmpedlenen " Gnd a dol oP an 3 3) What are the advantages and disadvantages of Source Follower Circuit? Ans. feuanruge 4 4 Ch prewely Curt ond Powe leas eee te ue Met Me eels dee 4) Write the applications of Source Follower Circuit? Ans. 3 Ack OL Lie Campi fier » 3 tutu, vpifeai wutiouk velbe I 5) Name the software’s used to simulate the analog Circuits. Ans. Popice , LTSPICE- Marks obtained Name & Signature of FacultyEXPERIME nT NO. !2 ge needs t0 Be led by pencil ond) This pa | | Au Atul bw 4 ii i. o oyouw { ‘Aim of the Experiment? i a a wm a Apply » 0, pou, VOR 4 Al eatus/Equipment used: an Quate i onyseend W hua ¢ = Circuit Diagram: — tan | | | ft ve | q be - | | ; PR aR} ve Pea! - Leh ei | ae = a Ly U Mait caine D-A - Result/Outcome of Experiment: Bigitor ro thy Lewwurtue da pagerGoepuutmntat Table! * hiatnune IRA Aue: uu Ue 6 1 a 3 4 5 6 Blmary de aul augut’ Vall v 000 5 ool 5 O10 5 ol 5 100 5 Lol 5 S llo vel Vv uldage V 0.00 O105 1:60 oS 5.00 (605 4140 Pato lution, 01694 6495 6.625 0695 6625 Ob 9G 016as 7a 4, v0, —rr, & by fe . 7 +L) " _ ve Higure 2 Cirenit diagram of DA converter ‘Connect the circuit as shown in figure, \ 2. Change the position of switch , to make different combinations of Digital value 3, Plot the graph. Viral Links https! tabsiithipsac lvisacinewhabs20200 tabiithsnAtyenp LaAveightedressbit Nem Observation: Draw output wavetiom on graph paper with proper voltage specifications, Cateulation: Oy, lat dude Result: sigitns ity 4 Comeau poyrose Precaution: — 1. Make sure that there are no lose connections, 2. Handle the IC carefully, 3. Voltage and current must he kept in a specitic limit, 4, Take care of no two unwanted wires are shorted to each other,Viva Questions: 1 ADAC comerts an digital input signal toa analog output rue False 2. The equivalent weight of LSB in a four-bit variable resistive divider D/A converter is ae Ms 18 ans, 3. What is used to represent the signed magnitude? se 1s ‘None ofthe above: caf Boe tf thy ab ou Ac Detemnine the rescaton and full scale output of 4-bit weighted resistor DAC with a reference of 10 als. Resolution=1.25V, Full sale volage=18.75 V Resolution=2.5 V Ful cae vetage=18.75 V tones V, Full scale voage=18.25 V Resolution =25, Full scale votage=18.75 V «Ae a tt ang DAC conve has 2 ere of 5 OS Wha the ag ent ‘the input code (83, 82, 81, BO) = 0010. Laas 0.765 0.938 0.938 1 Marks obtained Name & Signature of FacultyEXPERIMENT NO. lo (This page needs to be filled by pencil only) Aim of the Experiment: mets ‘| LO ote tiie | Hvth ity if ae mt Lomnsadieg Di, brah al, toa, Apparatus/Equipment used: et ’ dion 4 winston, thy > CRD, Rest OU, Copubidat, Luduet ou > F ued 4 Circuit Diagram: | Coot | Cae ofr {|__| = 1} T | Le dH | oer in) py OA, Udon, Result/Outcome of Experiment: | (atu tater, how bun tududColoutabion + - TG G1 e,*¢2) -6 ae 2x10" SO xo D o Deak 40: 1 KOT ae *(a kta (eat Tawtaoen reer nio$ 2 Sxlot He1 stea 5 weer ADPIZEIZ LZ “nneetete: uz 90 Tune ewyi/exeq T30td 4,Circuit Diagram: OFFSET NULL Ne INVERTING INPUT ve NON-INVERTING INPUT. ouTPUT v- OFFSET NULL Figurel Pin Diagram of 741 op-amp 100K 50%, el +1gv to l asy o 4 Colpitts oscillator Hartley oscillator Figure 2. Circuit diagram of LC oscillator Observation:Draw output waveform on graph paper with proper voltage a Frequency specifications. Procedure: ].Connect the circuit as shown in figure 2. Observe the waveform on CRO. 3. Caleulate the oscillation frequency practically and theoretically Cateutation: — @ > 5 x 109 He Result. Le asaplatern tut hun studied.Precmution! 1 Make sure that there are nu lose connection 2) Hanedle the 1C carefully, § Voltage and current must he kept in a specific limit 1 Take care of no two unwanted wires are shorted to each other Vive Questions: 1 The 1 oscillator requires the external phase shift of? Any ThE LC Ofc LUO Sty Be etucnal proue obit % 360 tpt ‘ What is barkhausen criterion? Ans i) Tae Lwep yr Abe L ai) Moaed tanh phous abate (qua bo 360° 0% 0° Difference between RC Phase shift oscillator and LC oscillator. ans RC plasr Abit sr Lnbory ade cu for “al LC paws shite coker vis vol Yr ola aa What are the applications of LC oscillator ? Ans Rudin tnd TV dU mae ougpbocacions 4} LC b4illater What is the other name of sinusoidal oscillator? ans Also Kumar Ou RE ocei ttt. Marks obtained Name & Signature of FacultyEXPERIMENT NO. 3 (This page needs to be filled by pencil only) Aim of the Eaperiment: Suge ‘\ ey tie pig Uk sui, spe aap Pe TH) Apparatus/Equipment used: t i b te t Hi Hore )OPeroup (UE HH), tay uote BC punwt ape if seston ees, wo, Wucdhimetow , deca bensul 2 foveal waive Circuit Diagram: =—_— \ in | Lop +V ye 4 | Py tiie sy poop = Resul/Outcome of Experiment: Uni ye Ow Aiken Civeute “a p vu De 14 | uy deci gn(1) Make the connection aceording to the circuit diagram as shown in Figure | (2) Set the function generator for sinusoidal voltage in the range 100 m V tol v. G) Measure the output voltage (between pin 0.6 and ground) for different input voltages (4) Observe the waveform at the output pin which is same as input signal. (5) Prepare the observation table as given below: Observation Table She eae wane | asvalvs wf ov “Tinutsidat} = VW Hinasoidod ev Hinuortdel | t av Atrussiool ot vnitg oe vepliia tivtuwt Us tat gas. PRECAUTIONS: (1) Do not connect more than +15 V at pin 7 and 4 of op-amp and don’t forget to connect the ground pin of supply to ground of the op-amp circuit. 2) The wires should be connected properly to the bread board. (3) Measurement should be taken properly. (4) Properly ground the circuit.1. What is the input impedance of a non inverting op-amp amplifier? i Ans Tar T/P een 4a oo tue how Hise OF wie do he TP (+) cpu Lumina va tu op amp mod al ly # sabes ew 2, Lethe open loop gain of an op-amp istvery large, does the closed loop gain depend uupon the extemal components o the op-amp? Ans The @laatd Le ln we! upon thw Dery Lorn povuint bs tae Ceded Lea sh cituumimed desk Wit ok wee us © oa tak Of Cocke Comps ae Ay ps Rawator A Leportier Defirle common mode rejection ratio, s Common mode vgulbae yatin wy tue voto 1 commen “mode pr to dw hi pen ecal made quin Cenk = Aa / aa 4. Explain the meaning of open loop and closed loop operation of of an dag amp? Ans tn Loop spiral n wiles Hue U4 eLelb Oth When Cy chased iaopaphet on” wt naae we hud 9{ (urab-| mek whith Us ke und tu Wuput 5. What is a Hee ae rel its equivalent circuit = fe of ake | tiveuit black chat Lants Oo vant ge oP Areas OL singe emul: Olt. +Vee a “a Vo r Jee | Marks obtained Name & Signature of FacultyEXPERIMENT NO. 4_ (This page needs to be filled by pencil only) secre 1g Ge co Apparatus/Equipment used: ¢Ro (Oust trae), Se 4y 9» BO beat Pour atta , RestOU F=100KA, Duet Bei NHooT, Coverage Circuit Diagram: vi A ca = operator samplifiag =e 4 =e = Gnd Arnlye Dayan sawplif oe - Result/Outcome of Experiment: Tye ampliten cur out a speomp £¢ Hl wea OBSERVATIONS: a Logarithmic amplifier ‘Anti-logarithmic amplifier “Input voltage(V) | Output voltage(V) Input voltage(V) Output voltage(V) oo (= 0-354 = 0-354 0 98 a = 0-340 = 034 Ud CALCULATIONS: For Logarithmic amplifier Ue = fut {lu (x) — In (RU) - a For anti-logarithmic amplifier vy =—Ri, Up = —RI,e-7/F2T, RESULT:. Ci See he wach Wy wit ving *p- ouup PRECAUTIONS: 1) Make connections proper. 2). Check supply voltages are proper. 3). Apply de input voltage only. 4). Make sure CRO is calibrated.Viva Questions: 1) How to pro ie saturation cumrent andl temperature compensation in log-amp? Ans ny) input omel vetfoencer vottow Ta porate fe ~ X 2) List the applications of Log and Antilog amplifier Ans Ss THC RMS Ah Lttion covuuety ~ Cattulete 46 Vote *t ao quen quontis 3) Explain any one application of Log and Antilog amplifier Ans Tyut RMS detlekion curuuity > We Ag iu uo do weacu Avquad drei > esto cmb We ts beh Ln ty ur AMS diteebion cr uta 4) Draw the temperature compensated log amplifier. Ans 5) What is the disadvantage of log-antilog multiplier? Ans bey five veequuce Une YP oud fuente vethog. to be of Mu some cat Marks obtained Name & Signature of Faculty