What to prepare for Digital Profile

1) Verilog HDL
1.1) Verilog tutorial Lectures by ISG sir available on YOUTUBE.
https://www.youtube.com/watch?v=FWE0-FOoE4s&list=PLUtfVcb-
iqnEkuBs3arreilxa2UKIChl
Note: Watching all the lectures till lec 41 will help you in implementing a mini project on
Verilog implementation of MIPS processor.
1.2) Verilog HDL by Samir Palnitkar (Recommended Book)→ Chapter 2 to 9→ concepts are
explained in very simple language.
1.3) (imp) Verilog event queue model:
http://hellovlsi.blogspot.com/2014/05/verilog-stratified-event-queue.html

Additional Stuff:
Sunburst Pdfs: Name of Sunburst pdf for FSM ( The Fundamentals of Efficient Synthesizable Finite
State Machine Design using NC-Verilog and BuildGates ), Sunburst pdf for Event queue model (a
must must thing to read) + Pipeline reg topic explained very well when using blocking and non-blocking
statement. Name of Sunburst pdf (Nonblocking Assignments in Verilog Synthesis, Coding Styles That
Kill!).
Do practice frequently asked Verilog codes→ like synthesizable Verilog code for sequence
detector(both mealy and moore), Fibonacci sequence, count ones in input data, gray counter, binary
counter, D FF(both sync and async), Bit reversal, swapping of two numbers.

2) MTP Project: Your projects(MTP, B.Tech/B.E., course projects) that you want to put in your
resume. You need to do this thoroughly. Don't procrastinate it till end as you will be in a lot of
pressure at the end.( Choose your MTP guide wisely)…

3) DIGITAL VLSI
Digital IC Design: 1. Rabaey sir Lectures (25) or 2. NPTEL IITM (77) (Janakiraman sir).
I watched both Rabaey sir Lectures as well as Janakiraman Sir lectures.
https://www.youtube.com/watch?v=aqQRbFiua48&list=PLC60146B6E190630B
https://youtube.com/playlist?list=PL3pGy4HtqwD1X9CXdgXMTVGjb7rYd-qr6
My suggestion: for Internship purpose, go through Janakiraman sir lectures very well.
They are conceptual and easily understandable. then after you have to refer only rabaey
sir lectures for memories(as it is not covered by janakiraman sir).

4) Static Timing Analysis

3.1) Setup time, Hold time, Setup slack, Hold Slack etc(i.e. STA) from vlsiexpert

Section 2.1(Timing Paths) - Section 4b(Setup and Hold Violation_ Advance STA (Static Timing Analysis
) _VLSI Concepts) is only important from placement pov I feel

3.2) Numericals for practice→ https://vlsi-backend-adventure.com/sta_numericals.html

3.3) Some important topics to go through are:

1. Reason for setup/hold time in FF.

2. Latch setup/hold time.

3. Scenarios under which setup/hold time is negative or positive.

4. Time borrowing properties of latches. (Very Important).

5. What does static stand for in Static timing analysis (STA).? What is false path? What is multicycle
path? What is dynamic timing analysis?

6. Effect of skews (positive and negative) on setup and hold constraints.

7. Setup/Hold time equation in presence of jitter.

8. remedies for setup/hold violations

Additional Stuff:
If you want some extra information you can also see 10videos lec series on STA from “TEAM VLSI”
Youtube channel. On same channel you can read about crosstalk (2 lecs as far as I remember).

5) DigiQ pdf→ most imp for both written as well as interview. Do practice it twice or thrice before
written & interviews. Questions appear directly from it in placement.
6) CDC(metastability, Synchronizers, FIFO….)
(i) Synthesis and Scripting Techniques for Designing MultiAsynchronous Clock Designs
(Sunburst pdf)
(ii) Simulation and Synthesis Techniques for Asynchronous FIFO Design(sunburst pdf)
(iii) FIFO Depth calculation MADE EASY pdf

Apart from above three, do refer youtube videos by Karthik vippala for handshaking based
synchronizers, mux based synchronizers, reset synchronizers.

NOTE: do spend good amount of time in understanding the concept of FIFO. Most of the companies
ask complicated questions from FIFO.

7) VLSI Physical design→ refer lectures by Prof. ISG sir and do study VLSI CAD subject by
ASD sir carefully.
CTS is asked frequently in interviews.
Pay due respect to the PD issues like IR Drop, Latchup, cross talk, Antenna effect,
Electromigration & their remedies.
8) ASIC Design Flow: https://youtu.be/Y2PQzc9Gqsw
9) Clock dividers (div by odd, even, fraction) with any duty cycle.
(I) Youtube channel “Technical bytes” small videos will work
(https://youtu.be/TgsyQgliuYc). Or Clock Dividers made easy pdf.
(II) Keep in mind that binary counters, ring counters & johnson counters also work as
a clock divider.
10) Computer Architecture – NPTEL IITG (recommended Lec:1-5 and 13-16)
https://www.youtube.com/watch?v=4gojajnpOQ&list=PLEAYkSg4uSQ3dmkbCah82ek0KJnpz_Dx
L
Go through basic concepts like RISC vs CISC, Von neuman vs Harvard, single core vs multi core
etc.

11) Low power VLSI Design:

7.1) Go through LOW-POWER CMOS LOGIC CIRCUITS chapter given in CMOS by KANG
book ( faced many questions from this).
.2) Clock Gating(covered in 7.1 part but do from other sources also)
7.3) Power Gating
7.4) Low power youtube course by Ajit pal (Not mandatory! Even I could not watch). But
it cover some very concepts.

12) Testing and Verification: 1) DFT video series from electron tube youtube channel.
2) Fault analysis & Hazards from DIGIQ pdf
3) Just take overview of ch-16 Design for Testability from CMOS Digital IC book by Kang

13) Puzzles!!!!!!! → Puzzles from geeksforgeeks(https://www.geeksforgeeks.org/puzzles/)

Generally once you prove yourself on the technical side, some interviewers start asking puzzles(
sometimes, puzzles become the reason of your rejection).
14) Synchronous vs Asynchronous Reset(Very Imp)
1) Verilog code for both
2) Which one is preferred.
3) Why reset synchronizers are used in Asynchronous Reset.
https://www.youtube.com/watch?v=Wdzo_DpKKGA
( faced Same questions in 4 companies)
15) Miscellaneous Topics:
DSA using C→
Necessary:operator precedence in C, searching(Linear and Binary), Sorting( log2n
complexity based like quick sort and merge sort), POINTERS(in depth), Functions(call by
value and call by reference), arrays
Optional: Linkedlist List, Queue, Stack( specially prefix-postfix notation & evaluation
using stack), Trees( binary trees, Binary search trees .
Reference: Data Structures using C by Reema Thareja PDF.

NOTE: Preparation material and Strategy may vary from person to person. I have
shared what I had referred for my preparation.

Govind Sharma
21EC62R34
MVLSI(IITKGP)