Received: 23 August 2021 Revised: 16 January 2022 Accepted: 31 January 2022 IET Power Electronics

DOI: 10.1049/pel2.12264

ORIGINAL RESEARCH

Single-phase small capacitor motor drive system with

high-efficiency buck active power decoupling converter

Chao Zhang Lei Xu Xiaoyong Zhu Yi Du Li Quan

School of Electrical and Information Engineering, Abstract

Jiangsu University, Zhenjiang, China
This paper proposes a novel active power decoupling circuit (APDC) based on modified
Buck converter to reduce the DC-link voltage ripple of small capacitor motor drive sys-
Correspondence
Xiaoyong Zhu, School of Electrical and Information tems. The APDC is placed between the Boost PFC circuit and the DC-link, and has two
Engineering, Jiangsu University, Zhenjiang 212013, energy flow paths, and the sum of the power decoupling capacitor and the DC-link capaci-
China.
tor voltage equals to the output voltage of the Boost converter. With these configurations,
Email: [email protected]
the voltage of the decoupling capacitor can be precisely controlled to be the same as the AC
Funding information component of the output voltage of the Boost converter, thereby effectively reducing the
National Natural Science Foundation of China, DC-link voltage ripple. Another unique feature of the proposed APDC is that the induc-
Grant/Award Numbers: 52077098, 51907081; tor works in discontinuous current mode and only work for half of the time, which not
Priority Academic Program Development of Jiangsu
Higher Education Institutions, Grant/Award only reduces the current stress of power switches, but also further improves the efficiency
Number: PAPD-2018-87 of the proposed APDC. Then, an instantaneous voltage control method is investigated to
reduce the DC-link voltage drop, which significantly improve the dynamic performance
of the motor. The design guideline of key components is given in detail. The feasibility
of the small capacitor motor drive system based on the proposed APDC is verified by
experimental results.

1 INTRODUCTION APDC is an effective method to reduce the DC-link volt-

age ripple, which can improve the performance of SC motor
In conventional motor drive systems, a bulky electrolytic capac- drive systems [8, 9]. In existing APDCs, an added small F-cap
itor (E-cap) is necessary to buffer the grid pulsating power and named power decoupling capacitor is used to deal with the grid
restrict the DC-link voltage ripple to achieve higher motor per- pulsating power, which operates under a large voltage ripple to
formance and meet harmonic standards such as IEC61000-3- reduce the size of power decoupling capacitor. F-caps have a
2. However, compared with other components of motor drive ripple current capability of 1 A/1 μF, which is about 200 times
systems, E-caps have the shortest lifetime and poor reliability, than that of E-caps. In addition, the average lifespan of F-caps is
which are the main reasons for the failure of motor drive sys- 100,000 h, which has the same lifespan as power switches, such
tems [1, 2]. as IGBT, MOSFET etc. Therefore, the service life of APDCs is
Film capacitors (F-caps) have higher reliability and longer much longer than that of traditional DC–DC converters. And
lifetime than E-caps [3, 4]. Obviously, if E-caps are replaced by then, the APDC redistributes the pulsating energy of power
F-caps, motor drive systems will have higher reliability. How- decoupling capacitors to suppress voltage ripple on the DC-link.
ever, only small F-caps can be used in motor drive systems Therefore, bulky E-caps can be replaced by APDCs with small
due to volume and cost. No doubt, there is a larger voltage F-cap.
ripple on the DC-link due to the reduction of DC-link capac- Nowadays, there are three types of APDCs according to
itor, which will degrade the performance of small capacitor the connection modes between the DC-link capacitor and the
(SC) motor drive systems, for example, poor dynamic perfor- power decoupling capacitor, as shown in Figure 1. In these
mance, higher torque ripple, and higher total harmonic distor- three circuits, APDC is used to achieve power decoupling
tion (THD) [5–7]. between the grid and the load, and Cd and Co are power

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the original work is properly cited and is not used for commercial purposes.
© 2022 The Authors. IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology.

738 wileyonlinelibrary.com/iet-pel IET Power Electron. 2022;15:738–752.

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ZHANG ET AL. 739

to the manufacturing process, tolerances etc. Thus, [19] esti-

mates the capacitance of film capacitors online according to the
error between the gird power and motor power. Furthermore,
an adaptive power decoupling method is applied in a mismatch
split capacitors converter to reduce the DC-link voltage ripple
caused by the fundamental ripple power in [20]. In [21], Buck-
boost converter with 68 μF film capacitor and Boost converter
with 1 μF film capacitor is combined to reduce the DC-link volt-
age ripple, where Buck-boost converter achieves high PF and
Boost converter is used to control the grid ripple power. This
converter further demonstrates APDCs with mismatch DC split
capacitors can also effectively eliminate the DC-link voltage rip-
ple. However, the DC-link voltage in these APDCs is much
greater than the grid peak voltage, so it is not suitable for low-
voltage applications [14, 22].
FIGURE 1 Structure of three APDCs In the third type of APDCs, the power decoupling capac-
itor is also connected to the DC-link through APDCs. Dif-
ferent from the first type APDCs, the decoupling capacitor
decoupling capacitors and DC-link capacitors, respectively. In is also connected to the output of the rectifier [23]. In other
Figure 1a, all of the grid ripple power is absorbed in Cd first, words, this type of APDC is placed between the rectifier and
and then released to Co to reduce the DC-link voltage ripple, the DC-link, which isolates the grid voltage and the DC-link
which lowers the APDC’s efficiency. Different with Figure 1a, voltage. Some APDCs are proposed according to this operat-
only part of the grid power in Figure 1c is stored in Cd , and ing theory. Cuk converter is also the third type APDC. How-
the rest of the grid ripple power is directly transmitted to the ever, there is only one power device in this converter, and how
DC-link. In Figure 1b, the grid ripple power is stored in two to deal with the grid ripple power has become a difficult prob-
decoupling capacitors respectively. Thus, the latter two APDCs lem. Although a peak and valley current controller is presented
have higher efficiency than the former one. to resolve this issue, the Cuk converter has low power density
In the first type of APDCs, the power decoupling capaci- due to large film capacitors [24]. In [25, 26], a PWM rectifier
tor is connected with the DC-link through bidirectional Boost is used as APDC. Different with [25], the decoupling capaci-
or Buck DC/DC converters [10]. This bidirectional converter tor is replaced by one LC resonator in [26], which is suitable
is the only power path between the decoupling capacitor and for current source converter. Obviously, these two APDCs suf-
the original motor drive circuit, which simplifies the structure fer from high cost and low power density due to more IGBTs.
of APDCs and makes power decoupling easy to implement. In To reduce the cost, an APDC based on Buck converter is pro-
addition, this type APDCs can significantly increase the mini- posed in [27], which can simultaneously implement power fac-
mum DC-link voltage and expand the motor speed range [11]. tor (PF) correction and power decoupling. Similar APDCs are
However, the DC-link capacitor of this type APDCs is directly presented in [28, 29], where a Buck converter and a Boost con-
connected to the output of the rectifier. There is always a larger verter are connected in series to implement power decoupling.
2ω voltage ripple on the DC-link, which cause a severe motor Yet, a bulky filter inductor in these APDCs is necessary to get
torque ripple and degrades the performance of the grid current high PF, which increases the volume of APDCs. Meanwhile, the
[12]. Moreover, this type APDCs reduce the motor drive system control strategy becomes more difficult due to cross-coupling
efficiency due to the bidirectional flow of the pulsating power control objects
[13, 14]. Although the third type of APDCs exhibit lower DC-link
In the second type of APDCs, the DC-link is composed of voltage ripple than other two type APDCs, this type APDCs
two small F-caps connected in series, and these two capaci- have lower efficiency because the energy of the decoupling
tors are connected with the output port of the PFC circuit or capacitor is repeatedly absorbed and released. In addition, there
the rectifier through APDCs [15]. So, this type APDCs can be is a larger voltage drop on DC-link under dynamic conditions.
regarded as single input two output ports converters. Differ- These are two urgent issues to overcome in this type of APDC
ent from the first type APDCs, these two capacitors all operate [30, 31].
under large voltage fluctuation. In theory, there is no voltage rip- Here, a novel third type APDC is proposed and applied
ple on the DC-link when the voltages of the two capacitors are in SC motor drive systems. The main topic of the proposed
complementary [16–18]. It is difficult to design the controller APDC is to achieve steady DC-link voltage even under dynamic
due to multiple control objects such as capacitor voltage, fre- conditions and to increase the APDC efficiency. The proposed
quency, and phase, so there is still voltage ripple on the DC- APDC is derived from the combination of the Boost type
link. Meanwhile, this type APDCs has higher requirements for PFC and a modified Buck converter, in which the power
the consistency of capacitors [17]. Otherwise, the voltage rip- decoupling capacitor and the DC-link capacitor is connected
ple on the DC-link will significantly increase due to fundamen- in series, and the power decoupling capacitor is used to deal
tal ripple power. Unfortunately, this problem is inevitable due with the grid ripple power. The novel APDC has two power
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
740 ZHANG ET AL.

flow paths between the Boost converter and the DC-link,

which provide more freedom to control the voltage of the
power decoupling capacitor and effectively reduce the DC-link
voltage ripple. In addition, the inductor in this APDC oper-
ates at discontinuous conduction mode, which increases the
efficiency of the proposed APDC. Modified instantaneous
voltage control is proposed to make the voltage of the decou-
pling capacitor track the AC component of the output voltage
of the Boost converter. Thus, the DC-link voltage can be
quickly and precisely controlled and a small voltage drop on
the DC-link can be achieved under dynamic conditions, which FIGURE 2 The power relationship of SC motor drive systems
can improve the dynamic performance of SC motor drive
systems.
The rest of this paper is organized as follows. In Section 2,
the topology of the proposed APDC and the operating prin-
ciples are introduced. In Section 3, the characteristic of the
APDC is analysed. Based on the characteristic, an instanta-
neous voltage controller is proposed. In Section 4, the design
guideline of key components is discussed. Experimental results
are provided in Section 5, and the performance of the pro-
posed APDC is assessed in detail. The last section presents the
conclusions.

2 PROPOSED CIRCUIT AND FIGURE 3 SC motor drive system based on proposed APDC
OPERATION THEORY

2.1 Power characteristic analysis of motor APDC, and a motor inverter. The Boost converter is used
drive systems to achieve unity PF, and the motor inverter is used to con-
trol the motor. The proposed APDC is used to deal with
Supposed that the PF of motor drive systems is unity, the input the grid ripple power and suppresses the voltage ripple
power of motor drive systems can be described by: on the DC-link. This APDC is composed of S2 , Cd and
Co , Ld , and D2 . Cd and Co are small film capacitors. Cd
pg = 2Ug Ig sin2 (𝜔t ) and Ld act as power decoupling components, which are
used to buffer the grid pulsating power. Co is the DC-link
= PM + Pc = Pg − Pg cos(2𝜔t ) (1) capacitor.
⏟⏟⏟ ⏟⎴⎴⏟⎴⎴⏟ It can be known form Figure 3 that the bulky DC-link
PM pr
capacitor in the conventional Boost converter is replaced by
where Ug and Ig are the RMS values of the grid voltage and the proposed APDC. The output capacitor of Boost con-
current, respectively. ω is the radian frequency of the grid. PM verter is composed of Cd and Co connected in series, which
is the motor power. pg , Pg , and pr are the input instantaneous is denoted as CBO . The output voltage of Boost converter is
power, average power, and pulsating power of motor drive sys- named as uBO , which is composed of ud and uo connected in
tems, respectively. series.
(1) Shows that pg consists of the DC component Pg and the
AC component pr with 2ω. If the grid ripple power pr are all
absorbed by the power decoupling unit (such as bulky E-caps), 2.3 Suppression mechanism of DC-link
Pg equals PM and there is no voltage ripple on the DC-link, voltage ripple
which means the motor has no speed ripple and torque ripple, as
shown in Figure 2. In contrast, the voltage ripple will increase It is well known that the output voltage of Boost converter can
significantly when a small F-cap replaces bulky E-caps, which be expressed as [26]:
will inevitably degrade the motor performance.
PM
uBO ≈ UBO + sin(2𝜔t ) (2)
2.2 Structure of the proposed APDC 2𝜔CBOUBO

Figure 3 shows the structure of the SC motor drive system, (2) shows that uBO is composed of the DC component and
which mainly consists of a Boost converter, the proposed the 2ω AC component, and can also be regarded as a series
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ZHANG ET AL. 741

TABLE 1 Control logic of the proposed APDC

PFC 𝚫i < −𝜹 𝚫i > 𝜹

S1 ON OFF
DC-link Δu > 𝜁 Δu < −𝜁 Δu > 𝜁 Δu < −𝜁
S2 ON OFF OFF ON
STATE 1 2 3 4

ever, the ripple voltage of uBO is much larger than that of the uo
and significantly increases with the increase of the motor power.
The voltage ripple of the uo only slightly increases when the
FIGURE 4 The voltage characteristics of the proposed SC motor drive motor power increases, which means that the proposed APDC
system can effectively suppress the voltage ripple on the DC-link.

connection of ud and uo , as shown in (3):

2.4 Operating modes of the proposed APDC
uBO ≈ Ud + ũ dUo + ũ o
[ ] [ ]
The above-mentioned analysis shows when the voltage of Cd is
PM PM controlled as in (3), there is a small voltage ripple on the DC-
≈ Ud + k1 sin(2𝜔t ) + Uo + k2 sin(2𝜔t )
2𝜔CBOUBO 2𝜔CBOUBO link. In addition, ud can more precisely and quickly reflect the
⏟⎴⎴⎴⎴⎴⎴⎴⎴⎴⏟⎴⎴⎴⎴⎴⎴⎴⎴⎴⏟ ⏟⎴⎴⎴⎴⎴⎴⎴⎴⎴⏟⎴⎴⎴⎴⎴⎴⎴⎴⎴⏟
ud uo change of motor power than uo . Thus, an instantaneous voltage
(3) control strategy is proposed to control the voltage of Cd .
where Ud and ũ d are the average voltage and the voltage ripple The control logic of the proposed APDC is listed in Table 1.
across Cd , respectively. UO and ũ O are the average voltage and ig∗ and ig are the current reference and the grid current, respec-
the ripple voltage on the DC-link, respectively. The sum of Ud tively. Δ ig is the error between ig∗ and ig , and 𝛿 is the hystere-
and Uo equals UBO. k1 and k2 are the coefficients of the two sis band of the current controller. ud∗ and ud are the voltage
AC components, and the sum of k1 and k2 is one. reference and the voltage of Cd , respectively. Δ u is the error
when S2 is turned on, the Ld current is expressed as: between ud∗ and ud , and 𝜁 is the hysteresis band of the volt-
age controller. Table 1 shows S1 is controlled according to the
d ud kCP relationship between Δig and 𝛿, which can make the SC motor
iLd = Cd = 1 d M cos(2𝜔t ) (4)
dt CBOUBO drive system satisfy the harmonic standard of IEC61000-3-2. S2
is controlled according to the relationship between Δ u and 𝜁,
When S2 is turned off, Ld release power to the load. uo equals which can remarkably reduce the voltage ripple on the DC-link.
the voltage of Ld , which is expressed as: Table 1 and Figure 5 shows that the proposed APDC has four
operating states. Figure 6 is the key waveforms of the APDC. To
2𝜔k1 LdCd PM PM simplify the analysis of the proposed APDC, it is assumed L1
uo = Uo − sin(2𝜔t ) = Uo − k2 sin(2𝜔t )
CBOUBO CBOUBO and Ld all work in continuous current mode during one operat-
ing cycle, and ud is higher than ud∗ and ig is lower than ig∗ at t0 .
k2 = 2𝜔k1 LdCd (5)
In state 1, S1 and S2 are all on. iL1 increases and L1 stores the
grid pulsating power. Meanwhile, Ld absorbs the energy from
(5) shows that k2 is always much less than k1 , which means Cd
Cd when S2 is on, which means ud decreases and iLd increases.
absorbs all most of the grid pulsating energy, and theoretically
For the load, Co is the only power source, so uo continuously
there is no voltage ripple on the DC-link. (3) is rewritten as:
decreased. This mode ends until Δ u is less than −𝜁.
In state 2, S1 is still on and S2 is turned off at t1 . iL1 con-
uBo ≈ Ud + Uo + ũ d tinues to increase and store grid pulsating energy. When S2 is
PM (6) off, Cd neither absorbs nor releases energy and ud keeps it sta-
≈ Ud + Uo + sin(2𝜔t )
2𝜔CBOUBO ble. Ld releases energy to the load through D2 , and iLd begins to
decrease and uo starts to increase. This mode ends until Δ ig is
According to (5) and (6), the uBO and uo curves of 200 greater than 𝛿.
and 400 W motor power are plotted respectively, as shown in In state 3, S2 is still off and S1 is turned off at t2 . The grid
Figure 4. The red and blue curves are the uBO and uo of 200 W and L1 are connected in series to provide energy for Cd , Co,
motor power, and the black and purple curves are the uBO and and the load. Ld continues to release energy to the load through
uo of 400 W motor power. These voltage curves show the ripple D2 . Correspondingly, iL1 and iLd continue to decrease and ud
of uBO and uo increase when the motor power increase. How- continues to increase. Because the grid and L1 all provide energy
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742 ZHANG ET AL.

FIGURE 6 Key waveforms of the proposed APDC

to Co , uo quickly increase. This mode ends until Δ u is larger

than 𝜁.
In state 4, S1 is still off and S2 is turned on at t3 . At t3 , iL1 is
greater than the load current, and uo continues to increase. The
grid and L1 not only provide energy for Cd and the load but
also provide energy for Ld , which makes iL1 quickly decrease.
When iL1 is less than the load current, uo begins to decrease.
This mode ends and S1 is turned on until is Δu less than −𝛿.
During one operating cycle, when Δ u is less than−𝜁, the load
gets energy from Co or Ld or the grid, and when Δu is greater
than𝜁, Ld or Cd stores the grid energy separately or simulta-
neously. The operating modes show that the proposed APDC
has two power paths between the Boost converter and the load,
and has more operating states than existing APDCs, which pro-
vides more freedom to deal with the grid pulsating energy. Thus,
the proposed APDC can more effectively suppress the DC-link
voltage ripple. In addition, the Boost converter is independently
controlled to get higher PF, which can further increase the per-
formance of SC motor drive systems.

3 CONTROLLER DESIGN

Based on the volt-second balance theory, d2 is obtained:

Uo Uo
d2 = = PM
(7)
uBO UBO + sin(2𝜔t )
2𝜔CBOUBO

where d2 is the duty of S2 , which should be adjusted according

to uBO to keep Uo stable. (7) shows that d2 has a 2nd harmonic,
as shown in Figure 7. Therefore, conventional controllers, such
as PI controllers, cannot quickly and accurately control ud and
FIGURE 5 Operating states of the proposed APDC. (a) State 1 suppress the voltage ripple on the DC-link.
(S1 = ON, S2 = ON); (b) State 2 (S1 = ON, S2 = OFF); (c) State 3 (S1 = OFF,
Figure 8 is the control scheme applied in the proposed
S2 = OFF) (d) State 4 (S1 = OFF, S2 = ON)
SC motor drive system, where two hysteresis controllers are
designed to achieve high PF and low DC-link voltage ripple,
respectively. Figure 8a is the PFC controller, which is similar to
the conventional double closed-loop PFC controller. However,
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ZHANG ET AL. 743

FIGURE 7 The curve of d2

FIGURE 9 Selection curves of Cd

In the proposed APDC, Wr is buffered by Cd , and ud changes

as in (9):

PM 1
= Cd Ud ΔUd (9)
𝜔 2

where ΔUd is the peak-peak voltage of Cd . Figure 9 shows

the relationship between Cd and ΔUd , where PM = 400 W,
UBO = 500 V, Ud = 200 V, and Uo = 300 V. As seen, Cd
decreases with the increase of ΔUd . In theory, when ΔUd equals
to 2Ud , Cd has the minimum capacitance and the proposed
ADPC can still effectively suppress the voltage ripple on the
FIGURE 8 The control diagram of the proposed APDC. (a) The control DC-link. However, when the motor operates under dynamic
scheme of PFC; (b) the control scheme of ud
conditions, ΔUd and the DC-link voltage ripple will significantly
increase, which will degrade the performance of the proposed
the traditional generation method of the grid current reference SC motor drive system.
is not suitable for the proposed SC motor drive system due to To resolve this issue, ΔUd should satisfy:
the large ripple of the Boost converter output voltage. In this
controller, the grid current reference is calculated according to ΔUd < 0.5Ud (10)
(1), and the error between Uo∗ and Uois adopted to adjust the
grid current reference due to the system efficiency. Moreover, According to (9) and (10), the following constraint for Cd is
a moving average filter (MAF) is adopted to quickly obtain the obtained:
average voltage of uo under steady and dynamic working condi-
PM
tions. Cd > (11)
Figure 8b is the APDC controller. ud∗ is the decoupling capac- 𝜔Ud2
itor voltage reference, which is calculated according to (6). A
voltage hysteresis (VH) controller is applied in the proposed In addition, the grid pulsating power can also be regarded as
APDC to generate the control signal of S2 , which makes ud track all absorbed by CBO , and (9) is rewritten as:
the decoupling capacitor voltage reference and reduce the DC-
link voltage ripple. PM 1
= CBOUBO ΔUd (12)
𝜔 2

CBO can be calculated according to (12) and Co can be calcu-

4 DESIGN OF KEY DEVICES
lated according to the formula of capacitors connected in series.
4.1 Selection of Cd and Co

Figure 2 shows when pg is larger than PM , the grid energy Wr

4.2 Selection of Ld
during one grid cycle can be expressed as:
When S2 is off, Uo can be expressed as:
3𝜋∕4(7𝜋∕4 )
Wr = (PM cos 2𝜔t )dt =
PM ΔId
∫𝜋∕4(5𝜋∕4 ) 𝜔
(8) Uo = Ld (13)
(1 − d2 )T
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744 ZHANG ET AL.

where T is the switching period of S2 , and ΔId is the Ld rip- TABLE 2 Key parameters of the proposed circuit
ple current. (7) shows that d2 varies with uBO . According to the Parameters Value
operating conditions of the proposed APDC, the maximum and
Ug 220V
minimum duty of S2 are shown as:
ω 314 rad/s
Uo Power switching frequency 20 kHz
⎧d2. min = = 0.5
⎪ UBO + 0.5Ud Cd and Co 40 μF/40 μF
⎨ (14)
⎪d Uo L1 and Ld 3 mH/1 mH
⎩ 2. max = UBO − 0.5Ud
= 0.75
UBO and UO 500/300

Combined with (12) and (13), the following constraint should

be satisfied:
TABLE 3 Key parameters of the test motor
0.5UoT 0.75UoT
< Ld < (15) Parameters Value
ΔId ΔId
Rated power 0.4 kW
In the proposed APDC, the switching frequency of S2 is Rated torque 3 N⋅m
set as 20 kHz, so Ld is finally calculated according to ΔId . Ld Rated torque 1500 rpm
has two operation modes: Continuous conduction mode (CCM) Pole,P 4
and discontinuous conduction mode (DCM). Because DCM has
higher efficiency and power density, Ld is selected to work in
DCM.
According to (5), the peak current of Ld is expressed as: rent id , respectively. And then, the control signal of the motor
inverter is generated by SVPWM control to realize the high-
Cd PM performance operation of the PMSM.
iLd .peak = (16)
CBOUBO Figure 11a shows the simulations waveforms, where the given
speed is 1000–1500–1000 rpm and the given load is 2 N⋅m.
ΔId equals iLd .peak when Ld operates in DCM under steady Figure 11b shows the simulations waveforms, where the given
working states. Under dynamic working states, iLd .peak will sig- speed is 1000 rpm and the given load is 0.5–1–0.5 N m. As
nificantly increase and ΔId changes from 1 to 15 A. According seen in Figure 11, the DC-link ripple is limited within a small
to (15), Ld varies from 0.5 to 7.5 mH. Although a smaller Ld can range under steady operating conditions. Under dynamic oper-
increase the power density of SC motor drive systems, the cor- ating conditions, the DC-link voltage has only a small rise or
responding ΔId becomes larger, the efficiency of the system will fall corresponding to the motor power increase or decrease,
decrease. Considering power density and efficiency comprehen- which indicates the proposed APDC and the control method
sively, Ld is finally selected as 1 mH. have good dynamic power decoupling control. In addition, the
simulation waveforms show the grid current has lower THD
and is in phase with the grid voltage.
5 SIMULATION AND EXPERIMENTAL
RESULTS
5.2 Experimental results
5.1 Simulation results
To further verify the performance of the proposed APDC, the
The same parameters and control method is adopted in simu- experimental platform of SC motor drive system is built, as
lations and experiments. The detailed parameters of motor and shown if Figure 12. TMS320F28335 is used as the control core,
APDC are listed in Tables 2 and 3, respectively. Figure 10 shows a rated power 0.4 kW PMSM is tested and the magnetic powder
the overall control scheme of the proposed SC motor drive sys- brake acts as the load. A rated power 1 kW motor inverter
tem, which includes grid current PFC control, suppression of is used to drive the PMSM, where Infineon IGP06N60T
DC-link voltage ripple, and PMSM control. The control theory IGBTs are power switches. Infineon IDV15E65D2 diodes are
of the first two control objectives has been discussed in detail in acted as freewheel diodes. In the APDC, both S1 and S2 are
the previous chapters. Infineon IKA15N60T IGBTs, and D1 and D2 are Infineon
Space vector control with id = 0 is applied in the motor con- IDV08E65D2 diodes. The rating values of these power devices
trol. In this motor controller, the output of the speed controller are shown in the Table 4.
is the calculated current reference iq * according to the error The FeSiAL magnetic core is applied in L1 and Ld , and
between the given speed n* and the feedback speed n, and the the number of inductor windings is 110 and 270. Cd and
feedback id and iq are obtained after three-phase currents by Co are WIMA film capacitors. Two galvanic isolated drivers
abc–dq transformation. The current controller obtains ud and uq 2ED020I12-F are used to provide drive current for two IGBTs.
based on the error between iq * and iq , 0, and the feedback cur- To get the accurate datum of the APDC, the voltage Hall sensor
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
ZHANG ET AL. 745

FIGURE 10 The control diagram of the

proposed SC motor drive system

FIGURE 11 Simulation results of the proposed SC motor drive system. (a) Speed change condition, (b) load change condition. Top to bottom: The motor
speed, the output voltage of Boost converter uBO , the voltage of decoupling capacitor ud , the DC-link voltage Uo , the grid current ig and the grid voltage ug
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
746 ZHANG ET AL.

FIGURE 13 Dynamic-state experimental waveforms of the proposed SC

motor drive system. (a).Speed-change experiment. (b) Load-change experiment

Figure 13 show the experimental waveforms, where the

experimental conditions is the same as the simulation ones in
FIGURE 12 The proposed APDC. (a) The SC motor drive system. (b)
The proposed APDC converter Figure 11. It can be observed that these results are very close
to the simulated ones. The grid voltage and current show the
gird current is in phase with the grid voltage. The third wave-
TABLE 4 Power switches parameters of the proposed circuit form is the motor speed, which show that the speed has good
steady and dynamic response. The fourth trace is the DC-link
Device Rating Rating
type Model voltage (V) current (A) voltage, which show that the ripple voltage is limited 280–320 V
under dynamic conditions, and the ripple voltage is only 10 V
IGBT IGP06N60T 600 6
under steady conditions. The voltages of uBO and ud are listed
IGBT IKA15N60T 600 15 and discussed later in this paper.
diode IDV15E65D2 650 6 Figure 14 shows the THDs of the grid current in the pro-
diode IDV08E65D2 650 8 posed APDC, which all meet the requirement of the standard
of IEC61000-3-2 during 100–400 W. All of results proved that
the proposed APDC and control method is effective.
Figure 15a shows the steady-state performance of the con-
is used to obtain the voltages of the uBO , ud, and uo , and the ventional motor drive system based on front-end Buck con-
current Hall sensor is used to collect the currents of L1 , Ld, verter, where a 680 μF electrolytic capacitor is used as a power
and motor phase. The motor speed n and the rotor position are decoupling unit. Figure 15b–e shows the steady-state perfor-
obtained by a photoelectric encoder. Although some additional mance of the proposed SC motor drive. In this experiment,
components are added in this APDC, the density of the APDC the given speed is 1000 rpm and the given load is 2 N m.
is still improved due to the bulky EC being replaced by a small Figure 15a,b shows the two motor drive systems have the same
F-cap. DC-link, THD, and torque ripple, which means the proposed
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
ZHANG ET AL. 747

FIGURE 14 Harmonics analysis of the grid current ig

SC motor drive system has good motor performance under

steady-state working conditions.
Figure 15c shows ud and uBO have the same voltage ripple,
and 12 V peak–peak voltage on the DC-link can be achieved,
which is consistent with the theoretical analysis. The current of
S2 and id in Figure 15c shows the voltage of Co is controlled
by S2 . It can be seen that Ld can control the ud and uo when S2
is turned on or off. The experimental waveforms demonstrate
there is an added power path between the grid and the motor,
which can more flexibly handle the grid pulsating power.
Meanwhile, it can be seen from Figure 15c–e that Ld works
only near half period and operates with DCM. In this mode,
when S2 is turned on, the current of Ld increases. When S2 is
turned off, Ld releases energy to the load until the current of Ld
equals zero. Obviously, S2 operates under zero current switch-
ing (ZCS) at turned on. No doubt, when the proposed APDC
works in DCM, the efficiency is higher than that in CCM.
Figure 16a,b compares with the speed step-up performance
under a load of 2 N⋅m between the conventional motor drive
system and the proposed SC motor drive systems. At the time
Vstep , the given speed is changed from 1000 to 1500 rpm.
In the conventional motor drive system, there is 0.2 s speed
adjustment time, which is lower than that of the proposed SC
motor drive system. There is a 200 V voltage drop on the DC-
link, which degrades the performance of the gird current. In
addition, the speed overshoot is 200 rpm due to the higher over-
shoot voltage on the DC-link, which is about four times that of
the proposed SC motor drive system.
In the proposed SC motor drive system, there is only a
20 V voltage drop on the DC-link voltage when the speed
step-up happens. Obviously, the small voltage drop will not
affect the motor dynamic performance. The speed waveform
shows the actual speed reaches the given 1500 rpm within 0.2 s
and the maximum speed overshoot is 50 rpm, as shown in
Figure 16b. FIGURE 15 Steady-state experimental waveforms. (a) Grid voltage ug ,
Figure 17a,b compares the load step-up performance grid current ig , and motor torque Tm of the conventional motor drive system
based on front-end Buck converter. (b) Grid voltage ug , grid current ig , and
between the conventional motor drive system and the proposed motor torque Tm . (c) Boost converter output voltage uBO , decoupling capacitor
SC motor drive systems, where the speed is 1500 rpm and, voltage ud , and DC-link voltage uo . (d) The currents of S1 and S2 . (e) Zoom-in
the given load is changed from 1 to 2 N⋅m at the time Lstep . view of decoupling capacitor ud , DC-link voltage uo , and the current of
Figure 17a shows the load step-up performance of the conven- inductor Ld
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
748 ZHANG ET AL.

FIGURE 15 Continued

tional motor drive system. Figure 17a shows that this motor
drive system has a speed drop of 70 rpm and a duration of
200 ms due to a 110 V voltage drop. In the proposed SC motor
drive system, it can be seen from Figure 17b there is only very
little voltage drop on the DC-link when the load step-up hap-
pens, which causes a speed drop of 30 rpm and a duration of
200 ms.
The dynamic experimental waveforms show the proposed
SC motor drive system has better performance than that of the
conventional motor drive system based on front-end Buck con-
verter due to small overshoot voltage on the DC-link. The rea-
son is that the DC-link voltage is controlled by the PI controller
in the conventional motor drive system, where there is a delay
due to the integrator. In contrast, the DC-link voltage is con-
trolled by instantaneous voltage control in the proposed APDC.
It can be seen from Figures 16b and 17b when the given speed
or load changes, the peak-peak voltage of the Boost converter
output port increases, which is similar to the DC-link voltage
of existing APDCs. Fortunately, the decoupling capacitor has
the same peak-peak voltage as the output voltage of the Boost
converter by adopting the proposed APDC and the instanta-
neous voltage control. According to the operation theory of the
proposed APDC, the voltage ripples of uBO and ud cancel each
other out, so there is a small voltage drop on the DC-link. Mean-
while, it can be seen the current of Ld increases during the tran-
sient period, which can avoid the DC-link voltage drop.
FIGURE 16 Speed step-up experimental waveforms of the proposed SC
motor drive system. (a) Grid current ig , DC-link voltage uo , motor torque TM
and motor speed of the conventional motor drive system based on front-end
5.3 Comparative study Buck converter. (b) Grid current ig , DC-link voltage uo , motor torque TM and
motor speed of the proposed SC motor drive system; (c) boost converter
To further verify the validity, the main indexes of the proposed output voltage uBO , decoupling capacitor ud , DC-link voltage uo , and the
APDC are compared with the traditional Buck converter with a current of inductor Ld of the proposed SC motor drive system
bulky electrolytic capacitor, such as power density, system effi-
ciency. In the Buck converter, one 680 μF electrolytic capacitor electrolytic capacitor and film capacitors. The ESR of 40 μF film
is adopted to obtain the same voltage ripple on the DC-link as capacitors is 2.3 mΩ, which is much lower than the 95 mΩ ESR
the proposed APDC, which is more than ten times the capacitor of 680 μF electrolytic capacitors. The power loss of capacitor is
in the proposed APDC. expressed as:
In the two compared converters, the power loss of capaci-
tors is most worthy of study due to the large difference between Ploss = IC2 ESR (17)
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ZHANG ET AL. 749

FIGURE 18 Efficiency curves of the proposed APDC and the

conventional Buck converter

TABLE 5 The power loss of capacitors

Component Value ESR Peakvoltage Power loss

Cd (F-cap) 40 μF 1.7 mΩ 100 V 0.005 W

Co (F-cap) 40 μF 1.7 mΩ 10 V 0.0016 W
C(E-cap) 680 μF 95 mΩ 10 V 0.85 W

TABLE 6 The power loss of capacitors

On- Power Power

Power switch statevoltage Ld_peak loss (DCM) loss (CCM)

S2 1.8 V 15 A 3.37 W 6.74 W

D2 0.7 V 15 A 1.31 W 2.62 W
SUM OF POWER LOSS (W) 4.68 W 9.36 W

a capacitor is calculated as:

d uC d (A sin(2𝜔t ))
iC = C =C
dt dt
√ (18)
= 2𝜔AC cos(2𝜔t ) = 2IC cos(2𝜔t )

where uc is the voltage across the capacitor, and A is the peak

voltage across C. The power loss of capacitors with full-load
is calculated according to (17) and (18), and listed in Table 5.
FIGURE 17 Load step-up experimental waveforms of two-motor drive It shows the power loss of Co is less than that of Cd because
systems. (a) Grid current ig , DC-link voltage uo , motor torque Tm and motor of small voltage ripple of Co . Significantly, the power loss of
speed of the conventional motor drive system based on front-end Buck two F-caps is much less than that of an electrolytic capacitor,
converter. (b) Grid current ig , DC-link voltage uo , motor torque Tm and motor which can alleviate the reduction of drive system efficiency due
speed of the proposed SC motor drive system; (c) Boost converter output
to additional power paths and power switches of the proposed
voltage uBO , decoupling capacitor ud , DC-link voltage uo , and the current of
inductor Ld of the proposed SC motor drive system APDC.
The experimental waveforms show Ld operates at DCM.
In this mode, S2 and D2 all operate under zero current
where IC is the RMS current of capacitors, such as Cd and Co. In switching, which can significantly reduce the switching loss
motor drive systems powered by the single-phase grid, the volt- of power switches. In addition, Ld only works for near half
age of decoupling capacitor has a 2ω AC component, as shown a period, which further reduces the power loss of the pro-
in (6). Thus, the instantaneous current ic and RMS current Ic of posed APDC. The total average power loss of S2 and D2 is
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
750 ZHANG ET AL.

TABLE 7 Comparison of key devices between the proposed APDC and the conventional buck converter

Converter Components Parameters Size (cm) Volume (cm3 ) Price ($)

Buck E-cap 680 μF/450 V(EPCOS/TDK) 4.0 × 6.0 75.36 15

Lb1 1 mH 2.8 × 1.8 11.08 2.0
Lb2 1 mH 2.8 × 1.8 11.08 2.0
Cin 3.3μF/400V(EPCOS) 3.15 × 1.1 × 2.1 7.28 3.0
SUM 104.8 22
APDC S2 15 A/600 V (Infineon) ○ ○ 1.07
D2 8 A/600 V (Infineon) ○ ○ 0.65
Cd 40 μF/400 V (WIMA) 3.15 × 1.7 × 3.45 18.5 5.25
Co 40 μF/400 V (WIMA) 3.15 × 1.7 × 3.45 18.5 5.25
L1 3 mH 3.2 × 2.1 16.02 2.1
Ld 1 mH 2.8 × 1.8 11.08 2.0
SUM 61.4 16.32
REDUCTION RATIO 41.4% 25.8%

TABLE 8 Comparison of different APDCs

Peak-peak voltage
APDCs Rating power Passive Components Power devices Efficiency Steady/dynamic state

[17] 0.8 kW 4 × 45 μF/2 × 1 mH 6 × IGBT × ×/90

[19] 1 kW 2 × 90 μF/2 mH 3 × IGBT 90–93% 10 V/100 V
[22] 0.48 kW 90 μF/20 μF/3 mH/1.5 mH 3 × IGBT 91.2–93.3% 20 V/×
[24] 2 kW 2000 μF/220 μF/2 × 100 μH 5 × IGBT × 7.6/37 V
[25] 1 kW 2 × 90 μF/2 × 1 mH 4 × IGBT 90–93% ×/200 V
In this paper 0.4 kW 40 μF/40 μF/3 mH/1 mH 2 × IGBT 91.2–93.8% 15/25

calculated as: is 93.8% and 93%, respectively. The lowest efficiency occurs at
100 W load, which is 91.2% and 90%, respectively. The max-
Ploss−DCM = PS2 +PD2 imum conversion efficiencies from UBO to Uo are 96.5% and
95.9% at 300 W load. The minimum efficiency is 95.1% and
iLd .peak (UCES + UF ) 94.4% at 100 W load. Under the same load level, the efficiency
= ILd UCES + IL UF = (19)
d 8 is 95.3% and 92.2% in the Buck converter, respectively. It is
obvious that the proposed APDC degrades the efficiency of
where ILd is the RMS current of Ld , and UCES and UF are the the front-end converter due to an additional power flow path
on-state voltage of S2 and the forward voltage of D2 , respec- and more power components. However, when the proposed
tively. When the proposed APDC operates at CCM, the total APDC works at DCM, the efficiency drop of the front-end
power loss of S2 and D2 is expressed as: converter is relatively small compared with the traditional sys-
tem. In addition, SC motor drive systems based on the pro-
Ploss−CCM = PS2 +PD2
posed APDCs are more reliable and have a longer lifespan than
iLd .peak (UCES + UF ) motor drive systems based on Buck converter. These advan-
= ILd UCES + IL UF = (20) tages of the proposed APDC show that SC motor drive systems
d 4
can gradually replace traditional motor drive systems with bulky
Table 6 lists the power loss of power switches with two E-Caps.
operating modes at full load. Figure 18 shows the effi- Table 7 compares the cost and volume of key devices of two
ciency curve, where the load varies from 100 to 400 W. To converters. Due to smaller sizes, the volumes of S2 and D2 are
get accurate efficiency, the motor is replaced by the fixed not listed. In Buck converter, a 1 mH inductor and a 3.3-μF
resistance. capacitor are used as input filter, and the output inductor is
In DCM and CCM, the front-end converter with the pro- also 1 mH. This table shows the cost of the proposed circuit is
posed APDC has the maximum efficiency at 300 W load, which reduced by 25.8% and the volume is reduced by 41.4%. Overall,
 17554543, 2022, 8, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12264 by Readcube (Labtiva Inc.), Wiley Online Library on [02/07/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
ZHANG ET AL. 751

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