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Creating A TDR Inside The IJTAG Network Using DftSpecification Editing Commands

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204 views

Creating A TDR Inside The IJTAG Network Using DftSpecification Editing Commands

Uploaded by

魏宇
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© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Tessent

Creating a TDR inside the IJTAG Network using 保存该页面

DftSpecification editing commands.


更新于 2022年8月06日

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https://support.sw.siemens.com Copy

摘要

This Support Kit shows how to create a TDR using DftSpecification editing commands.
This is part of the parent Support Kit MG619991: Three different methodologies to create a TDR (Test
Data Register) inside the IJTAG Network using the DftSpecification.

By the end of this Support Kit you should be able to do the following:

Create a TDR to control or monitor the PLL instrument signals described above using DftSpecification
editing commands add_config_element and set_config_value

Set up the PLL by programming the TDR through a PDL and an iCall in a pattern set ​

详细信息

Consider a PLL instrument in a design, for which a Test data register (TDR) needs to be added to:

Program the PLL using the CTRL[7:0] inputs

Reset the PLL using the RESET input

Check the PLL lock on the LOCK output

This TDR is to be accessed through an SRI (Scan Resource Instrument) SIB, since the contents are not to
be disturbed during scan test.

Note that if a PLL instrument ICL and PDL are read in, as in this test case, set the attribute
tessent_use_in_dft_specification on these PLL DataInPorts and PLL DataOutPorts to false in the ICL.
For example: DataInPort RESET {Attribute tessent_use_in_dft_specification = "false";}
This prevents a TDR for these ports from being automatically inferred to the DftSpecification.

An SRI SIB is added with the create_dft_specification command:


set spec [create_dft_specification -sri_sib_list {sri_tdr_pll} ]

The TDR is added using add_config_element below the SRI SIB created above:
add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)

Next the DataInPorts and DataOutPorts are added to the TDR:


add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/DataInPorts
add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/DataOutPorts

Now the connections are made from these TDR DataOutPorts to the PLL CTRL[7:0] and RESET inputs and
to the TDR DataInPorts from the PLL LOCK output as follows:
add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/DataInPorts/connection(0)
-value PLL_inst/LOCK

add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/DataOutPorts/connection(0)
-value PLL_inst/RESET
add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/DataOutPorts/connection(1)
-value PLL_inst/CTRL[0]
..
add_config_element
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/DataOutPorts/connection(8)
-value PLL_inst/CTRL[7]

Finally a reset value is assigned to the TDR:


set_config_value
DftSpecification(top,gate)/IjtagNetwork/HostScanInterface(tap)/Tap(main)/HostIjtag(1)/Sib(sri)/Sib(sri_tdr_pll)/Tdr(pll)/reset_value
9'b000000000

Note that the tab key can be used to complete the path for the DftSpecification with the
add_config_element and the set_config_value commands.

Here is the resulting SRI SIB and the TDR to control the PLL, as reported by the
command: report_config_data $spec
...
Sib(sri_tdr_pll) {
Tdr(pll) {
DataInPorts {
connection(0) : PLL_inst/LOCK;
}
DataOutPorts {
connection(0) : PLL_inst/RESET; 知识库文章 ID# MG619983
connection(1) : PLL_inst/CTRL[0];
内容
connection(2) : PLL_inst/CTRL[1];
connection(3) : PLL_inst/CTRL[2]; 摘要
connection(4) : PLL_inst/CTRL[3];
connection(5) : PLL_inst/CTRL[4]; 详细信息
connection(6) : PLL_inst/CTRL[5];
相关文章
connection(7) : PLL_inst/CTRL[6];
connection(8) : PLL_inst/CTRL[7];
} 关联组件

reset_value : 9'b000000000;
Tessent Shell Environment
}
} Tessent IJTAG Tessent Scan

} Tessent FastScan
...

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Click to download the Support Kit
Instructions: create_tdr_using_DftSpec_editing_commands_MG619983.pdf 是 否

Click to download the test case: create_tdr_using_dft_spec_editing_commands_MG619983.tar.gz


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Three different methodologies to create a TDR (Test Data Register) inside the
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IJTAG Network using the DftSpecification.
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Three different methodologies are discussed on how to create a TDR (Test Data Register) inside the IJTAG
Network using the DftSpecification.

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