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Embedded System: An electronic device incorporating a computer, such as a microprocessor or

microcontroller, dedicated to specific tasks within a larger system. (e.g. Smartphones and tablets,
Home appliances,Automotive systems, Industrial machinery,Medical devices)

Key Characteristics:
- Embedded within a larger system - Designed for specific/limited functions
- Often operates in real-time - Limited resources (memory, processing power)
- Optimized design based on application characteristics
- Used to simplify system design and provide flexibility

Embedded System Design Constraints:

1. Small & Light: Used in portable devices and transportation.
2. Low Power: Runs on batteries for varying durations. Limited Cooling limits power use.
3. Harsh Conditions: Endures heat, shock, water, etc.
4. Safety Critical: Needs reliability and precision.
5. Performance: Demands consistent timing.
6. Cost-Sensitive: Even tiny cost increases matter.

Classifications of Embedded Systems

1. Based on Industrial Domain: - Aerospace and Defense: (navigation and communication in aircraft.)
- Automotive: (Controls vehicle functions) - Consumer Electronics:(smartphones)
- Industrial: (manufacturing automation) - Medical:(medical diagnostics, monitoring)
2. Based on Functional Features:
- Standalone: Operate independently for a specific task.
- Networked: Connected to networks for enhanced functionality.
- Real-time: Prioritize strict timing constraints for operational effectiveness.
- Mobile: Used in portable devices with limited memory.
3. Based on System Size:
- Small-scale: Simple tasks with minimal hardware
- Medium-scale: Balances performance and complexity.
- Sophisticated: High performance, supporting advanced functionalities.
4. Based on Design Approach:
- Programmable: Flexible design for software updates and modifications.
- ASIC-based: Custom ICs for specific applications, optimized for performance.
- SoC: Integrates all system components into a single chip for improved performance and efficiency.
- FPGA: User-programmable ICs for logical operations.
5. Based on Powering Source:
- Battery-Powered: Portable devices relying on battery power.
- Mains-Powered: Connected to electrical grid for stationary applications.
- Energy-Harvesting: Utilizes ambient energy sources for sustainability.
6. Based on Application Type:
- General Computing: Embedded versions of desktop applications.
- Control Systems: Closed-loop feedback control in real-time systems.
- Signal Processing: Handles computations involving large data streams.
- Communication & Networking: Manages switching and information transmission.

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General Purpose Computer System Includes: (i/o) devices & software useful for a wide variety of
purposes and can be changed by user
Embedded System: ➔ is any thing that uses a “processor” but isn't a general-purpose computer.
The end-user typically does not or cannot modify or upgrade the internals.

Hardware Components of Programmable Embedded Systems:

1. Power Supply 2. Processing Unit 3. Memory
2. Timer and Counter: Generates periodic signals or interrupts, essential for timing tasks and events.
3. A-D Converter: Converts analog signals from sensors to digital binary (from sensors to processor).
4. D-A Converter: Converts digital data from processor to analog form for actuators.
5. Input/Output Interfaces: Interacts with external events.(sensors, actuators, A-D and D-A converters.)
- Digital Inputs/Outputs: binary ( Used for reading switches, buttons, controlling LEDs, and relays.)
- Analog Inputs/Outputs: continuous signals. Used for tasks like reading temperature sensors, controlling
motors, or generating audio.
- Communication Interfaces: e.g Ethernet, USB, Wi-Fi, CAN, Bluetooth.
Common I/O Interfaces: - Universal Serial Bus (USB)
- General Purpose I/O (GPIO) - Asynchronous UART-based serial communication
- Serial Peripheral Interface (SPI) bus - Inter-integrated circuit (I2C) bus
6. Electronic Circuit components: Resistor ,Capacitor, Inductor ,Diodes , BJT, MOSFET, Microchips.
7.Printed Circuit Board (PCB): used to connect electronic components together.
-Has metal traces and planes. -Components soldered onto pads. -Can have one or multiple layers
- They are classified into three main classes based on reliability and quality:
- Class 1: Used in consumer electronics.
- Class 2: Found in devices where reliability is important but not critical.
- Class 3: Meets the highest manufacturing standards and is used in critical applications like aviation.
- PCBs can be categorized as:
- Rigid boards: Layout contained within a rigid substrate.
- Flexible boards: Made of less rigid material, allowing for greater flexibility.
- Metal-core PCBs: Designed to dissipate heat throughout the board, suitable for high-current designs.

Software Components for Embedded Systems:

- Integrated Development Environments (IDEs): Simplify programming, compiling, linking, debugging,
and deploying software.
- Emulators and simulators: Test and debug code before deployment.
- Assembler: Converts assembly language to executable binary code for high performance.
- Compiler: Generates compiled machine code for target architecture, often supports cross-compilation.
- Embedded Operating Systems: Designed for specialized computer systems with limited resources, can
be real-time or non-real-time.
- Debugging Tools: Essential for debugging embedded systems without interfaces.
- Programming Languages: Commonly C/C++ and Assembly for performance, Python increasingly used
for higher-level tasks.
Basic Algorithms in Embedded Systems Software: (Control Laws, Sequencing Logic, Signal Processing,
Application-Specific Interfacing, Fault Response)

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Software Attributes of Programmable Embedded Systems:
- Reactivity: How the system responds to events. - Usability: User-friendly operation.
- Reliability: Maintains performance under conditions. - Flexibility: Supports remote maintenance.
- Portability: Ease of use in various environments. - Availability: Meets specifications over time.
- Dependability: Performs tasks correctly. - Maintainability: Easy to modify or adapt.
- Analyzability: Simplifies diagnosis of issues. - Testability: Facilitates software validation.
- Efficiency: Optimizes resource usage. - Security: Prevents unauthorized access.
- Fault-Tolerant: Survives in the presence of faults(failsafe).
- Real-Time: Timing correctness is crucial.
- Hard Real-Time: Timing must be perfect or else it's dangerous, like in critical systems.
- Firm Real-Time: If it's late, it's okay but not ideal, like in streaming.
- Soft Real-Time: Timing matters, but being a bit late isn't a big problem, like in email
Pros of Embedded Systems:
- Versatility in various environments - Simplified hardware design leading to cost reduction
- High reliability - Compact size - Fast operation - Low power consumption
- Adaptability to dynamic weather conditions

Cons of Embedded Systems:

- High development efforts required - Limited versatility due to specific tasks - Scalability issues
- Restricted memory resources - Complexity may require trained experts for operation

Challenges and Future Trends:

- Security concerns - Integration with IoT - Increasing system complexity
Future trends: include AI and machine learning integration, edge computing, and enhanced connectivity.

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Embedded Systems Computing Architectures:
1. According to Instruction Set:
a. Complex Instruction Set Computer (CISC) b. Reduced Instruction Set Computer (RISC)
Processor Architectures:
1. Complex Instruction Set Computer (CISC):
- Emphasizes building complex instructions directly in hardware
- Relatively slower but uses little instructions than RISC
- Designed to decrease memory costs but can be more expensive
(e.g.VAX, Motorola 68000 family, System/360, AMD and the Intel x86 CPUs.)
2. Reduced Instruction Set Computer (RISC)
- Simple and customized instruction set
- Minimizes instruction execution time by limiting instructions
- Combines complex instructions into simpler ones - Each instruction cycle requires one clock cycle
- Requires fewer transistors, making it cheaper to design
- Key features:
1. Pipelining technique for efficiency 2. Multiple optimized registers for quick response
3. Supports simple addressing mode and fixed-length instructions
(e.g. ARM, PA-RISC, Power Architecture, Alpha, AVR, ARC and the SPARC.)

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Common Microprocessor Families:
1. Intel x86: High performance, compatible software, used in PCs, servers, and embedded systems.
2. ARM Cortex: Power-efficient, scalable design, extensive ecosystem.
3. AMD Ryzen: Competitor to x86, multi-core, enhanced security.
4. Raspberry Pi: Affordable ARM-based, community support, versatile.
Common Microcontroller Families:
1. Atmel AVR: Simple, low power, integrated peripherals.
2. Microchip PIC: Low power, versatile, various peripherals.
3. STMicroelectronics STM32: Extensive features, scalable, rich ecosystem.
4. Texas Instruments MSP430: Ultra-low power, integrated peripherals, scalable.
5. Espressif ESP8266/ESP32: Wi-Fi/Bluetooth, affordable, integrated development.
AVR Microcontrollers: The AVR Microcontrollers, or Advanced Virtual RISC (AVR) Microcontrollers, are
an 8-bit family known for their efficient architecture and diverse features.
1. Family Classification: Classified by:
- Program memory (Flash) size - EEPROM memory size
- Number of I/O pins - On-chip features like ADC, UART, etc.
2. Types of AVR Microcontrollers: tinyAVR, megaAVR, XMEGA, application-specific.
3. Architecture Highlights:
RISC Core with Harvard Architecture: with separate buses and memories for program (Flash)
and data (SRAM)storage.
Registers: Contains general-purpose registers for data manipulation and special-purpose
registers for controlling execution flow.
Key Features of AVR Microcontrollers:
1. Power-Saving Modes: Minimize power consumption with Idle, Standby, and Power-down modes.
2. Peripheral Integration: Includes ADC, timers, USART/UART, SPI, I2C, PWM, and GPIO pins for versatile
interfacing.
3. Interrupt Handling: Efficiently manages multiple interrupt sources for real-time responsiveness.
4. Flash Memory: Stores program instructions with non-volatile Flash memory, allowing firmware
updates via ICSP or ISP methods.

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ATmega32 is an 8-bit microcontroller from the AVR family, utilizing Harvard architecture where program
and data are in separate memories.
Memory Architecture includes :
1. Flash Program Memory: Function: Stores non-volatile program code (firmware).
- Size:32KB -Address range: 0x0000 – 0x3FFF. - Access: Used for instruction fetching and execution.
- Details: Organized as 16K x 16 due to 16/32-bit instructions, with a program counter of 14 bits.
2. SRAM Data Memory: Function: Volatile memory for data and variables during execution.
- Size: 2KB - Access: for Read/write by CPU and peripherals.
3. EEPROM Memory:
- Function: Non-volatile memory for retaining data like configuration parameters when power is off.
- Size: 1KB - Access: Read/write data using EEPROM specific instructions.
4. I/O Registers: Function: Control and configure peripherals (GPIO, timers, USART, SPI, I2C).
- Access: it’s Memory-mapped(accessed like memory locations).
5. Boot Loader Section:
- Function: includes a boot loader section in its flash memory Allows firmware updates over a serial
interface (such as UART) without a dedicated programmer.
- Access: Resides in a separate flash memory section, typically invoked upon reset to check for
firmware updates.
Flash Program Memory Details:
- On-chip Reprogrammable Flash memory for program storage: 32KB.
-Sections: Divided into Boot Loader and Application sections for software security.
- Endurance: At least 10,000 write/erase cycles.
ATmega32 SRAM Data Memory - Data Bus Access: Standard load/store instructions.
- Secondary In/Out Bus: for Rapid access to select locations.
Data Memory Address Space:
- Registers (32 x 8-bit) (0000–001F): General purpose working registers (R0-R31).
- I/O Memory (64 x 8-bit) (0020–005F): Peripheral control registers and I/O registers.
- Extended I/O Memory (device dependent) (160 x 8-bit) (0060–00FF): For additional peripherals.
- Internal SRAM (2048 x 8-bit) (0100–08FF):Temporary storage for variables, intermediate results, and
stack within a software application.
Common Pins in AVR Microcontroller:
1. Power Pins: - VCC : Supply voltage (+5V). - GND: Ground.
2. Digital I/O Pins: - Configurable as inputs or outputs.
- Port Pins (e.g., PORTB, PORTC, PORTD): Multiple pins per port (e.g., PB0, PB1).
3. Analog Pins: - Used for analog input, connected to Analog to digital converter(ADC module.)
- Analog Comparator Pins: For comparator inputs.
4. PWM Pins: - Generate PWM signals for motors, LEDs, etc.
- Timer/Counter Pins: Built-in timers with PWM (e.g., OC0, OC1A).
5. Serial Communication Pins:
- USART Pins: (Universal Synchronous/ Asynchronous Receiver/Transmitter) For serial communication.
- SPI Pins: For SPI data transfer. - I2C Pins: For I2C data and clock lines.
6. Reset Pin: - RESET: External reset button or circuit.

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- GPIO (General Purpose Input/Output): Configurable as input or output to read or drive digital signals.
- Uses: Reading sensors, controlling actuators, communication with other devices.
- Programming: Set pin direction (input/output) and read/write digital values via software.
- ATmega32: Four 8-bit GPIO ports (A, B, C, D).
1. Port A (PA0-PA7): - Uses: Interfacing with sensors, switches, ADC operations.
- Functions: ADC, UART, PWM.
2. Port B (PB0-PB7): - Uses: LEDs, buttons, digital sensors. - Functions: SPI, I2C.
3. Port C (PC0-PC7): - Uses: Similar to Port B, external memory interfaces.
- Functions: UART, SPI, PWM, interrupts.
4. Port D (PD0-PD7): - Uses: General digital I/O, motor control, sensors.
- Functions: Serial communication (PD0, PD1), interrupts, UART.
Configuration:
- Data Direction Register (DDRx): - `0`: Input. - `1`: Output.
- each port has two Labels:
- `PORTx`: Output port address. - `PINx`: Input port address.
- Default: All ports are inputs.

Development and Simulation Tools:

Development: - Atmel Studio: IDE for editing, compiling, debugging, and simulating.
- AVR-GCC: Compiler toolchain. - AVRDUDE: Programming tool.
Simulators/Emulators:
AVR Studio Simulator: - Integrated in Atmel Studio.- Simulates AVR microcontroller behavior.
- Enables software testing without physical hardware.
- Proteus VSM (Virtual System Modeling): - Simulates AVR microcontrollers.
- Allows mixed-mode simulation of electronic circuits.

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Communication Protocols in Embedded Systems
- Definition: Facilitate communication between entities in a system.
- Elements: Define rules, syntax, semantics, error recovery.
- Types: Wired (physical interface) or wireless (no physical interface).
- Examples: USB (Types A, B, C), Ethernet, Bluetooth.
Common Factors of Communication Protocols
1. Data Formats: Structure, organization, encoding of transmitted data.
2. Address Formats: Structure and representation of device addresses.
3. Address Mapping: Translation of logical(ip) to physical addresses(mac).
4. Routing: Selection of the best path for data packets.
5. Sequence Control: Ensuring correct transmission order.
6. Flow Control: Managing data flow between devices.
Serial Communication Interfaces in AVR
- AVR Microcontrollers: Support built-in serial communication protocols.
Common Protocols:
- USART (Universal Synchronous/Asynchronous Receiver/Transmitter).
- SPI (Serial Peripheral Interface) - I2C (Inter-Integrated Circuit).
Considerations when choosing a protocol: Speed, distance, number of devices, compatibility.
USART/UART Protocols

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- USART: Universal Synchronous and Asynchronous serial Receiver and Transmitter.
- UART: Physical circuit in microcontrollers or ICs for serial communication.
UART Communication: Transmit and receive serial data.
Process:
- Sender (Transmitting UART) receives parallel data from CPU and converts it to serial.
- Serial data transmitted to Receiver (Receiving UART).
- Receiver converts received serial data back to parallel for CPU.
- Shift Registers: Used for serial-to-parallel and parallel-to-serial conversion.
- Requirements: Only two wires needed.
- Tx and Rx: Data flows from Transmitting UART's Tx pin to Receiving UART's Rx pin.
Packet Structure of USART/UART Protocol
Frames/Packets consisting of:
- Start Bit: Prepares receiver for data reception (always low).
- Data Bits: Actual transmitted data (typically 8 bits).
- Parity Bit: Optional error-checking bit (even, odd, mark, space, or none).
- Stop Bit: Signals end of data frame (usually 1 or 2, always high).
Characteristics:
- Universal: Configurable transfer and data speeds.
- Bidirectional: Supports simplex, half-duplex, and full-duplex data transmission.
- Asynchronous: No clock signal for synchronization.
- Baud Rate: Defines communication speed(data transmission rate) in bits per second (bps).
- Standard rates: 4800, 9600, 19200, 57600, 115200.
- Short-Distance Communication: (use USART) Typically within a device or physically close devices.
- Long-Distance Communication: Utilizes other methods like RS-485, RS-232, Ethernet, or wireless.
how USART interface works in AVR:
1. Configuration:
- Set baud rate, data frame format, and enable transmitter/receiver.
- Configure mode (synchronous/asynchronous) and clock source.

2. Transmitting Data: - Write data byte to USART data register.

- USART converts byte to serial format and transmits it through TX pin.
3. Receiving Data: - USART converts incoming serial bits to byte and stores it in receive buffer.
- Read byte from buffer.
4. Polling or Interrupts: - Poll status flags for transmission/reception completion.
- Configure interrupts for asynchronous handling.
AVR Registers Supporting USART Protocol
- AVR microcontrollers feature control and status registers for USART modules.
- These registers configure baud rate, frame format, enable/disable transmission and reception,
enable/disable interrupts, and monitor transmission/reception status.

1. USART Baud Rate Register (UBRR): Sets the baud rate for USART communication.
- Both devices must have the same baud rate.
- UBRR is 16 bits wide, used to set the baud rate divisor.
- Calculate the appropriate UBRR value based on the clock frequency and desired baud rate.
- Helper functions and macros (e.g., `Serial.begin()` in Arduino) simplify this process.
Contains UBRR0H and UBRR0L: Baud Rate Registers (High and Low Bytes)
- Description: Store the calculated values to set the baud rate.
- Usage: In `USART_Init()`, these registers are loaded with the calculated values.

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2. USART Control and Status Registers(UCSR): Control and monitor the USART module's operation.
- UCSR0A:Contains status flags.
- Key Bits:
- RXC: USART Receive Complete - TXC: USART Transmit Complete - PE: Parity Error
- UDRE: USART Data Register Empty - FE: Frame Error - DOR: Data OverRun
- U2X: Double the USART Transmission Speed - MPCM: Multi-processor Communication Mode
- Usage:Check flags in `USART_Transmit()` and `USART_Receive()` to manage data transmission/reception.
- UCSR0B: Controls transmitter and receiver operations.
- Key Bits:
- RXCIE: RX Complete Interrupt Enable - TXCIE: TX Complete Interrupt Enable
- UDRIE: USART Data Register Empty Interrupt Enable - RXEN: Receiver Enable
- TXEN: Transmitter Enable - UCSZ2: Character Size
- RXB8: 9th data bit (receive) - TXB8: 9th data bit (transmit)
- Usage:Set RXEN and TXEN in `USART_Init()` to enable receiver and transmitter.
- UCSR0C: Configures frame format and parity settings.
- Key Bits:
- URSEL: Register Select - UMSEL: Mode Select (0 for asynchronous, 1 for synchronous)
- UPM1:0: Parity Mode 00: Disabled 10: Even Parity 11: Odd Parity
- USBS: Stop Bit Select (0 for 1 stop bit, 1 for 2 stop bits)
- UCSZ1:0: Character Size
- UCPOL: Clock Polarity (for synchronous mode only)
- Usage: Set frame format in `USART_Init()`.
3. USART I/O Data Register (UDR0): Holds data to be transmitted or received.
Usage: - Write data to UDR0 in `USART_Transmit()`.
- Read data from UDR0 in `USART_Receive()`.
Note: These registers are essential for configuring and controlling serial communication via USART in
AVR microcontrollers.
1.SPI (Serial Peripheral Interface)
Features: - Synchronous, configurable data rate. - Full-duplex, master-slave with multiple slaves.
Advantages: - High-speed, suitable for short-distance communication.
- Multiple slaves with individual chip select lines.
Disadvantages: - requires More pins (MOSI, MISO, SCK, SS).
- Not for long-distance due to signal integrity.
Support: - Dedicated SPI hardware modules. - Hardware chip select pins.
- Registers for data rate, clock settings, enabling/disabling SPI.
2. I2C (Inter-Integrated Circuit)
Features: - Synchronous, master-slave, multi-master. - Two-wire (SDA, SCL), multi-device bus.
Advantages: - Simple, efficient, short-distance. - Multiple devices on one bus, fewer pins.
Disadvantages: - Lower speed than SPI. - Short-distance, requires pull-up resistors.
Support: - Dedicated I2C (TWI) modules.
- Registers for clock speed, addressing, enabling/disabling I2C.
- Hardware arbitration, repeated start, clock stretching.
3. USART (Universal Synchronous/Asynchronous Receiver/Transmitter)
Features: - Synchronous and asynchronous modes. - Configurable baud rates, full-duplex.
Advantages: - Versatile, widely used. - Point-to-point and multi-point, hardware flow control (RTS/CTS).
Disadvantages: - Needs external clock in synchronous mode. - Higher power in asynchronous mode.
Support: - Dedicated USART modules. - Registers for baud rate, frame format, enabling/disabling.
- Interrupt support for receive/transmit events.

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Serial Communication Interfaces in AVR

SPI Protocol: Synchronous Serial Communication interface.
-Enables communication between microcontroller(master) and peripherals(slaves).
- Full-Duplex: Allows simultaneous data transmission and reception.
- Common Applications: Interfacing with sensors, ADCs, DACs, shift registers, SRAM, displays, memory
chips (EEPROM, Flash), and communication modules (Wi-Fi, Bluetooth).
- High-Speed: Ideal for applications needing fast, real-time data transfer.
Master-Slave Setup:
- Master: Controls communication, generates the clock signal to synchronize data transmission.
- Slave: Responds to master commands. -can be 3 wired or 4 wired
4-Wire Interface:
- SCLK: serial clock that Synchronizes data transmission (generated by master).
- MOSI (Master Out Slave In): Master to Slave data./ - MISO (Master In Slave Out): Slave to Master data.
- SS/CS(Slave Select/Chip Select): Selects the active slave device.
Data Transfer:
- Clock Synchronization: Data is synchronized with the clock signal (SCLK), transmitted on clock edges.
- Data Formats: Supports various bit lengths and modes (polarity and phase).
- Modes:Operates in simplex (one-way) or full-duplex (two-way) communication.
Speed: Clock Frequency and Data Rate
- Clock Frequency:Determined by the microcontroller's speed and desired data rate, measured in hertz
- Range: From a few kilohertz (kHz) to several megahertz (MHz).
- Factors Influencing Clock Frequency:
- Microcontroller Speed: Limits the maximum clock frequency.
- Cable Length:Longer cables can introduce capacitance and inductance, reducing maximum frequency.
- Noise: Can cause data errors, reducing the maximum clock frequency.
-Data Rate: Higher data rates require higher clock frequencies.

- Shifting: Transmitting data bits serially in sync with the clock signal (SCLK). The master shifts out data
on MOSI while receiving data on MISO.
- Sampling: Reading data at specific clock edges (rising or falling), depending on the SPI mode configuration
(CPHA - Clock Phase).
Data Transfer Modes:
- Modes Defined by CPOL and CPHA:
- CPOL (Clock Polarity): Determines the idle state of the
clock (high or low).
- CPHA (Clock Phase): Determines when data is sampled
and when it is changed.
These operations and configurations ensure accurate and
reliable full-duplex communication between master and
slave devices in SPI networks.
Protocol Operations
Initiation: Master asserts SS/CS line (active low) to select the slave.
Configuring Data Transfer: Master sets clock frequency, data format, and bit length.
Clock Generation: - Master generates SCLK to synchronize data transfer.
- Data can be sampled on rising or falling clock edges.
Data Transmission: - Master sends data via MOSI, receives data via MISO. - Data is exchanged bit by bit.

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Completing Transfer: - Master de-asserts CS line after transfer. - Slave releases resources.
Multiple-Slave Configuration:
- Master uses unique SS lines to select slaves.
- Only one slave should be active at a time to avoid data corruption.
- For sending the same data to multiple slaves, all relevant SS lines can be activated simultaneously.
- Use a decoder/demultiplexer if more SS lines are needed.
Daisy Chain Configuration
- Devices connected in series; master’s MOSI to first slave’s MOSI, and master’s MISO to last slave’s MISO.
- SCLK and SS/CS lines shared among all devices.
- Data is passed along the chain from one device to the next.
- Reduces required I/O pins, but must manage signal integrity and timing.
SPI interface in AVR microcontrollers/ Schematic Diagram of AVR ATmega328P:
The ATmega328P, used in many Arduino boards like the Arduino Uno, benefits from the Arduino
platform's simplified development environment, easy programming language, and extensive pre-built
libraries and examples.
- SPI is a fast synchronous communication interface. - Data transfer speeds up to half of the core clock.
- At 16MHz clock speed, SPI can reach 8MHz in master mode.
- Connect two microcontrollers: one as master, the other as slave.
- Master sends an incrementing 8-bit value via SPI every 10ms.
ATmega328P and ATmega16/32: Both have the same SPI registers, but they have different Pinouts
- SPI Registers in ATmega32:
1. SPCR (SPI Control Register): Controls SPI operation and settings.
- Bit 7 (SPIE): SPI Interrupt Enable. - Bit 6 (SPE): SPI Enable. - Bit 5 (DORD): Data Order.
- Bit 4 (MSTR): Master/Slave Select. - Bit 3 (CPOL): Clock Polarity. - Bit 2 (CPHA): Clock Phase.
- Bits 1-0 (SPR1, SPR0): Clock Rate Select.
2. SPSR(SPI Status Register):for Flags and status info.
-Bit 7 (SPIF): SPI Interrupt Flag. - Bit 6 (WCOL): Write Collision Flag. - Bit 4 (SPI2X): Double SPI Speed Bit.
3. SPDR (SPI Data Register): For data transmission and reception.
- Writing initiates transmission, reading retrieves received data.
- Reading when no data is available may read previously received data.
4. SPI Clock Rate Select (SPR1, SPR0): Along with SPI2X, determines SPI clock rate.
- Different combinations yield different rates.

SPI Master Initialization Steps (ATmega16):

1. Set MOSI, SCK, and SS pins as output, MISO as input. 2. Set SS pin high.
3. Enable SPI in Master mode by setting SPE and MSTR bits in SPCR.
4. Define SCK frequency by setting SPI Clock Rate Bits.
SPI Master Write Steps:1. Copy data to SPDR. 2. Wait for transmission completion (poll SPIF high).
3. Read SPDR to flush buffer. 4. SPIF cleared by hardware or ISR.
SPI Master Read Steps:1. Write dummy data to SPDR. 2. Wait for transmission completion.
3. Read received data from SPDR.
SPI Slave Initialization Steps (ATmega32):1. Set MOSI, SCK, and SS pins as input, MISO as output.
2. Enable SPI in slave mode by setting SPE and clearing MSTR.
SPI Slave Transmit Steps: Same as SPI Write in Master mode.
SPI Slave Receive Steps: 1. Wait for SPIF high. 2. Read received data from SPDR.
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I2C Protocol in AVR Microcontrollers : Serial communication protocol for interaction among integrated
circuits, enabling numerous devices to communicate through a common bus..

Ahmed Elshenawy
TWI stands for "Two-Wire Interface." It's essentially another name for the I2C protocol.
- I2C: Synchronous, multi-master, multi-slave, packet-switched.
- Like UART communication, I2C uses only two wires: a bidirectional Serial Data Line (SDA) for data
transfer and a unidirectional Serial Clock Line (SCL) for synchronization.
- Roles: Masters generate the clock and control transfers; slaves respond.
- Addressing: unique 7-bit address (10-bit addressing is also supported).
- combines the best of SPI and UART, enabling multiple slaves with a single master. It uses collision
detection and arbitration to handle simultaneous master communications.
- most common configurations is single master, many slaves—e.g., data logging, LCD display.
Supported Frequencies:
- Standard Mode: Up to 100 kbps (widely supported)
- Fast Mode: Up to 400 kbps (widely supported)
- Fast Mode Plus: Up to 1 Mbps (requires stronger drivers)
- High-Speed Mode: Up to 3.4 Mbps (requires master code to enable)
- Ultra-Fast Mode: Up to 5 Mbps (write-only, simplified protocol)
I2C Message Format:
-Message Structure: Data is transferred in messages, broken into frames.
- Start Condition: SDA line goes from high to low before SCL goes from high to low.
- Stop Condition: SDA line goes from low to high after SCL goes from low to high.
- Address Frame: 7 or 10 bit sequence identifying the slave.
- Read/Write Bit: Specifies data direction; low for sending, high for requesting.
- ACK/NACK Bit: Indicates successful reception (ACK) or failure (NACK) of frames.
Each message contains: - Address Frame: Binary address of the slave.
- Data Frames: One or more frames with the transmitted data.
- Control Bits: Include start/stop conditions, read/write bits, and ACK/NACK bits.
- Addressing: I2C does not use slave select lines like SPI.
- Address Frame: Always the first frame after the start bit in a new message.
- Address Transmission: Master sends the slave address to all connected slaves.
- Address Comparison: Each slave compares the received address to its own.
- ACK/NACK: - If the address matches, the slave sends a low voltage ACK bit.
- If the address doesn't match, the slave does nothing, and the SDA line remains high.
- Read/Write Bit: Informs the slave whether the master wants to write data to it or receive data from it.
- Write Operation: Read/write bit is low voltage when the master sends data to the slave.
- Read Operation: Read/write bit is high voltage when the master requests data from the slave.
- Data Frame: Transmission:
- Sent after master detects ACK from slave. - Always 8 bits, with most significant bit sent first.
- Followed immediately by an ACK/NACK bit for verification.
- Next data frame can only be sent after receiving the ACK bit.
Stop Condition: - Master can send after all data frames are sent.
- Voltage transition from low to high on SDA after SCL transition, with SCL remaining high.
Steps of Data Transmission:
1.Start Condition: Master sends start condition by transitioning SDA from high to low before SCL goes low.
2. Master sends slave address (7 or 10 bits) along with read/write bit.
3. - Each slave compares received address to its own.
- If match: Slave sends ACK by pulling SDA low. - If no match: Slave leaves SDA high.
4. Master sends/receives data frame.
5. the Receiving device returns ACK to sender to acknowledge successful frame receipt.
6. Master stops transmission by transitioning SCL high before transitioning SDA high.

Ahmed Elshenawy
I2C Connection Models:
1. Single Master with Multiple Slaves:
- Addressing: Utilizes 7-bit addresses, providing 128 unique addresses. Rarely, 10-bit addressing offers
1024 unique addresses.
- Configuration: Slaves connected to the master, with 4.7K Ohm pull-up resistors on SDA and SCL lines
to Vcc.
2.Multiple Masters with Multiple Slaves:
- Challenges: Contentions occur when two masters attempt simultaneous data transfer over the SDA line.
- Solution: Each master checks SDA line status before transmitting. Low indicates bus control by another
master; high indicates readiness for transmission.
- Configuration: Diagram illustrates multiple masters and slaves, with 4.7K Ohm pull-up resistors on SDA
and SCL lines to Vcc.
Advantages of I2C:
- Uses only two wires for communication. - Supports multiple masters and slaves.
- ACK/NACK bit confirms successful frame transfer. - hardware is less complex than UARTs.
- Well-known and widely used protocol.
Disadvantages of I2C:
- Slower data transfer rate compared to SPI. - Data frame size restricted to 8 bits.
- Hardware setup can be more complicated than SPI.
I2C Registers in AVR:
1. TWBR (TWI Bit Rate Register): Controls SCL frequency generation in master mode.
2. TWCR (TWI Control Register):
- TWINT (Bit 7): TWI interrupt flag.
Requires manual clearing by writing a logical one to it; not automatically cleared by hardware.
- TWEA (Bit 6): Acknowledgment enable/disable. - TWSTA (Bit 5): Generate START condition.
- TWSTO (Bit 4): Generate STOP condition. - TWWC (Bit 3): Write collision.
- TWEN (Bit 2): TWI enable. - Reserved (Bit 1).
- TWIE (Bit 0): TWI interrupt enable.
3. TWSR (TWI Status Register):
- TWS7-TWS3 (Bits 7-3):TWI status bits. show TWI control and bus status.
- TWPS1-TWPS0 (Bits 1-0): TWI pre-scaler bits. used in bit rate formula to calculate SCL frequency
4. TWDR (TWI Data Register):
- Contains data to be transmitted or received, not writable during shifting a byte.
5. TWAR (TWI Address Register):
- TWA6-TWA0 (Bits 7-1): TWI address bits, contains 7-bit address for slave mode.
mostly used in the multi-master system.
- TWGCE (Bit 0): General call enable bit, allows addressing all devices simultaneously.
4 Transmission Modes in I2C:
- when the device is master: MT: Master Transmit MR: Master Receive.
- when the device is Slave: ST: Slave Transmit. SR: Slave Receive.
Master Mode Configuration
1. Initialize I2C:
- A. Enable the I2C interface. - B. Set the clock frequency using prescaler and TWBR register.
2. Start Condition: - A. Send a start condition to begin communication.
- B. Send the address of the slave device, indicating a write operation.
3. Send Data: - A. Send data to the slave device, such as register address or data to be written.
4. Stop Condition: - A. Send a stop condition to end the communication.

Ahmed Elshenawy
Slave Mode Configuration
1. Initialize I2C: - A. Enable the I2C interface. - B. Set the slave address by writing to the TWAR register.
2. Enable Address Recognition:
- A. Enable the TWGCE bit in the TWAR register to respond to general call addresses.
3. Enable ACK and TWI:
- A. Enable the ACK bit in the TWCR register to acknowledge the address.
- B. Enable the TWI (Two-Wire Interface) by setting the TWEN bit in the TWCR register.
4. Handling Data Transfer:
- A. Wait for an address match and read/write command.
- B. If it's a write operation, receive the data from the master.
- C. If it's a read operation, send the requested data to the master.
5. Stop or Repeated Start Detection: - A. Detect stop or repeated start conditions to determine
communication ends or a new transaction starts.
6. Disable TWI:
- A. Disable the TWI by clearing the TWEN bit in the TWCR register when communication is complete.

Ahmed Elshenawy