Lecture 5’s sequence

5.1 Introduction

5.2 Output Compare Unit of Timer 1

Review of C Programming

5.3 Example application of PWM

Introduction

▪ In Lecture 4, we learnt two features of a timer:

❑ overflow interrupt, and
❑ input capture

▪ Overflow interrupt:
❑ triggered when timer reaches its top limit
❑ for measuring time that is longer than one timer cycle
❑ for finding the elapse time, creating a time delay, etc.

▪ Input capture:
❑ an interrupt is triggered when there’s a change in pin ICP1
❑ value of Timer 1 is automatically stored in register ICR1
❑ for finding period, frequency, pulse width of a signal
Output Compare

▪ In this lecture, we’ll study another important functionality of a timer: output compare

▪ Output compare allows custom processing to be done when the timer reaches a preset
target value

▪ Examples of custom processing:

❑ clearing timer
❑ changing values of dedicated pins
❑ triggering an interrupt

▪ Output compare can be used to:

❑ generate signals of various shapes
❑ perform actions (e.g., ADC) at specific times
Output Compare: Common elements

▪ Output compare registers: To store the target timer values

▪ Output compare pins: These dedicated pins can be automatically changed (set,
reset, toggled) when there is an output compare match

▪ Configuration registers: To configure the operations of timer

▪ Output compare interrupt: ISR contains code for custom processing on an

output compare match
Lecture 5’s sequence

5.1 Introduction

5.2 Output Compare Unit of Timer 1

Review of C Programming

5.3 Example application of PWM

Output Compare Unit in Timer 1

▪ Timer 1 has two output compare channels: A and B

▪ Timer 1 is continuously compared to OCR1A, OCR1B, or a fixed limit

▪ When a match occurs, we have a compare match event. Flag OCF1x is also set,
where x = ‘ ‘ A’ or ‘B’

▪ On a compare match event, Timer 1 can:

❑ trigger an output compare interrupt

❑ change output compare pins OC1x

Output Compare Unit ─ Block diagram

Timer/Counter registers

Output Compare pins

Output Compare
registers

Not shown here:

* TCCR1A, TCCR1B registers Specifying custom
* TIMSK, TIFR registers waveform
Output Compare Unit ─ Relevant pins

D.4 and D.5 must be

enabled for Output:
DDRD.4, DDR.5 = 1

ATmega16 chip
Output Compare Unit ─ Main aspects

❑ What changes can be made to output compare pins OC1x?

❑ What are the available operation modes of timer 1?

❑ Steps to produce a custom waveform?

❑ How to use output compare interrupt?

Changing output compare pins OC1x

▪ When a timer event (compare match, or timer = 0) occurs, pins OC1x can be automatically updated:
❑ inverted
❑ set to 1
❑ cleared to 0, or
❑ unchanged

▪ The type of update is controlled by two flags in register TCCR1A: {COM1x1, COM1x0} where x = ‘A’
or ‘B’

COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 TCCR1A

for pin OC1A for pin OC1B

▪ The exact update change depends also on the operation mode of Timer 1
Operations modes of Timer 1

▪ Timer 1 has 15 operation modes, divided into 5 groups:

❑ Normal
❑ Clear Timer on Compare Match
❑ Fast PWM
❑ Phase correct PWM three PWM groups
❑ Phase and Frequency Correct PWM

▪ The operation mode is selected by 4 bits:

WGM = {WGM13, WGM12, WGM11, WGM10}

▪ Each group of operations will be discussed next

Selecting operation mode of Timer 1

COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 TCCR1A

ICNC1 ICES1 - WGM13 WGM12 CS12 CS11 CS10 TCCR1B

WGM12 WGM11 WGM10 Timer/Counter Mode of Update of TOV1 Flag

Mode WGM13 TOP
(CTC1) (PWM11) (PWM10) Operation OCR1X Set on

0 0 0 0 0 Normal 0xFFFF Immediate MAX

1 0 0 0 1 PWM, Phase Correct, 8-bit 0x00FF TOP BOTTOM

2 0 0 1 0 PWM, Phase Correct, 9-bit 0x01FF TOP BOTTOM

3 0 0 1 1 PWM, Phase Correct, 10-bit 0x03FF TOP BOTTOM

4 0 1 0 0 CTC OCR1A Immediate MAX

5 0 1 0 1 Fast PWM, 8-bit 0x00FF TOP TOP

6 0 1 1 0 Fast PWM, 9-bit 0x01FF TOP TOP

7 0 1 1 1 Fast PWM, 10-bit 0x03FF TOP TOP

Selecting operation mode of Timer 1

COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 TCCR1A

ICNC1 ICES1 - WGM13 WGM12 CS12 CS11 CS10 TCCR1B

WGM12 WGM11 WGM10 Timer/Counter Mode Update of TOV1 Flag Set

Mode WGM13 TOP
(CTC1) (PWM11) (PWM10) of Operation OCR1X on
PWM, Phase and
8 1 0 0 0 ICR1 BOTTOM BOTTOM
Frequency Correct
PWM, Phase and
9 1 0 0 1 OCR1A BOTTOM BOTTOM
Frequency Correct
10 1 0 1 0 PWM, Phase Correct ICR1 TOP BOTTOM
11 1 0 1 1 PWM, Phase Correct OCR1A TOP BOTTOM
12 1 1 0 0 CTC ICR1 Immediate MAX
13 1 1 0 1 Reserved - - -
14 1 1 1 0 Fast PWM ICR1 TOP TOP
15 1 1 1 1 Fast PWM OCR1A TOP TOP
Normal mode

▪ Timer repeatedly counts from 0 to TOP, where TOP = 0xFFFF

▪ Overflow flag TOV1 is set after timer reaches TOP

▪ No change is allowed on output compare pins OC1x

▪ Discussed in Lecture 3
CTC modes

▪ Timer is reset to 0 when it reaches the value in OCR1A or ICR1

CTC modes

▪ On compare match, change of pins OC1x is allowed

COM1A1/ COM1A0/
Description
COM1B1 COM1B0
Normal port operation
0 0
OC1A/OC1B disconnected
0 1 Invert OC1A/OC1B on compare match
Clear OC1A/OC1B on compare match
1 0
(Output signal = 0)
Set OC1A/OC1B on compare match
1 1
(Output signal = 1)

Changing OC1x in CTC mode

Fast PWM modes

▪ Timer goes from 0 to TOP, where TOP is equal to

❑ 0xFF (for 8-bit mode, WGM = 0101)
❑ 0x1FF (for 9-bit mode, WGM = 0110)
❑ 0x3FF (for 10-bit mode, WGM = 0111)
❑ value in ICR1 (for WGM = 1110)
❑ value in OCR1A (for WGM = 1111)

▪ Compare match occurs when timer = OCR1x register

Fast PWM modes

▪ On compare match, change of pins OC1x is allowed.

COM1A1/ COM1A0/
COM1B1 COM1B0
Description
- Normal port operation
0 0
- OC1A/OC1B disconnected
- WGM13:0=15: Toggle OC1A on Compare Match, OC1B disconnected
0 1
- For other WGM13:0 settings, normal port operation, OCnA/OCnB disconnected
- Clear OC1A/OC1B on compare match
1 0
- Set OC1A/OC1B when timer = 0

- Set OC1A/OC1B on compare match

1 1 - Clear OC1A/OC1B when timer = 0
(inverting mode)

Changing OC1x in fast PWM mode

Fast PWM modes

COM1A1/ COM1A0/
COM1B1 COM1B0
Description

0 0 -
0 1 -
Used in the
example - Clear OC1A/OC1B on compare match
1 0 - Set OC1A/OC1B when timer = 0
below
1 1 -
Phase Correct PWM modes

▪ Timer counts up and down between 0 and TOP, where TOP is equal to
❑ 0xFF (for 8-bit mode, WGM = 1000)
❑ 0x1FF (for 9-bit mode, WGM = 0010)
❑ 0x3FF (for 10-bit mode, WGM = 0011)
❑ value in ICR1 (for WGM = 1010)
❑ value in OCR1A (for WGM = 1011)

▪ Compare match occurs when timer = OCR1x register

Phase Correct PWM modes

▪ On compare match, change of pins OC1x is allowed

COM1A1/ COM1A0/
Description
COM1B1 COM1B0
- Normal port operation
0 0
- OC1A/OC1B disconnected
- WGM13:0= 9 or 14: Toggle OCnA on Compare Match, OCnB disconnected
0 1
- For other WGM13:0 settings, normal port operation, OC1A/OC1B disconnected
- Clear OC1A/OC1B on compare match when up-counting
1 0
- Set OC1A/OC1B on compare match when down-counting

- Set OC1A/OC1B on compare match when up-counting

1 1
- Clear OC1A/OC1B on compare match when down-counting

Changing OC1x in Phase Correct PWM mode

Phase Correct PWM modes

COM1A1/ COM1A0/
Description
COM1B1 COM1B0
0 0 -
0 1 -
Used in the Clear OC1A/OC1B on compare match when up-counting
1 0
Example below Set OC1A/OC1B on compare match when down-counting
1 1 -
Steps for producing a custom waveform

Steps to produce a custom waveform on an output compare pin OC1x

▪ Select the operation mode of Timer 1: CTC, Fast

PWM, or Phase Correct PWM, … set registers
▪ Select how output compare pin will be updated on TCCR1A and
TCCR1B
compare match event (COM1A1:0, COM1B1:0)

▪ Configure timer 1: clock source, pre-scaler, …

set registers
▪ Put correct values in the output compare registers.
OCR1A or ICR1
Example 1: Producing a custom waveform

Use Timer 1 to create a signal with period = 1000μs, high time = 200μs, Fcpu = 1MHz
Example 1: Determining registers

COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 TCCR1A

1 0 0 0 0 0 1 0
ICNC1 ICES1 - WGM13 WGM12 CS12 CS11 CS10 TCCR1B
0 0 0 1 1 0 0 1

▪ ICR1 = 1000 → period of output signal

▪ OCR1A = 200 → pulse width of output signal
▪ WGM3:0 = 1110 → Fast PWM mode where TOP = ICR1
▪ CS12:0 = 001 → Internal clock, no pre-scaler
▪ COM1A1:0 = 10 → set OC1A when timer = 0
clear OC1A when compare match
Example 1: Programming

#include <avr/io.h>

int main(void) {
DDRD=0b00100000; // set port D for output (D.5 is OC1A)
// Set register TCCR1A
// WGM11:WGM10 = 10: with WGM13-WGM12 to select timer mode 1110
// Fast PWM, timer 1 runs from 0 to ICR1
// COM1A1:COM1A0 = 10: clear OC1A when compare match, set OC1A when 0
// compare match occurs when timer = OCR1A
TCCR1A = 0b10000010;
// Set register TCCR1B
// WGM13:WGM12 = 11
// CS12:CS0 = 001: internal clock 1MHz, no pre-scaler
TCCR1B = 0b00011001;
ICR1 = 1000; // period of output signal
OCR1A = 200; // pulse width of output signal
while(1){;}
return 0;
}
Example 1: Testing

▪ Download program make_pwm.hex to demo board

▪ Use oscilloscope to measure signal on pin OC1A (D.5)
Output Compare Interrupt

▪ We have produced PWM signals on dedicated output compare pins OC1x

▪ What if we need to:

❑ perform custom operations at predefined time instants, or

❑ produce signals on an arbitrary output pin

▪ A possible approach is to:

❑ trigger an output compare interrupt at correct time instants

❑ write an ISR that performs the custom operations

Output Compare Interrupt

7 6 5 4 3 2 1 0
OCIE2 TOIE2 TICIE1 OCIE1A OCIE1B TOIE1 OCIE0 TOIE0 TIMSK

For Timer 0

Timer 1 Overflow Interrupt Enable

Timer 1 Output Compare B Match Interrupt Enable: 1 to enable

Timer 1 Output Compare A Match Interrupt Enable: 1 to enable

Timer 1 Input Capture Interrupt Enable: 1 to enable

For Timer 2

C names for the output compare interrupts:

▪ TIMER1_COMPA_vect
▪ TIMER1_COMPB_vect
Example 2: Output Compare Interrupt

Use Timer 1’s output compare interrupt to toggle pin B.1 every 1000μs.
Example 2: Programming
#include <avr/io.h>
#include <avr/interrupt.h>
ISR(TIMER1_COMPA_vect){
PORTB = PORTB ^ 0b00000010; // invert B.1 using XOR operator
}
int main(void) {
DDRB = 0xFF; // set port B for output
PORTB = 0xFF; // initial value of port B
// WGM11:WGM10 = 00: with WGM13-WGM12 to select timer mode 0100
// CTC, timer 1 runs from 0 to OCR1A
TCCR1A = 0b00000000;
// WGM13:WGM12 = 01
// CS12:CS0 = 101: internal clock 1MHz, pre-scaler = 1024
TCCR1B = 0b00001001;
OCR1A = 976; // interrupt is triggered every 976 x 1024 = 1,000,000us
TIMSK = (1<< OCIE1A); // enable Timer 1 Output Compare A interrupt
sei(); // enable interrupt subsystem
while(1){;}
return 0;
}