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Lecture 4

The document discusses how instructions are represented and encoded in binary format in computers. It explains different instruction formats used in ARM architecture including R-format, D-format and I-format. It also describes various logical operations like shift, AND, OR and EOR that are supported through dedicated instructions and provides examples of how they are encoded.

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8 views

Lecture 4

The document discusses how instructions are represented and encoded in binary format in computers. It explains different instruction formats used in ARM architecture including R-format, D-format and I-format. It also describes various logical operations like shift, AND, OR and EOR that are supported through dedicated instructions and provides examples of how they are encoded.

Uploaded by

zeinaakhaled1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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COMPUTER ORGANIZATION AND DESIGN ARM

Edition
The Hardware/Software Interface

Chapter 2
Instructions: Language
of the Computer

Lecture 4: ECE4206 Intro to Microprocessors


§2.5 Representing Instructions in the Computer
Representing Instructions
◼ Instructions are encoded in binary
◼ Called machine code

◼ LEGv8 instructions
◼ Encoded as 32-bit instruction words
◼ Small number of formats encoding operation code
(opcode), register numbers, …
◼ Regularity!

Chapter 2 — Instructions: Language of the Computer — 2


Hexadecimal
◼ Base 16
◼ Compact representation of bit strings
◼ 4 bits per hex digit

0 0000 4 0100 8 1000 c 1100


1 0001 5 0101 9 1001 d 1101
2 0010 6 0110 a 1010 e 1110
3 0011 7 0111 b 1011 f 1111

◼ Example: eca8 6420


◼ 1110 1100 1010 1000 0110 0100 0010 0000

Chapter 2 — Instructions: Language of the Computer — 3


LEGv8 R-format Instructions
R-Type
opcode Rm shamt Rn Rd Instruction
11 bits 5 bits 6 bits 5 bits 5 bits Format

◼ Instruction fields
◼ opcode: operation code
◼ Rm: the second register source operand
◼ shamt: shift amount (00000 for now) used in
shift instructions
◼ Rn: the first register source operand
◼ Rd: the register destination

Chapter 2 — Instructions: Language of the Computer — 4


LEGv8 R-format Example
opcode Rm shamt Rn Rd R-Type
Instruction
11 bits 5 bits 6 bits 5 bits 5 bits
Format

ADD X9,X20,X21
Decimal
1112ten 21ten 0ten 20ten 9ten Representation
10001011000two 10101two 000000two 10100two 01001two Machine
Language
1000 1011 0001 0101 0000 0010 1000 1001two =

8B15028916

Chapter 2 — Instructions: Language of the Computer — 5


LEGv8 D-format Instructions
D-Type
opcode address op2 Rn Rt Instruction
11 bits 9 bits 2 bits 5 bits 5 bits Format

◼ Load/store instructions
◼ Can not use R-Type instruction format as the 5-bit field is too
small to be used for the address as the largest constant would
be 31
◼ Rn: base register
◼ address: constant offset from contents of the base register (+/-
32 doublewords)
◼ Rt: destination (load) or source (store) register number
◼ Design Principle 3: Good design demands good
compromises
◼ Different formats complicate decoding but allow 32-bit
instructions uniformly
◼ Keep formats as similar as possible
Chapter 2 — Instructions: Language of the Computer — 6
LEGv8 I-format Instructions
I-Type
opcode immediate Rn Rd Instruction
10 bits 12 bits 5 bits 5 bits Format

◼ Immediate instructions
◼ Rn: source register
◼ Rd: destination register

◼ Immediate field is zero-extended

Chapter 2 — Instructions: Language of the Computer — 7


LEGv8 Instruction Format Summary

Chapter 2 — Instructions: Language of the Computer — 8


Example
We can now take an example from what the programmer writes to what the computer executes.
If X10 has the base of the array A and X21 corresponds to h, the assignment statement:

let’s first represent the machine language instructions using decimal numbers.

Chapter 2 — Instructions: Language of the Computer — 9


Stored Program Computers
The BIG Picture ◼ Instructions represented in
binary, just like data
◼ Instructions and data stored
in memory
◼ Programs can operate on
programs
◼ e.g., compilers, linkers, …
◼ Binary compatibility allows
compiled programs to work
on different computers
◼ Standardized ISAs

Chapter 2 — Instructions: Language of the Computer — 10


§2.6 Logical Operations
Logical Operations
◼ Instructions for bitwise manipulation
Operation C Java LEGv8
Shift left << << LSL
Shift right >> >>> LSR
Bit-by-bit AND & & AND, ANDI
Bit-by-bit OR | | OR, ORI
Bit-by-bit NOT ~ ~ EOR, EORI

◼ Useful for extracting and inserting


groups of bits in a word
Chapter 2 — Instructions: Language of the Computer — 11
Shift Operations
opcode Rm shamt Rn Rd
11 bits 5 bits 6 bits 5 bits 5 bits

◼ shamt: how many positions to shift


◼ Shift left logical
◼ Shift left and fill with 0 bits
◼ LSL(Logical Shift let) by i bits
multiplies by 2i
◼ Shift right logical
◼ Shift right and fill with 0 bits
◼ LSR (Logical Shift Right) by i bits
divides by 2i (unsigned only)
Chapter 2 — Instructions: Language of the Computer — 12
Shift Operations
◼ The following instruction performs the logical shift operation, if the original value
was in register X19 and the result should go in register X11:

◼ LSL X11,X19,#4 // reg X11 = reg X19 << 4 bits


◼ The machine language version of the instruction above is:

Chapter 2 — Instructions: Language of the Computer — 13


AND Operations
◼ Useful to mask bits in a word
◼ Select some bits, clear others to 0
AND X9,X10,X11 //reg X9 = reg X10 & reg X11

X10 00000000 00000000 00000000 00000000 00000000 00000000 00001101 11000000

X11 00000000 00000000 00000000 00000000 00000000 00000000 00111100 00000000

X9 00000000 00000000 00000000 00000000 00000000 00000000 00001100 00000000

Chapter 2 — Instructions: Language of the Computer — 14


OR Operations
◼ Useful to include bits in a word
◼ Set some bits to 1, leave others unchanged
OR X9,X10,X11 // reg X9 = reg X10 | reg X11

X10 00000000 00000000 00000000 00000000 00000000 00000000 00001101 11000000

X11 00000000 00000000 00000000 00000000 00000000 00000000 00111100 00000000

X9 00000000 00000000 00000000 00000000 00000000 00000000 00111101 11000000

Chapter 2 — Instructions: Language of the Computer — 15


EOR Operations /Exclusive OR
◼ Differencing operation
◼ Set some bits to 1, leave others unchanged
EOR X9,X10,X12 // NOT operation
Xor - operation
X10 00000000 00000000 00000000 00000000 00000000 00000000 00001101 11000000

X12 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111

X9 11111111 11111111 11111111 11111111 11111111 11111111 11110010 00111111

Chapter 2 — Instructions: Language of the Computer — 16

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