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Screening Test Dec 2023

The document contains instructions for a screening test with four sections - self evaluation, C/C++, Verilog/digital design, and DSP. It asks candidates to answer programming and design questions in each technical section and submit their responses in one document. The test is meant to evaluate candidates' skills in areas like embedded systems, digital design, and DSP.

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adeel hussain
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82 views

Screening Test Dec 2023

The document contains instructions for a screening test with four sections - self evaluation, C/C++, Verilog/digital design, and DSP. It asks candidates to answer programming and design questions in each technical section and submit their responses in one document. The test is meant to evaluate candidates' skills in areas like embedded systems, digital design, and DSP.

Uploaded by

adeel hussain
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Screening Test

Dec 23rd, 2023

Instructions
There will be zero tolerance for copying the solution from another candidate, ChatGPT or
similar tools. Any such solutions will be discarded.
There are three technical sections (B-D) in this test. Please take your time in the beginning to
read each section carefully. 1-2 fairly correct sections would be better than all three, but poorly
attempted, sections.
Section A: Self Evaluation
Section B: C/C++/embedded systems
Section C: Verilog, FPGA, Digital Design
Section D: MATLAB/DSP
Write down your answers along with any formula/calculations that you have done. Please give
comments/explanations for each step. Your code, if required, should contain everything
required in the answer including plots, print out in console etc. that we have asked in the
question. Clearly identify the start and the end of your code. Your comments should explain the
logic of each step and explain any steps that you have taken to make the code more efficient.
For online submission, put your answers in ONE word/pdf document and email it back to us.

Test Time: 3 Hrs


Please take 5 min to fill out the first section on Self-evaluation

SCREENING TEST – DEC 2023 | www.signatics-solutions.com


Section A: Self Evaluation

Name
Email and Contact
Number
Graduation Year and
Current Enrollment
Undergrad CGPA

Brief Decryption of
Undergrad FYP and your
specific role in it

Brief description of what


you have done since
graduation

Skill Proficiency (0-10)


C/C++
Verilog
MATLAB/DSP
ADS
HFSS
LabView

SCREENING TEST – DEC 2023 | www.signatics-solutions.com


Section B: C/C++
1. Write a C/C++ function that does the following.
Takes a 10 element array of type uint32_t as input. It prints out all the bytes in the array one at
a time.

2. The LSB of a global variable A of type uint32_t is controlled by an external port. The port toggles
between 0 and 1 with occasional glitches as shown in the figure. If the port goes to 0, the LSB
also goes to 0. If the port goes to 1, the LSB also goes to 1.
The time period of a valid cycle at the port is 1 sec with 0.5sec 0 and 0.5sec 1 with glitches.
There are some 1sec windows where the port stays at 0 with only some glitches. This is an
invalid cycle.
Write a C/C++ code that detects a valid cycle and prints a 1 for that cycle and detects an
invalid cycle and prints a 0 for that cycle.
Assume you access to a counter which starts from 0 and counts to 999 in every 1 sec and starts
from again for next sec. The counter is aligned with the port’s 1 sec cycle time as seen in the
figure. The count can be accessed by reading from a global read-only variable COUNT of type
uint32_t.

SCREENING TEST – DEC 2023 | www.signatics-solutions.com


Section C: Verilog/Digital Design
1. Write a Verilog module that takes a clock (clk) and 2 1-bit inputs A and B and outputs a 1-bit output
called Out according to the logic shown in the figure below.

2. Write a Verilog module that will implements the following:

SCREENING TEST – DEC 2023 | www.signatics-solutions.com


Section D: DSP
These problems are NOT meant to be done in MATLAB. Submit hand written or typed answers.
1. An analog signal
𝑥(𝑡) = sin 1000𝜋𝑡
Is sampled at a rate of 200 samples per second to form a discrete signal 𝑥[𝑛]. Plot the magnitude of
the DTFT of the discrete signal for −𝜋 ≤ 𝑤 ≤ 𝜋 where 𝑤 is the frequency. Label the x-axis correctly
and mark the value of 𝑤 where the signal components lie. Also, explain in words what the DTFT
looks like and why?

2. A radio engineer is trying to intercept a signal. He has a radio that can receive signals from 0.1 MHz
to 2.5 MHz frequency range. The signal received from his radio is sampled by an ADC operating at
10M samples per sec. His signal of interest has following properties:
lies at 1 MHz center frequency with a bandwidth of 1 kHz
gets transmitted in 10m sec bursts
the bursts get transmitted at random times which are not known beforehand

His radio can receive all signals in the given frequency range (0.1 MHz – 2.5 MHz) including the
signal of interest. The task of the radio engineer is to design an algorithm to detect the signal of
interest every time it gets transmitted. He has access to the incoming sample stream from the
ADC, i.e. he keeps on getting a new sample after every 1/10M = 0.1𝜇𝑠.
His boss told him that one way of detecting the signal is to collect ‘N’ consecutive ADC samples,
take the N point FFT of those samples, and monitor the energy in the appropriate frequency
bin(s) of the FFT to detect if the signal of interest is present or not.
a. What should be the value of N? Remember, he needs to make sure that he detects each burst of
the signal of interest and must not confuse other signals present in the spectrum with the signal
of interest. Justify your answer based on the information provided.
b. Once, N has been selected, which frequency bin(s) (from 0,1,2,…,N-1) will he monitor for the
signal of interest.
c. Is there any way other than what his boss suggested, i.e., energy detection in FFT output, to
detect the signal of interest.? Please explain an alternate way, if any. You can use any DSP
technique.

SCREENING TEST – DEC 2023 | www.signatics-solutions.com

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