Introduction
Introduction
8051
MICROCONTROLLER
Microprocessor
• CPU
• External RAM, ROM,
I/O, timer
• (No internal RAM,
ROM, I/O ports,
timers in the CPU)
Microcontroller
• Computer on a chip
• On-chip RAM, ROM, I/O
Ports, Timer, Serial
Controller etc
• Ideal for applications
where space and cost
are critical
Microcontroller vs Microprocessor
Microprocessor Microcontroller
• CPU is stand-alone, RAM, ROM, • CPU, RAM, ROM, I/O and timer are
I/O, timer are separate all on a single chip
• Designer can decide on the • Fixed amount of on-chip ROM,
amount of ROM, RAM and I/O RAM, I/O ports
ports.
• Cannot be used in compact • Can be used in compact systems
systems
• Due to external components the • Since external components are
• power consumption is high and low the power consumption is less
speed is low and speed is higher
Microcontroller applications
▪ 8 bit processor
▪ 4KB Internal ROM
▪ 128 Bytes Internal RAM
▪ Four 8 BIT I/O PORTS (32 I/O LINES)
▪ Two 16 Bit Timers/Counters
▪ One Serial Communication port
▪ 5 Interrupts ( 2 External, 3 Internal)
Architecture of 8051:
8051 family
• The 8051 is a subset of the 8052
• The 8031 is a ‘ROM-less’ 8051 (You need to add external
ROM to it)
8051 family
• Depending on the memory type and the technology
used, 8051 is available in different part numbers
• AT89C51 :
• AT : Atmel
• 8951 : 8051 with flash memory
• C : CMOS technology
Pin Diagram
Pin Description:
• 40 pins IC
• Pins 20 and 40 : Power supply Gnd and Vcc
• Pins 18 and 19 : 8051 requires an external crystal to run it
• A quartz crystal oscillator is connected to inputs XTAL1
(pin19) and XTAL2 (pin18)
• The quartz crystal oscillator also needs two capacitors of
30 pF value
• The original 8051 operates at 12 MHZ
Reset
➢Pin no : 9
➢RESET pin is an input and is active high (normally low)
➢Upon applying a high pulse to this pin, the microcontroller will reset and all
registers will be cleared
➢This is often referred to as a power-on reset
I/O Ports – Port 0
➢Pins 32 – 39
➢P0.0 to 0.7
➢General purpose I/O pins
➢Multiplexed with lower byte of
address and data for external
memory interfacing
I/O Ports – Port 1
➢Pins 1-8
➢P1.0 to 1.7
➢General purpose I/O pins
➢No additional function
I/O Ports – Port 2
➢Pins 21-28
➢P2.0 to 2.7
➢General purpose I/O pins
➢Multiplexed with higher byte of
address for external memory
interfacing
I/O Ports – Port 3
➢Pins 10-17
➢P3.0 to 3.7
➢General purpose I/O pins
➢Multifunctional
➢RXD, TXD : serial communication
➢INT0, INT1 : interrupts
➢T0,T1 : timers
➢WR,RD : external memory
External access (EA’)
• Pin no : 31
• EA : External Access
• Input pin and must be connected to Vcc or GND
• Active low pin
P2.0 - P2.7 I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
high order address byte during fetches from external
program memory and during accesses to external data
memory that use 16 bit addresses.
P3.0 - P3.7 I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
serves special features as explained.
Pin Description Summary
PIN TYPE NAME AND FUNCTION
RST I Reset: A high on this pin for two machine cycles while the
oscillator is running, resets the device.
ALE O Address Latch Enable: Output pulse for latching the low byte of
the address during an access to external memory.
PSEN* O Program Store Enable: The read strobe to external program
memory. When executing code from the external program
memory, PSEN* is activated twice each machine cycle, except
that two PSEN* activations are skipped during each access to
external data memory.
EA* I External Access Enable/Programming Supply Voltage: EA* must
be externally held low to enable the device to fetch code
from external program memory locations. If EA* Is held high,
the device executes from internal program memory.
References
• Lyla B. Das, The x86 Microprocessors: 8086 to Pentium,, Multicores,
Atom , and the 8051 Microcontroller : Architecture ,Programming
and Interfacing, Second Edition , Pearson Education ,India 2014