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DSP Unit 6

The document discusses multirate digital signal processing and covers topics like decimation, interpolation, sampling rate conversion, anti-aliasing filters, and anti-imaging filters. Decimation reduces the sampling rate by keeping every nth sample while interpolation increases it by inserting zeros. Sampling rate conversion can be done by first interpolating and then decimating. Anti-aliasing and anti-imaging filters are used before decimation and after interpolation respectively to avoid spectrum overlap.

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0% found this document useful (0 votes)
97 views

DSP Unit 6

The document discusses multirate digital signal processing and covers topics like decimation, interpolation, sampling rate conversion, anti-aliasing filters, and anti-imaging filters. Decimation reduces the sampling rate by keeping every nth sample while interpolation increases it by inserting zeros. Sampling rate conversion can be done by first interpolating and then decimating. Anti-aliasing and anti-imaging filters are used before decimation and after interpolation respectively to avoid spectrum overlap.

Uploaded by

SRH
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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DIGITAL SIGNAL PROCESSING

(DSP-8CC09)

Unit-VI
MULTIRATE DIGITAL SIGNAL PROCESSING

Faculty: V.RAJENDRA CHARY(VRC),


Assistant Professor,ECE,SNIST
Class: III B.Tech,I Semester, ECE
SYLLABUS
UNIT-
1. INTRODUCTION
2. DISCRETE FOURIER TRANSFORM
3. FAST FOURIER TRANSFORMS
…..mid 1
4. DIGITAL IIR FILTERS
5. DIGITAL FIR FILTERS
6. MULTIRATE DIGITAL SIGNAL PROCESSING
…..mid 2
RAJENDRA CHARY 2
UNIT-IV DIGITAL IIR FILTERS
• ANALOG FILTER APPROXIMATIONS – Butterworth and
Chebyshev Approximations.
• IIR DIGITAL FILTERS: Design of IIR Digital filters from analog
filters-Impulse Invariance, Step invariance and Bilinear
Transformation methods, Design Examples, Analog-Digital
transformations.Basic structures of IIR systems, Transposed forms,
• Applications: Design of IIR digital filter conforming to given
specifications.

RAJENDRA CHARY 3
UNIT-V DIGITAL FIR FILTERS
• FIR DIGITAL FILTERS:Characteristics of FIR Digital Filters,
frequency response, Design of FIR Digital Filters using Fourier
series method, Windowing Techniques-Rectangular, Triangular,
Hamming, Hanning and Bartlett’s Windows, Steps in Kaiser
windowing method, Frequency Sampling technique, Comparison
of IIR and FIR filters.Basic structures of FIR systems
• Applications: Design of FIR digital filter conforming to given
specifications.

RAJENDRA CHARY 4
UNIT-VI MULTIRATE DIGITAL SIGNAL
PROCESSING
• Decimation, interpolation, sampling rate conversion. Introduction
to DSP Processors.
• Applications of Multirate Digital Signal processing: Design of
digital filter banks and quadrature mirror filters etc.

RAJENDRA CHARY 5
REFERENCE TEXTBOOKS(R1)

RAJENDRA CHARY 6
REFERENCE TEXTBOOKS(R2)

RAJENDRA CHARY 7
REFERENCE TEXTBOOKS(R3)

RAJENDRA CHARY 8
Outline Of The Unit
• Decimation and Interpolation (3)
• Sampling rate conversion (1)
• Introduction to DSP Processors (1)
• Applications

RAJENDRA CHARY 9
RAJENDRA CHARY 10
Introduction
• The processing of a discrete time signal at different sampling rates
is called multirate Digital Signal Processing.
• The discrete time systems that employ sampling rate conversion
while processing the discrete time signals are called multirate DSP
Systems.
• The process of converting a signal from one sampling rate to
another sampling rate is called sampling rate conversion.

RAJENDRA CHARY 11
Introduction(contd.)
• There are two methods for sampling rate conversion viz…
a)Downsampling or decimation
b)Upsampling or Interpolation

RAJENDRA CHARY 12
Applications of Multirate DSP Systems
• Sub-band coding of speech signals and image compression.
• Digital transmultiplexers for converting TDM signals to FDM
signals and vice versa.
• Oversampling A/D and D/A converters for high quality digital
audio systems and data loggers(or digital storage systems)
• Narrowband FIR and IIR filters
• Quadrature mirror filters for realizing alias-free LTI multirate
systems.
RAJENDRA CHARY 13
Applications of Multirate DSP
Systems(contd.)
• In digital audio systems the sampling rates of broadcasted signal,
CD,MPEG etc..are different. Hence to access signals from all these
devices, sampling rate converters are needed in digital audio
systems.
• In video broadcasting the American standard NTSC(national
television system committee) and European standard PAL(phase
alternating line) employ different sampling rates. Hence to receive
both the signals, sampling rate converters are needed in video
receivers

RAJENDRA CHARY 14
Advantages of Multirate DSP Systems
• Computational requirement is less.
• Storage for filter coefficients is less.
• Finite word length effects are reduced.
• Finite arithmetic effects are less.
• Filter order required in multirate application is low.
• Sensitivity to filter coefficient lengths is less.

RAJENDRA CHARY 15
Upsampling(or Interpolation)
• The upsampling is the process of increasing the sampling rate of
the discrete time signal.
• Let x(n) be the discrete time signal and x(n/I) be the upsampled
version of x(n).
• Mathematically,
y(n)=x(n/I),I= sampling rate multiplication factor

RAJENDRA CHARY 16
Upsampling(or Interpolation)(contd.)
• Symbolically, the up sampler can be represented as:

• In upsampling, the sampling rate is increased by an integer factor I


by placing I-1 equally spaced zeros between each pair of samples.

RAJENDRA CHARY 17
Problem
• Consider the discrete time signal x(n)={1,2,3,4}.Determine the
upsampled version of the signals for the sampling rate
multiplication a)I=2 b)I=3 c)I=4. (R3 eg9.7)

RAJENDRA CHARY 18
Problem
• Consider the discrete time signal shown in fig 1.Sketch the
upsampled version of the signals for the sampling rate
multiplication a) I=2 b) I=3. (R3 eg9.8)

RAJENDRA CHARY 19
RAJENDRA CHARY 20
Downsampling(or Decimation)
• Downsampling is the process of reducing the samples of the
discrete time signal.
• Let x(n) be a discrete time signal and x(Dn) be the downsampled
version of x(n).
• Mathematically, the down sampling is represented by
y(n)=x(Dn)

RAJENDRA CHARY 21
Downsampling(or Decimation)(contd.)
• Symbolically, the down sampler can be represented as:

• In downsampling, the sampling rate is reduced by an integer factor


D by keeping every Dth sample and removing D-1 in between
samples.

RAJENDRA CHARY 22
Problem
• Consider the discrete time signal x(n)={1,2,3,4,5,6,7,8,9,10,11,12}.
Determine the downsampled version of the signals for the
following sampling rate reduction factors a)D=2 b)D=3 c)D=4
(R3 eg9.1)

RAJENDRA CHARY 23
Problem
• Consider the discrete time signal shown in figure1.Sketch the
downsampled version of the signals for the sampling rate reduction
factors a)D=2 b)D=3. (R3 eg9.2)

RAJENDRA CHARY 24
Sampling rate Conversion
• In decimation and interpolation, the sampling rate conversion is
achieved by integer factor(because D and I are integers).When
sampling rate conversion is required by non-integer factor,it is
possible to perform sampling rate conversion by a rational factor
I/D.
• A sampling rate conversion by a factor I/D can be achieved by first
performing interpolation by factor I and then performing
decimation by factor D.

RAJENDRA CHARY 25
Sampling rate Conversion(contd.)
• The block diagram of a sampling rate conversion is as shown in
figure:

RAJENDRA CHARY 26
Problem
• Given x[n]={1, 2, 3, 6, 5, -4, -5, 2, 5, 2, 1, …}. It is applied to the
sampling rate converter as shown in below figure and the output
of sampling rate converter is y1[n]. Find output y1[n] (A17 Reg)

RAJENDRA CHARY 27
Anti Aliasing filter
• If the input signal x(n) is not band limited, then there will be
overlapping of spectra at the output of the down sampler.
• This overlapping of spectra is called aliasing which is undesirable.
This aliasing can be eliminated by band limiting the input signal by
inserting a low-pass filter called anti-aliasing filter before the
down sampler.

RAJENDRA CHARY 28
Anti Aliasing filter(contd.)
• The input spectrum and aliased output spectrum is as shown in
figure:

RAJENDRA CHARY 29
Anti Aliasing filter(contd.)
• From figure, we can find that the spectrum obtained after down
sampling will overlap if the original spectrum is not band limited
to ω =π/D. This overlapping of spectra is called aliasing.
• Therefore aliasing due to down sampling a signal by a factor D is
absent if and only if the signal x(n) is bandlimited to ± π/D.

RAJENDRA CHARY 30
RAJENDRA CHARY 31
Anti Imaging filter
• The low pass filter used after the up sampler to remove the
images created due to up sampling is called anti-imaging filter.
• The spectrum of X(ω) and X(3ω) is shown in figure.

RAJENDRA CHARY 32
Anti Imaging filter(contd.)
• From figure, we observe that frequency spectrum X(3ω) is three-
fold repetition of X(ω).
• These additional spectra created are called image spectra and the
phenomenon is known as imaging.
• So, a low pass filter is used to avoid multiple images in the output
spectrum, this is called anti-imaging filter.

RAJENDRA CHARY 33
Problem
• Show that the upsampler and downsampler are time-variant
systems (R2 eg10.1)

RAJENDRA CHARY 34
Introduction to DSP Processors
• The Digital Signal Processors are microprocessors specially
designed for efficient implementation of digital signal processing
systems.
• The pioneers in developing digital signal processors are Texas
Instruments and Analog Devices of USA.
• Texas Instruments has released TMS320 series of Digital Signal
Processors.

RAJENDRA CHARY 35
Introduction to DSP Processors(contd.)
• The TMS320 family of processors include four basic types of
processors viz..
1)16-bit fixed point Processors
2)32-bit floating point Processors
3)VLIW(Very Large Instruction Word) architecture Processors
4)Multiprocessor DSP

RAJENDRA CHARY 36
Special features of DSP Processors

RAJENDRA CHARY 37
Advantages of DSP Processors over
Conventional microprocessors

RAJENDRA CHARY 38
Block diagram of DSK6713

RAJENDRA CHARY 39
Features of TMS320C6713 DSP Processor

RAJENDRA CHARY 40
DSK6713(TMS320C6713)

RAJENDRA CHARY 41
Architecture of TMS320C5x Processor
• The TMS320C5x processors have an advanced version of Harvard
architecture with separate buses for program and data which
facilitate simultaneous access of program and data.
• The program bus has separate lines to transmit data and address.
• The data bus has separate lines to transmit data and address.
• The architecture of TMS320C5x processors can be broadly
classified into three major areas. They are CPU(Central Processing
Unit),memory and peripherals.

RAJENDRA CHARY 42
Architecture of TMS320C5x
Processor(contd.)

RAJENDRA CHARY 43
Architecture of TMS320C5x
Processor(contd.)
• The functional units of CPU are Parallel Logic Unit(PLU),central
ALU,memory mapped registers,Auxiliary register Arithmetic
Unit(ARAU) and program controller.
• The TMS320C5x processor has the following internal(or on-
chip)memory
-program ROM(2k to 32k words)
-Data/program Dual Acccess RAM(DARAM) (1024+32=1056
words)
- Data/program Single Acccess RAM(SARAM) (1k to 9k words)
RAJENDRA CHARY 44
Architecture of TMS320C5x
Processor(contd.)

RAJENDRA CHARY 45
Addressing modes of TMS320C5x Processors

• The addressing mode is the method of specifying the data to be


operated by an instruction. The TMS320C5x family of processors
supports the following six addressing modes:
1)Direct addressing mode
2)Memory-mapped register addressing mode
3)Indirect addressing mode
4) Immediate addressing mode
5)Dedicated-register addressing mode 6)circular addressing mode
RAJENDRA CHARY 46
RAJENDRA CHARY 47
Direct addressing mode

RAJENDRA CHARY 48
Memory mapped register addressing mode

RAJENDRA CHARY 49
Memory mapped register addressing
mode(contd.)
• LMMR-Load memory mapped register
• SMMR-Store memory mapped register

RAJENDRA CHARY 50
Indirect addressing mode
• In Indirect addressing mode, the data memory address is specified
by the content of one of the eight auxiliary registers AR0-AR7.
• The AR(Auxiliary register) currently used for accessing data is
denoted by APR(Auxiliary Register Pointer).
• In Indirect addressing mode, the content of AR can be updated
automatically either before or after the operand is fetched.
• The syntax used in the operand field of instruction for modifying
the content AR is listed in table(next slide)

RAJENDRA CHARY 51
Indirect addressing mode(contd.)

RAJENDRA CHARY 52
Indirect addressing mode(contd.)

RAJENDRA CHARY 53
Immediate addressing mode
• In Immediate addressing mode, the data is specified as a part of the
instruction.
• In this addressing the instruction will carry an 80bit/9-bit/13-
bit/16-bit constant, which is the data to be operated by the
instruction.
• The immediate constant is specified by # symbol.

RAJENDRA CHARY 54
Dedicated-register addressing mode

RAJENDRA CHARY 55
Circular addressing mode

RAJENDRA CHARY 56
Von Neumann Architecture

RAJENDRA CHARY 57
Harvard Architecture

RAJENDRA CHARY 58
Modified Harvard Architecture

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VLIW Architecture

RAJENDRA CHARY 60
Spectrum of upsampled Signal

RAJENDRA CHARY 61
Spectrum of upsampled Signal(contd.)

RAJENDRA CHARY 62
Spectrum of upsampled Signal(contd.)

RAJENDRA CHARY 63
Spectrum of downsampled Signal

RAJENDRA CHARY 64
Spectrum of downsampled Signal(contd.)

RAJENDRA CHARY 65
Spectrum of downsampled Signal(contd.)

RAJENDRA CHARY 66
Spectrum of downsampled Signal(contd.)

RAJENDRA CHARY 67
Spectrum of downsampled Signal(contd.)

RAJENDRA CHARY 68
Spectrum of downsampled Signal(contd.)

RAJENDRA CHARY 69
Spectrum of downsampled Signal(contd.)

RAJENDRA CHARY 70
Spectrum of sampling rate conversion

RAJENDRA CHARY 71
Spectrum of sampling rate conversion(contd.)

RAJENDRA CHARY 72
Spectrum of sampling rate conversion(contd.)

RAJENDRA CHARY 73
Spectrum of sampling rate conversion(contd.)

RAJENDRA CHARY 74
Application
• Design of digital filter banks and quadrature mirror filters etc.

RAJENDRA CHARY 75
Lecture Plan
Lecture no. Date&period no.
1 31/10/2022,P-1
2 01/11/2022,P-3
3 03/11/2022,P-1
4 /11/2022,P-
5 /11/2022,P-
6 /11/2022,P-

RAJENDRA CHARY 76
RAJENDRA CHARY 77
Previous Year Problems(A18 Reg July2022)

• Discuss upsampling and its importance with block diagram.


• A)Discuss time domain and frequency domain relations of
sampling rate converters with examples.
B)Explain the applications of multirate signal processing

RAJENDRA CHARY 78
Previous Year Problems(A18 Reg Aug 2021)

• A)Define Multirate systems and Sampling rate conversion.


B)Discuss the sampling rate conversion by a factor I/D with the help
of a neat block diagram.
• Highlight the architectural features of DSP Processors.

RAJENDRA CHARY 79
Previous Year Problems(A17 Supply Feb
2022)
• Explain the concepts of decimation with the help of waveform
illustrations.

RAJENDRA CHARY 80
Previous Year Problems(A17 Reg Dec2019)

• A)Explain applications of Multirate signal processing.


B)Given x[n]={1, 2, 3, 6, 5, -4, -5, 2, 5, 2, 1, …}. It is applied to the
sampling rate converter as shown in below figure and the output
of sampling rate converter is y1[n]. Find output y1[n]

RAJENDRA CHARY 81
Previous Year Problems(A17 Reg Dec2019)

• Distinguish between Decimation and Interpolation.


• What is Multirate Signal Processing?

RAJENDRA CHARY 82
Previous Year Problems(A17 Supply Nov2017)

• What are the advantages of multirate signal processing?


• Explain Decimation.
• Determine the upsampled version of the signals for the sampling
rate multiplication factor I=2, I=3 for the signal x[n] = {1, 2, 3, 4}
and down sampled version of the signals for the sampling rate
reduction factor D=2, D=3 for the signal x[n] = {1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 12}.
• Give introduction to Digital signal processors.

RAJENDRA CHARY 83
Previous Year Problems(A14 Supply Nov2017)

• A)Explain the process of decimation by a factor D for down


sampling with an illustration of sinusoidal sequence.
B)What is Imaging and Aliasing? How their spectra differ.

RAJENDRA CHARY 84
Previous Year Problems(A12 Supply May2017)

• What is multi rate signal processing and if the Z transform of a


sequence x[n] is X(z), then what is the Z-transform of a sequence
down sampled by a factor M.
• (a) Explain with block diagram of the general phase frame work
for decimators and interpolators.
(b) With the block diagram explain the sampling rate conversion
by a factor I/D

RAJENDRA CHARY 85
Conclusion of the Unit
In this unit we studied about:
• Decimation and Interpolation
• Sampling rate conversion
• Introduction to DSP Processors
• Applications
• Tutorial/Assignment problems

RAJENDRA CHARY 86
Thank you
For Your Attention !
Any Questions
RAJENDRA CHARY 87

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