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Ex. 1 C01 Assignment 1

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9 views

Ex. 1 C01 Assignment 1

Uploaded by

tanv3770
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Part A.
1. A microprocessor, with clock rate of 10 MHz, has multiply instruction. The
instruction has five stages: fetch opcode (three clock cycles), fetch operand address
(three cycles), fetch operand (three cycles), multiply operation (three cycles), store
operand (three cycles).
a. Assuming that we have to add 3 cycles in each memory read and memory write
operation and multiply operation takes 10 cycles instead of 3 cycles. By what
amount (in percent) will the duration of the instruction increase?
b. A keyboard actives an interrupt request line at the beginning of stage: fetch
operand address. After how long does the processor enter the interrupt processing
cycle?
Answer:
2. Cache memory and main memory have the following elements:
• The cache can hold 128 Kbytes.
• Data are transferred between main memory and the cache in blocks of 16 bytes
each.
• The byte directly addressable main memory consists has 24-bit address.
a. What is the maximum directly addressable memory capacity (in bytes)?
b. In case of direct mapped cache, show the format of main memory addresses.
c. Into what line would bytes with each of the following addresses be stored?
1100 0011 0011 0100 0011 0100
1101 0000 0001 1101 0001 1101
Answer
Part B
1. Which of the following component(s) do (does) not belong to central
processing unit:
A. I/O modules
B. Arithmetic and logic unit
C. Set of general-purpose registers
D. Control unit
2. Which of the following statements belongs to the content of Von
Newmann's principle?
A. The computer uses a program counter to indicate the location of the
next instruction
B. The computer can control all activities by a single program
C. Computer memory is not addressable
D. Each instruction must have a memory location containing the address of
the next instruction

3. The basic components of a computer are:


A. Main memory, CPU and I/O modules
B. Main Memory, CPU and Peripherals
C. Main memory, CPU, I/O modules and peripherals
D. Main memory, CPU, I/O modules and system interconnection

4. What is the function of the bus system in the computer?


A. Extend the communication function of the computer
B. Connect components in the computer
C. Controll Peripherals
D. Transform Signals in the computer
5. What is (are) the important characteristic(s) of the Synchronous Bus?
A. Data is transmitted at the same time
B. Data is transmitted asynchronously
C. There is a common clock signal to control the operation
D. No common clock signal controlling operation

6. Why is the synchronous bus more widely used in practice than


asynchronous bus?
A. Make good use of CPU processing time
B. Control the operation of the computer easier
C. Take advantage of technological advances
D. Allow to change the bus cycle dynamically
7. Bus Width is determined by:
A. Bus data line number
B. Number of components connected to Bus
C. Number of data bytes transferred per unit of time
D. Number of Data Bits transferred in a unit of time

8. Bus bandwidth of PCI (Pheriperal Component Interconnect) is determined


by (choose one):
A. Number of Bytes transferred to the Bus in one clock cycle
B. Number of Bits transferred to the Bus in one clock cycle
C. Number of Bytes transferred to the Bus in a unit of time
D. Number of Bits transferred to the Bus in a unit of time
9. The PCI bus has a frequency of 33MHz, the bus width is 32 bits, the
transmission time of a 32-bit block needs 2 cycles. Then the bus bandwidth
is equal to:
A. 8 MB/s
B. 16 MB/s
C. 33 MB/s
D. 66 MB/s
10. In a 2N×M memory structure, which of the following statements is true?
A. Memory consists of 2N Bytes and M memory modules
B. Memory consists of 2N memory words and M memory modules
C. Memory consists of 2N memory words, each memory word contains
M bits
D. Memory consists of 2N memory words and M memory modules
11. Which of the following memories has random access?
A. DRAM
B. ROM
C. Cache
D. All three types above
12.The special feature(s) of Memory Cache is(are):
A. Has a larger capacity than memory RAM
B. Allows faster access than DRAM memory
C. Allows faster access than CPU registers
D. Fixed memory
13.Special Feature(s) of Memory DRAM
A. Small access time
B. High cost per bit
C. No refresh in one cycle
D. Refresh in one cycle
14. The special feature(s) of memory ROM is (are):
A. Allows faster access to RAM memory
B. Content cannot be changed
C. Can store more information than RAM memory
D. Used as Cache
15.For random memory access, which of the following statement(s) is (are)
false?
A. To access to any words or cells in the memory, we need only the their
addresses.
B. Access time to any memory cells or words are the same
C. Addresses consist of rows and columns of addresses
D. Data in memory cannot be read or written sequentially by memory
address
16. How many bytes of data does each sector in the hard drive disk have?
A. 128
B. 256
C. 512
D. 1024
17. Asumming one magnectic disk has 40 tracks, each track divided into 8
sectors, what is the capacity of this disk?
A. 80 KB
B. 160 KB
C. 320 KB
D. 640 KB
18.The DMA method:
A. Direct data exchange between I/O modules and main memory
B. Direct data exchange between main memory and cache memory
C. Direct data exchange between external -memory and cache memory
D. Direct data exchange between peripherals and main memory
19. A byte addressable microprocessor has 20 bit address. What is maximum
memory capacity?
A. 1 MegaByte
B. 4 MegaByte
C. 8 MegaByte
D. 16 MegaByte
20. In modern computers, which devices among the memory types usually
have the smallest capacity?
A. ROM
B. RAM
C. Cache Memory
D. Hard Drive Disk

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