Chapter 4

Sequential Circuits
M. Morris Mano, Charles R. Kime. (2015). Logic and computer design fundamentals (5th ed.). Pearson.

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Contents

1. Sequential Circuit Definitions

2. Latches
3. Flip-Flops
4. Sequential Circuit Analysis
5. Sequential Circuit Design

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1. Sequential Circuit Definitions

• Sequential circuits are formed by interconnecting a combinational circuit

and storage elements.
• The storage elements are circuits that are capable of storing binary
information.
• The binary information
stored in these elements
at any given time defines
the state of the sequential
circuit at that time.
• The outputs and the next
state are a function of the
inputs and the present state.

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1. Sequential Circuit Definitions

• Information is stored in digital systems in many ways,

including the use of logic circuits.
• Figure 4-2(a) shows a buffer. This buffer has a gate
delay tG.
• Since information present at the buffer input at time t
appears at the buffer output at time t + tG, the
information has effectively been stored for time tG.
• But, in general, we wish to store information for an
indefinite time that is typically much longer than the
time delay of one or even many gates. This stored
value is to be changed at arbitrary times based on
the inputs applied to the circuit and the duration of
storage of a value should be longer than the specific
time delay of a gate.
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1. Sequential Circuit Definitions

• Figure 4-2(b) (c) : The output of the buffer is

connected to its input.
• Suppose that the value on the input to the
buffer in part (b) has been 0 for at least time tG,
the delay of the buffer. Then the output
produced by the buffer will be 0 at time t + tG.
This output is applied to the input so that the
output will also be 0 at time t + 2tG.
• This relationship between input and output
holds for all t, so the 0 will be stored
indefinitely.
• The same argument can be made for storing a
1 in the circuit in Figure 4-2(c)
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Types of Sequential Circuits

• Asynchronous
• Storage elements can change their
state at any instant of time as soon
as the input(s) changes. (latches)
• Synchronous
• Storage elements observe inputs
and can change state only in
relation to a timing signal (clock
pulses from a clock) (flip-flops)

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Comparison of Sequential Circuits

• Asynchronous
• Potentially faster
• Harder to analyze

• Synchronous
• Easier to analyze
• Choose the clock so that changes are only allowed to occur before
next clock pulse

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2. Latches

• SR Latches

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2. Latches

• SR Latches

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2.Latches

• SR Latch with Control Input

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2. Latches

• D Latches
• To eliminate the
undesirable undefined
state in the SR latch is
to ensure that inputs S
and R are never equal
to 1 at the same time.

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3. Flip-Flops

• Note that the problem with the latch is that it is transparent:

• As soon as an input changes, shortly thereafter the corresponding
output changes to match it. This transparency is what allows a
change on a latch output to produce additional changes at other
latch outputs while the clock pulse is at logic 1.
• The key to the proper operation of flip-flops is to prevent them
from being transparent. In a flip-flop, before an output can change,
the path from its inputs to its outputs is broken.

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3. Flip-Flops

• A common way to create a flip-flop is to connect two latches

which is often referred to as a master–slave flip-flop.
• The left latch, the master,
changes its value based upon
the input while the clock is high.
That value is then transferred to
the right latch, the slave, when
the clock changes to low.

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 Edge-Triggered Flip-Flop

• Edge-Triggered Flip-Flop: A flip-flop that triggers only during a

signal transition from 0 to 1 (or from 1 to 0) on the clock and that
is disabled at all other times, including for the duration of the
clock pulse.

Q=D Q = D when
when the the positive
negative edge occurs.
edge 14
occurs.
 Standard Graphics Symbols

The pulse-triggered flip-flop

Postponed is indicated as such with a
output right-angle symbol called a
indicators postponed output indicator
in front of the outputs. This
symbol shows that the
output signal changes at the
end of the pulse.

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Standard Graphics Symbols

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Direct Inputs

• Flip-flops often provide

special inputs for setting
and resetting them
asynchronously (i.e.,
independently of the clock
input C).
• Direct set or preset:
asynchronously set the flip-
flop
• Direct reset or clear:
asynchronously reset the
flip-flop

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 4. Sequential Circuit Analysis

• The outputs and the next state are a function

of the inputs and the present state.
• Input X
• State (A, B)
• Output Y
• Input Equations
• The part of the combinational circuit that
generates the signals for the inputs of flip-flops
can be described by a set of Boolean functions
called flip-flop input equations.

DA : Flip-flop input of FF A
DB: Flip-flop input of FF B

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4. Sequential Circuit Analysis
• State Table
• The functional relationships among the inputs,
outputs, and flip-flop states of a sequential
circuit can be enumerated in a state table.

In general, a sequential circuit with m flip-flops and

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n inputs needs 2m+n rows in the state table.
 State Diagram
• The information available in a state table may be represented graphically in the form of a
state diagram.
• A state is represented by a circle, and transitions between states are indicated by directed
lines connecting the circles.
• The binary number inside each circle identifies the state of the flip-flops.

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Equivalent State Definition

• Two states are equivalent if the output produced for each input
symbol is identical and the next states for each input symbol are
the same or equivalent.
• These equivalent states can be merged into a single state.

- States 11 and 10 are equivalent.

- States 01 and 11 are equivalent.
- Three states 11, 10, 01 are equivalent and can be merged into a single state.

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5. Sequential Circuit Design

• A synchronous sequential circuit is made up of flip-flops and

combinational gates.
• The minimum number of flip-flops is determined by the
number of states in the circuit; n flip-flops can represent up
to 2n binary states.
• The combinational circuit is derived from the state table by
finding the flip-flop input equations and output equations.
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Design Procedure

• Design Procedure
1. Specification: Write a specification for the circuit, if not already available.
2. Formulation: Obtain either a state diagram or a state table from the statement of
the problem.
3. State Assignment: If only a state diagram is available from step 2, obtain the state
table. Assign binary codes to the states in the table.
4. Flip-Flop Input Equation Determination: Select the flip-flop type or types. Derive
the flip-flop input equations from the next-state entries in the encoded state table.
5. Output Equation Determination: Derive output equations from the output entries
in the state table.
6. Optimization: Optimize the flip-flop input equations and output equations.
7. Technology mapping: Draw a logic diagram of the circuit using flip-flops, ANDs,
ORs, and inverters. Transform the logic diagram to a new diagram using the available
flip-flop and gate technology.
8. Verification: Verify the correctness of the final design. 23
Finding State Diagrams and State Tables

• Fundamental to the formulation of state diagrams and

tables is an intuitive understanding of the concept of a state.
• A state is used to “remember” something about the history
of input combinations applied to the circuit either at
triggering clock edges or during triggering pulses.
• In most cases, however, a state is an abstraction of the
sequence of input combinations at the triggering points.
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Finding State Diagrams and State Tables

• When the power in a digital system is first turned on, the state of
the flip-flops is unknown.
• The circuits must have a known initial state (reset state).
• Reset places the circuit in its initial state.

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Finding State Diagrams and State Tables

• Example 4.3: Finding a State Diagram for a Sequence Recognizer

• This “sequence recognizer” has one input X and one output Z.
• It has Reset applied to the direct reset inputs on its flip-flops to initialize the
state of the circuit to all zeros.
• The circuit is to recognize the occurrence of the sequence of bits 1101 on X by
making Z equal to 1 when the previous three inputs to the circuit were 110 and
current input is a 1. Otherwise, Z equals 0.

Initial state A
States are used to “remember” the previous three inputs in the sequence.

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 Example 4.3: Finding a State Diagram for a
Sequence Recognizer (1101)

Present X Next Z
State State
0/0 1/0 A 0 A 0

1/0 1/0 A 1 B 0
A B C 0/0 D
1 11 110
B 0 A 0
B 1 C 0
0/0 1/1 C 0 D 0

0/0 C 1 C 0
D 0 A 0
D 1 B 1

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State Assignment

• In contrast to the states in the analysis examples, the states

in the diagrams constructed have been assigned symbolic
names rather than binary codes. It is necessary to replace
these symbolic names with binary codes in order to
proceed with the design.
• In general, if there are m states, then the codes must contain
at least n bits, where 2n ≥ m, and each state must be
assigned a unique code. (2n ≥ m > 2n-1)
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State Assignment

• The code words are assigned in counting order. For example, for states A, B, C, and D, the
codes 00, 01, 10, and 11 are assigned to A, B, C, and D, respectively.
• An alternative that is attractive, particularly if K-maps are being used for optimization, is to
assign the codes in Gray code order, with codes 00, 01, 11, and 10 assigned to A, B, C, and D,
respectively.
• There are a number of specialized state assignment methods, some of which are based on
efficient structures for implementing at least a portion of the transitions. The most popular of
these methods is the one flip-flop per state or one-hot assignment. This assignment uses a
distinct flip-flop for each of the m states, so it generates codes that are m bits long. The
sequential circuit is in a state when the flip-flop corresponding to that state contains a 1. By
definition, all flip-flops corresponding to the other states must contain 0. Thus, each valid state
code contains m bits, with one bit equal to 1 and all other m − 1 bits equal to 0.

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 Example 4.3: Finding a State Diagram for a
Sequence Recognizer (1101)

• State names replaced by a 2-bit binary Gray code

• 4 States → 2 flip-flops
• A: 00 B: 01 C: 11 D: 10
Present X Next Z Present X Next Z
State State State State
A 0 A 0
00 0 00 0
A 1 B 0 00 1 01 0
B 0 A 0 01 0 00 0
B 1 C 0 01 1 11 0
C 0 D 0 11 0 10 0
C 1 C 0 11 1 11 0
D 0 A 0 10 0 00 0
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D 1 B 1 10 1 01 1
Example 4.3: Finding a State Diagram for a
Sequence Recognizer (1101)

• State names replaced by a 4-bit one-hot code

• 4 states → 4 flip-flops
• A: 1000 B: 0100 C: 0010 D: 0001

Present X Next Z Present X Next Z

State State State State
A 0 A 0 1000 0 1000 0
A 1 B 0 1000 1 0100 0
B 0 A 0 0100 0 1000 0
B 1 C 0 0100 1 0010 0
C 0 D 0 0010 0 0001 0
C 1 C 0 0010 1 0010 0
D 0 A 0 0001 0 1000 0
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D 1 B 1 0001 1 0100 1
 Designing with D Flip-Flops

• For the Gray-coded design, two flip-flops are needed to represent the four states.
• Flip-flop A and B
Present State X Next State Z
AB AB
00 0 00 0
00 1 01 0
01 0 00 0
01 1 11 0
11 0 10 0
11 1 11 0
10 0 00 0
10 1 01 1 32
Designing with D Flip-Flops

• For the Gray-coded design, two flip-flops are needed to represent the four states.
• Flip-flop A and B

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Designing with D Flip-Flops

• For the Gray-coded design, two flip-flops are needed to represent the four states.
• Flip-flop A and B

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 Designing with D Flip-Flops

• For the one-hot code design, four flip-flops are needed to represent the four states.
• Flip-flop A, B, C and D

Present X Next Z
State State
1000 0 1000 0
1000 1 0100 0
0100 0 1000 0
0100 1 0010 0
0010 0 0001 0
0010 1 0010 0
0001 0 1000 0
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0001 1 0100 1
Designing with D Flip-Flops

• For the one-hot code design, four

flip-flops are needed to represent the four states.
• Flip-flop A, B, C and D

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