Two Port Networks
Two Port Networks
Rourkela
Two-port Network and It’s Network Parameters
EE2400: Network Analysis/ EE2401: Network Theory
2 Z-parameters
3 Y-parameters
4 ABCD-parameters
5 Inv-ABCD-parameters
6 Hybrid-parameters
7 Inv. Hybrid-parameters
8 Parameters conversion
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Introduction
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Introduction
q A network with two input and two output terminal is called a four terminal
or a two-port network
q Example: Attenuator, Filter, Impedance Matching Network, Amplifier,
Amplitude and Phase equalizer etc.
q There are four terminal variables , namely V1 , V2 , I1 , I2 only two of them
are independent.
q Hence , there are only six (i.e., 4 C2 = 6) possible sets of two-port
parameters.
q Six parameters are Z, Y, ABCD, inverse-ABCD, h and g parameters
I1 I2
+ Two-port +
V1 V2
− Network −
I1 I2
Figure 1: Two-Port Network
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Z-parameters
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Z-parameters
q The input and output voltages V1 and V2 can be written in terms of input
and output current I1 and I2 as
V1 Z Z12 I1
= 11 . (1)
V2 Z21 Z22 I2
q It is to be noted that Z11 , Z12 , Z21 and Z22 might be obtain by making
port-1 open circuited (i.e., I1 = 0) or port-2 open circuited (i.e., I2 = 0).
Thus we obtain
Z11 = VI11 Z12 = VI21
I2 =0 I1 =0
V2 V2
Z21 = I1 Z22 = I2
I2 =0 I1 =0
q Z-parameters are referred to as open-circuit impedance parameters
q Z11(22) is input (output) impedance when output (input) port is open
circuited
q Z12(21) is open-circuit transfer impedance when output (input) port is
open circuited
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Z-parameters Circuit
I1 Z11 Z22 I2
+ +
+ +
V1 Z12 I2 Z21 I1 V2
− −
− −
V1 =Z11 I1 + Z12 I2
V2 =Z21 I1 + Z22 I2
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Z-parameter example
q The Z-parameters are obtain as follows:
Z11 = Z1 + Z3 Z22 = Z2 + Z3
q When I2 = 0, we have V2 = Z3 I1 so that
Z12 = Z3
q Similarly when I1 = 0, we have V1 = Z3 I2 so that
Z21 = Z3
q As Z12 = Z21 , the network is reciprocal.
q Thus synthesis equations of T Network are
Z1 = Z11 − Z12 Z2 = Z22 − Z12 and Z3 = Z12
Z1 Z2
1 3 2
1 2
Z3
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Application of Z-parameters
I1 I1a I2a I2
+ +
+ V1a [Za ] V2a +
− −
I1a I2a
V1 V2
I1b I2b
+ +
− V1b [Zb ] V2b −
− −
I1 I1b I2b I2
Figure 3: Series Connection of Two-port Networks
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Series Connection of Two-port Networks
q The network a and b can be characterized as
V1a Z Z12a I1a
= 11a (2)
V2a Z21a Z22a I2a
V1b Z Z12b I1b
= 11b (3)
V2b Z21b Z22b I2b
q The overall network after series connection of a and b can be
characterized as
V1 Z11 Z12 I1
= (4)
V2 Z21 Z22 I2
q KVL equations at port-1 and port-2 can be written as
V1 =V1a + V1b (5)
V2 =V2a + V2b (6)
or
V1 V V
= 1a + 1b (7)
V2 V2a V2b
Circuit-EM Co-Design Lab
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Series Connection of Two-port Networks
q KCL equations at +ve and −ve terminal of port-1 and +ve and −ve
terminal of port-2 can be written as
I1 =I1a I1 = I1b (8)
I2 =I2a I2 = I2b (9)
or
I1 I I
= 1a = 1b (10)
I2 I2a I2b
q Using the KVL and KCL equations we can write
V1 Z11a Z12a Z11b Z12b I1
= + (11)
V2 Z21a Z22a Z21b Z22b I2
q Comparing (11) with (4), we have
Z11 Z12 Z Z12a Z Z12b
= 11a + 11b (12)
Z21 Z22 Z21a Z22a Z21b Z22b
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Y-parameters
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Y-parameters
q The input and output currents I1 and I2 can be written in terms of input
and output voltages V1 and V2 as
I1 Y Y12 V1
= 11 . (13)
I2 Y21 Y22 V2
q It is to be noted that Y11 , Y12 , Y21 and Y22 might be obtain by making
port-1 short circuited (i.e., V1 = 0) or port-2 short circuited (i.e., V2 = 0).
Thus we obtain
Y11 = VI11 Y12 = VI12
V2 =0 V1 =0
I2 I2
Y21 = V1 Y22 = V2
V2 =0 V1 =0
q Y-parameters are referred to as short-circuit admittance parameters
q Y11(22) is input (output) admittance when output (input) port is short
circuited
q Y12(21) is short-circuit transfer admittance when output (input) port is
short circuited
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Y-parameters Circuit
I1 I2
+ +
+ +
V1 − V1 Y11 Y12 V2 Y21 V1 Y22 V2 − V2
− −
I1 =Y11 V1 + Y12 V2
I2 =Y21 V1 + Y22 V2
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Y-parameter example
q The Y-parameters are obtain as follows:
Y11 = Y1 + Y3 Y22 = Y2 + Y3
q When V1 = 0, we have I1 = −Y3 V2 so that
Y12 = −Y3
q Similarly when V2 = 0, we have I2 = −Y3 V1 so that
Y21 = −Y3
q Thus synthesis equations of Π network are
Y1 = Y11 + Y12 Y2 = Y22 + Y12 and Y3 = −Y12
Y3
1 2
1 2
Y1 Y2
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Application of Y-parameters
I1a I2a
+ +
V1a [Ya ] V2a
I1 − − I2
+ I1a I2a +
V1 V2
− I1b I2b −
I1 + + I2
V1b [Yb ] V2b
− −
I1b I2b
Figure 5: Shunt/ Parallel Connection of Two-port Networks
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Parallel Connection of Two-port Networks
q The Y-matrices of network a and b can be characterized as
I1a Y Y12a V1a
= 11a (14)
I2a Y21a Y22a V2a
I1b Y Y12b V1b
= 11b (15)
I2b Y21b Y22b V2b
q The Y-matrices of overall network after shunt/parallel connection of a and
b can be characterized as
I1 Y11 Y12 V1
= (16)
I2 Y21 Y22 V2
q KCL equations at +ve terminal junctions at port-1 and port-2 can be
written as
I1 =I1a + I1b (17)
I2 =I2a + I2b (18)
or
I1 I I
= 1a + 1b (19)
I2 I2a I2b Circuit-EM Co-Design Lab
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Parallel Connection of Two-port Networks
q KVL equations at port-1 and port-2 can be written as
V1 =V1a V1 = V1b (20)
V2 =V2a V2 = V2b (21)
or
V1 V V
= 1a = 1b (22)
V2 V2a V2b
q Using the KVL and KCL equations we can write
I1 Y11a Y12a Y11b Y12b V1
= + (23)
I2 Y21a Y22a Y21b Y22b V2
q Comparing (23) with (16), we have
Y11 Y12 Y Y12a Y Y12b
= 11a + 11b (24)
Y21 Y22 Y21a Y22a Y21b Y22b
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Y-matrix to Z-matrix
q From (1) and (13), we can write
−1
Z11 Z12 Y Y12
= 11
Z21 Z22 Y21 Y22
T
1 Y22 −Y21
=
det(Y) −Y12 Y11
1 Y22 −Y12
= (25)
Y11 Y22 − Y21 Y12 −Y21 Y11
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Z-matrix to Y-matrix
q From (1) and (13), we can write
−1
Y11 Y12 Z Z12
= 11
Y21 Y22 Z21 Z22
T
1 Z22 −Z21
=
det(Z) −Z12 Z11
1 Z22 −Z12
=
Z11 Z22 − Z21 Z12 −Z21 Z11
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Π to T network conversion
Zc Z1 Z2
Za Zb Z3
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Π to T network conversion
q Y-matrix of Π network can be converted into Z-matrix using (26)
1 1 1
1 Zb + Zc Zc
[Z]Π = 1 1 1 (30)
∆ YΠ Zc Za + Zc
where
1 1 1 1 1
∆ YΠ = + + − 2
Zb Zc Za Zc Zc
1 1 1
= + +
Za Zb Zb Zc Zc Za
Za + Zb + Zc
=
Za Zb Zc
q Therefore
" #
Zb +Zc 1
Za Zb Zc Zb Zc Zc
[Z]Π = 1 Za +Zc (31)
Za + Zb + Zc Zc Za Zc
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Π to T network conversion
q As the Π network is equivalent to T-network [ZT ] = [ZΠ ]
Za Zb
Z3 = (32a)
Za + Zb + Zc
Za (Zb + Zc )
Z1 + Z3 = (32b)
Za + Zb + Zc
Zb (Za + Zc )
Z2 + Z3 = (32c)
Za + Zb + Zc
q The Π to T network conversion equations are given as
Za Zc
Z1 = (33a)
Za + Zb + Zc
Zb Zc
Z2 = (33b)
Za + Zb + Zc
Za Zb
Z3 = (33c)
Za + Zb + Zc
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T to Π network conversion
q The Y-matrix of T-network can be written as
1 Z2 + Z3 −Z3
[Y]T = (34)
∆ZT −Z3 Z1 + Z3
where
q Therefore
1 Z2 + Z3 −Z3
[Y]T = (35)
Z1 Z2 + Z2 Z3 + Z3 Z1 −Z3 Z1 + Z3
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T to Π network conversion
q As the T-network is equivalent to Π-network, we can write [Y]Π = [Y]T
1 Z3
= (36)
Zc Z1 Z2 + Z2 Z3 + Z3 Z1
1 1 Z2 + Z3
+ = (37)
Za Zc Z1 Z2 + Z2 Z3 + Z3 Z1
1 1 Z1 + Z3
+ = (38)
Zb Zc Z1 Z2 + Z2 Z3 + Z3 Z1
q Therefore, T-network to Π network conversion equations are
Z1 Z2 + Z2 Z3 + Z3 Z1
Za = (39)
Z2
Z1 Z2 + Z2 Z3 + Z3 Z1
Zb = (40)
Z1
Z1 Z2 + Z2 Z3 + Z3 Z1
Zc = (41)
Z3
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ABCD-parameters
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ABCD or Transmission-parameters
q The voltage and currents at the input V1 and I1 can be written in terms of
output voltage and current V2 and I2 as
V1 A B V2
= . (42)
I1 C D −I2
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Inv-ABCD-parameters
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Inv-ABCD or Transmission-parameters
q The ABCD parameters equation can be rewritten as
V1 A B 1 0 V2
=
I1 C D 0 −1 I2
A −B V2
= (43)
C −D I2
1 0
q Multiplying both side by , we have
0 −1
1 0 V1 1 0 A −B V2
=
0 −1 I1 0 −1 C −D I2
V1 A −B V2
=
−I1 −C D I2
q Therefore inv-ABCD matrix can be written as
−1
V2 A −B V1 1 D B V1
= = (44)
I2 −C D −I1 AD − BC C A −I1
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ABCD-parameter example
q The
ABCD-parameters
of a series impedance Z can be given as,
A B 1 Z
=
C D 0 1
q The
ABCD-parameters
of a shunt admittance Y can be given as,
A B 1 0
=
C D Y 1
q The
ABCD-parameters
of a ideal transformer might be written as,
A B a 0
=
C D 0 a1
q a is the primary to secondary turns ratio.
Y N1 N2
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Application of ABCD-parameters
I1a I2a I1b I2b
+ + + +
V1a [Aa ] V2a V1b [Ab ] V2b
− − − −
I1a I2a I1b I2b
Figure 6: Cascade Connection of Two-port Networks
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ABCD-parameter example
q The ABCD matrix of L-network is
A B 1 0 1 Z2
=
C D Y1 1 0 1
1 Z2
= (45)
Y1 1 + Y1 Z2
q The ABCD matrix of inv-L-network is
A B 1 Z1 1 0
=
C D 0 1 Y2 1
1 + Z1 Y2 Z1
= (46)
Y2 1
Z2 Z1
Y1 Y2
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Cascade Transfer Function
R
+ +
V1 C V2
− −
Figure 7: Single RC Network
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Cascade Transfer Function
q Therefore, the ABCD matrix of the RC network is
A B 1 R 1 0 1 + RCs R
= =
C D RC 0 1 Cs 1 Cs 1
V1 =AV2 − BI2
I1 =CV2 − DI2 .
V2 1 1
H(s) = = =
V1 I2 =0 A 1 + RCs
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Cascade Transfer Function
Ra Rb
+ +
V1 Ca Cb V2
− −
Figure 8: Cascaded RC network
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Cascade Transfer Function
q The ABCD matrix of the cascaded RC network is
A B A B A B
=
C D RC RC C D RC C D RC
a b a b
1 + Ra Ca s Ra 1 + Rb Cb s Rb
=
Ca s 1 Cb s 1
(1 + Ra Ca s)(1 + Rb Cb s) + Ra Cb s Rb (1 + Ra Ca s) + Ra
=
Ca s(1 + Rb Cb s) 1 + Rb Ca s
q Therefore, the gain of cascaded RC network is
1 1
H(s)RCa RCb = =
ARCa RCb (1 + Ra Ca s)(1 + Rb Cb s) + Ra Cb s
q The product of gain of RCa and RCb is
1 1 1
Ha (s)Hb (s) = =
1 + Ra Ca s 1 + Rb Cb s (1 + Ra Ca s)(1 + Rb Cb s)
q One can easily prove that H(s)RCa RCb 6= Ha (s)Hb (s)
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Cascade Transfer Function
q The ABCD matrix of buffer is
A B 1 0
=
C D ⇒
0 0
q The ABCD matrix of cascaded RC sections with buffer is
A B A B A B A B
=
C D RC ⇒RC C D RC C D ⇒ C D RC
a b a b
1 + Ra Ca s Ra 1 0 1 + Rb Cb s Rb
=
Ca s 1 0 0 Cb s 1
1 + Ra Ca s 0 1 + Rb Cb s Rb
=
Ca s 0 Cb s 1
(1 + Ra Ca s)(1 + Rb Cb s) Rb (1 + Ra Ca s)
=
Ca s(1 + Rb Cb s) Rb C a s
q The gain of cascaded RC sections with buffer is
1 1
H(s)RCa ⇒RCb = = = Ha (s)Hb (s)
ARCa ⇒RCb (1 + Ra Ca s)(1 + Rb Cb s)
Circuit-EM Co-Design Lab
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ABCD-matrix to Z-matrix
q From (42), we can write
V1 =AV2 − BI2 (47)
I1 =CV2 − DI2 (48)
q Rewrite (48) as
1
V2 = (I1 + DI2 ) (49)
C
q Substitute V2 from (49) into (47)
A
V1 = (I1 + DI2 ) − BI2
C
1
= (AI1 + (AD − BC)I2 ) (50)
C
q Comparing (49) and (50) with (1), we can write
Z11 Z12 1 A ∆A
= (51)
Z21 Z22 C 1 D
B
where ∆A = AD − BC and ∆Z = C
Circuit-EM Co-Design Lab
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Z-matrix to ABCD-matrix
q From (1), we can write
V1 =Z11 I1 + Z12 I2 (52)
V2 =Z21 I1 + Z22 I2 (53)
q Rewrite (53) as
1
I1 = (V2 − Z22 I2 ) (54)
Z21
q Substitute I1 from (54) into (52)
Z11
V1 = (V2 − Z22 I2 ) + Z12 I2
Z21
1
= (Z11 V2 − (Z11 Z22 − Z12 Z21 )I2 ) (55)
Z21
q Comparing (54) and (55) with (42), we can write
A B 1 Z11 ∆Z
= (56)
C D Z21 1 Z22
Z12
where ∆Z = Z11 Z22 − Z12 Z21 and ∆A = Z21
Circuit-EM Co-Design Lab
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ABCD-matrix to Y-matrix
q From (42), we can write
V1 =AV2 − BI2 (57)
I1 =CV2 − DI2 (58)
q Rewrite (57) as
1
I2 = (−V1 + AV2 ) (59)
B
q Substitute I2 from (59) into (58)
D
I1 =CV2 − (−V1 + AV2 )
B
1
=(DV1 − (AD − BC)V2 ) (60)
B
q Comparing (59) and (60) with (1), we can write
Y11 Y12 1 D −∆A
= (61)
Y21 Y22 B −1 A
where ∆A = AD − BC
Circuit-EM Co-Design Lab
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Y-matrix to ABCD-matrix
q From (13), we can write
I1 =Y11 V1 + Y12 V2 (62)
I2 =Y21 V1 + Y22 V2 (63)
q Rewrite (63) as
1
V1 = − (Y22 V2 − I2 ) (64)
Y21
q Substitute V1 from (64) into (62)
Y11
I1 = − (Y22 V2 − I2 ) + Y12 V2
Y21
1
=− ((Y11 Y22 − Y12 Y21 )V2 − Y11 I2 ) (65)
Y21
q Comparing (64) and (65) with (42), we can write
A B 1 Y22 1
=− (66)
C D Y21 ∆Y Y11
where ∆Y = Y11 Y22 − Y12 Y21
Circuit-EM Co-Design Lab
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Hybrid-parameters
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Hybrid or Mixed parameters
q In hybrid or mixed parameters, we represent (i) the input voltage V1 in
terms of I1 and the V2 , and (ii) the output current I2 in terms of the I1 and
the V2 .
q The h-parameters in matrix form can be written as
V1 h h12 I1
= 11 (67)
I2 h21 h22 V2
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h-parameters Circuit
I1 h11 I2
+ +
+ +
V1 h12 V2 h21 I1 h22 V2 − V2
−
− −
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Application of h-parameters
I1 I1a I2a
+ +
+ V1a [Ha ] V2a
− − I2
I1a I2a +
V1 V2
I1b I2b −
+ + I2
− V1b [Hb ] V2b
− −
I1 I1b I2b
Figure 9: Series port-1 and shunt port-2 Connection of Two-port Networks
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Inv. Hybrid-parameters
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Inv. Hybrid or Mixed parameters
q In inverse hybrid or g- parameters, we represent (i) the input current I1 in
terms of V1 and the I2 , and (ii) the output voltage V2 in terms of the V1
and the I2 .
q The h-parameters in matrix form can be written as
I1 g g12 V1
= 11 (68)
V2 g21 g22 I2
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g-parameters Circuit
I1 g22 I2
+ +
+ +
V1 − V1 g11 g12 I2 g21 V1 V2
−
− −
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Application of g-parameters
I1a I2a I2
+ +
V1a [Ga ] V2a +
I1 − −
+ I1a I2a
V1 V2
− I1b I2b
I1 + +
V1b [Gb ] V2b −
− −
I1b I2b I2
Figure 10: Series port-1 and shunt port-2 Connection of Two-port Networks
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Parameters conversion
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h-matrix to g-matrix and g-matrix to h-matrix
q From (67) and (68), we can write
−1
g11 g12 h h12 1 h22 −h12
= 11 = (69)
g21 g22 h21 h22 ∆h −h21 h11
1
where ∆h = h11 h22 − h21 h12 = ∆g
q Similarly,
−1
h11 h12 g g12 1 g22 −g12
= 11 = (70)
h21 h22 g21 g22 ∆g −g 21 g11
1
where ∆g = g11 g22 − g21 g12 = ∆h
q ∆h ∆g = 1
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h-matrix to Z-matrix
q From (67), we can write
V1 =h11 I1 + h12 V2 (71)
I2 =h21 I1 + h22 V2 (72)
q Rewrite (72) as
1
V2 = (−h21 I1 + I2 ) (73)
h22
q Substitute V2 from (73) into (71)
h12
V1 =h11 I1 + (−h21 I1 + I2 )
h22
1
= ((h11 h22 − h21 h12 )I1 + h12 I2 ) (74)
h22
q Comparing (73) and (74) with (1), we can write
Z11 Z12 1 ∆h h12 1 1 −g12
= = (75)
Z21 Z22 h22 −h21 1 g11 g21 ∆g
where ∆h = h11 h22 − h21 h12 and ∆g = g11 g22 − g21 g12
Circuit-EM Co-Design Lab
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h-matrix to Y-matrix
q We can write
−1 −1
Y11 Y12 Z Z12 ∆h h12
= 11 = h22
Y21 Y22 Z21 Z22 −h21 1
T
h22 1 h21
=
∆h + h12 h21 −h12 ∆h
1 1 −h12 1 ∆g g12
= = (76)
h11 h21 ∆h g22 −g21 1
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Z-matrix to h-matrix
q From (1), we can write
V1 =Z11 I1 + Z12 I2 (77)
V2 =Z21 I1 + Z22 I2 (78)
q Rewrite (53) as
1
I2 = (−Z21 I1 + V2 ) (79)
Z22
q Substitute I2 from (79) into (77)
Z12
V1 =Z11 I1 + (−Z21 I1 + V2 )
Z22
1
= ((Z11 Z22 − Z12 Z21 )I1 + Z12 V2 ) (80)
Z22
q Comparing (79) and (80) with (67), we can write
h11 h12 1 ∆Z Z12 1 1 −Y12
= = (81)
h21 h22 Z22 −Z21 1 Y11 Y21 ∆Y
where ∆Z = Z11 Z22 − Z12 Z21 and ∆Y = Y11 Y22 − Y12 Y21
Circuit-EM Co-Design Lab
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Z-matrix to g-matrix
q We can write
−1 −1
g11 g12 h h12 ∆Z Z12
= 11 = Z22
g21 g22 h21 h22 −Z21 1
T
Z22 1 Z21
=
∆Z + Z12 Z21 −Z12 ∆Z
1 1 −Z12 1 ∆Y Y12
= = (82)
Z11 Z21 ∆Z Y22 −Y21 1
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ABCD-matrix to h-matrix
q From (81) and (51), we can write
C B ∆A
h11 h12 1 ∆Z Z12 C C
1 B ∆A
= = = (83)
h21 h22 Z22 −Z21 1 D − C1 1 D −1 C
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Terminated Two-port Network
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Terminated Two-port Network
q From (1), we can write the Z-parameters as
V2 = −ZL I2 (89)
I1 I2
+
Z11 Z12
+
V1 V2 ZL
− Z21 Z22 −
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Terminated Two-port Network
q Substitute V2 = −ZL I2 into (88), we obtain
I1 Z21
I2 = − (90)
Z22 + ZL
q Using (90), eqn. (87) can be written as
I1 Z21 Z12 Z21 Z12
V1 = Z11 I1 − = Z11 − I1 (91)
Z22 + ZL Z22 + ZL
q Therefore, the input impedance can be written as
V1 Z21 Z12
Zin1 = = Z11 − (92)
I1 Z22 + ZL
q The output-input current ratio under loaded condition is
I2 Z21
=− (93)
I1 Z22 + ZL
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Thevenin Model of Two-port network
I1 I2
+ ZS + +
Z11 Z12
Vg V1 V2
− − Z21 Z22 −
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Thevenin Model of Two-port network
q The Thevenin voltage can be represented as
Vg Z21
Vth = (97)
Z11 + Zg
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Voltage and Current Analysis
I1 I2
+ ZS + +
Z11 Z12
Vg V1 V2 ZL
− − Z21 Z22 −
+ Zth
Vth ZL
−
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Voltage and Current Analysis
q The voltage across the load is
V Z
g 21
Vth ZL Z11 +Zg ZL
VL = =
Zth + ZL Z22 − ZZ1112+Z
Z21
S
+ ZL
Vg Z21 ZL
= (99)
∆Z + ZS Z22 + ZL Z11 + ZS ZL
q The current flowing through the load is
VL Vg Z21
IL = = (100)
ZL ∆Z + ZS Z22 + ZL Z11 + ZS ZL
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Thanks.