Computer 1 File Final-1
Computer 1 File Final-1
Introduction:
"Computer 1" could refer to the earliest electronic computers developed in the
were massive, room-sized devices that used vacuum tubes for processing and
magnetic drums for memory. Examples include the ENIAC and UNIVAC
computers.
• Eight registers
• Seven flip-flops
• Two decoders
Computer Registers:
Registers are temporary storage areas for instructions or data. They are not
a part of memory; rather they are special additional storage locations that
offer the advantage of speed. Registers work under the direction of the
control unit to accept, hold, and transfer instructions or data and perform
Shift LEFT, Shift RIGHT, and many more operations. The specialty of our
ALU is that it works bit by bit, meaning we have to construct 16 ALU blocks
in order to create the whole ALU; full construction of ALU will be discussed
Clock
Computers use a common clock to synchronize all of their
calculations. The common clock ensures that the various circuits
inside a computer work together at the same time. Clock speed is
measured by how many ticks per second the clock makes. The
unit of measurement is called a hertz (Hz). The common clock is
connected to all registers, ram and flip-flops, and other memory-
related components.
2) Instruction Code
A set of instructions that specify the operations, operands,
and the sequence by which processing has to occur. An
instruction code is a group of bits that tells the computer
to perform a specific operation part.
Types of Instructions
3. Input-Output instruction
In register reference, the 15th bit is 0 and Opcode bits are 111 for all cases.
The rest 12 bits are the Operation bits that derive which operation has to
be done. There are a total of 12 operations that are derived from these
Operation bits. Any of the 12 bits becomes 1 else the other should be 0 and
instruction.
Input / Output - reference instruction
In Input / Output reference, the 15th bit is 1, and Opcode bits are
111 for all cases. The rest 12 bits are the Operation bits that derive
which operation has to be done similar to Register Reference but the
difference is that there are only 6 operations that are derived from
these Operation bits. Any of the ( 11 - 6 ) bits becomes 1 else the
other should be 0 and the position of this 1 bit derives operation in
Input / Output Reference instruction.
3) Time and Control Unit
Time Unit
Control Unit:
An instruction read from memory is placed in the
instruction register (IR), where it is divided into three
parts: the I bit, the operation code, and bits 11 through 0.
The I bit is the most significant bit (MSB) of the instruction
code.
These D0, D1, D2….. are the Opcode decoded values that
provide operation details.
Flags Used in Our System
Total of 7 flags or flip flops are used for specific purposes, those
flags are.
LOGISIM:
Features
• It is free! (Logisim is open-source.)
instructions. These instructions are executed by the processor by going through a cycle
T0: AR ← PC
Decode
T2: I ← IR[15] , Decode D0, D1, D2, D3…..D7 ← IR[14 - 12] , AR ← IR[11-0]
T3: AR ← M[AR]
Instructions
AND operation
T0: AR ← PC
← IR[11-0]
D7’IT3: AR ← M[AR]
D0T4: DR ← M[AR]
D0T5: AC← AC ^ DR, SC← 0
ADD operation
T0: AR ← PC
← IR[11-0]
D7’IT3: AR ← M[AR]
D1T4: DR ← M[AR]
T0: AR ← PC
← IR[11-0]
D7’IT3: AR ← M[AR]
D2T4: DR ← M[AR]
D2T5: AC ← DR, SC ← 0
memory.
T0: AR ← PC
IR[11-0]
D7’IT3: AR ← M[AR]
T0: AR ← PC
IR[11-0]
D7’IT3: AR ← M[AR]
D4T4: PC ← AR, SC ← 0
new address and save there that from which address this instruction
T0: AR ← PC
IR[11-0]
D7’IT3: AR ← M[AR]
T0: AR ← PC
IR[11-0]
D7’IT3: AR ← M[AR]
D6T4: DR ← M[AR]
D6T5: DR ← DR + 1
value is 1.
CLA:
D7I’T3B11: AC ← 0 Clear AC
CLE :
D7I’T3B10: E ← 0 Clear E
CMA:
CME:
D7I’T3B8: E ← E’ Complement E
CIR:
D7I’T3B7: AC ← shr AC, AC(15) ← E, E ← AC(0) Circular Right
CIL:
INC:
D7I’T3B5: AC ← AC + 1 Increment AC S
SPA:
SNA:
SZA:
SZE :
HLT:
value is 1.
INP:
OUT:
D7IT3B10: OUTR ← AC(0-7), FGO ← 0 Output char. from AC
SKI:
SKO :
ION:
IOF :
2. Eight registers: AR, PC, DR, AC, IR, TR, OUTR, and INPR
R Flag:
S Flag: D7I’T3B0
I Flag: R’T2
The ALU is