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Power Semiconductor Devices

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 Power Electronics 2019

Arbaminch University

Faculty of Electrical and Computer Engineering

Department of Industrial Control and Instrumentation

Power Semiconductor Devices

Basic structure and switching characteristics of power diodes – SCR – TRIAC –

GTO – MOSFET – IGBT

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Power Electronics is the art of converting electrical energy from one form
to another in an efficient, clean, compact, and robust manner for convenient
utilization.

Power Electronics involves the study of

 Power semiconductor devices - their physics, characteristics, drive
requirements and their protection for optimum utilization of their
capacities,
 Power converter topologies involving them,
 Control strategies of the converters,
 Digital, analogue and microelectronics involved,
 Capacitive and magnetic energy storage elements,
 Rotating and static electrical devices,
 Quality of waveforms generated,
 Electro Magnetic and Radio Frequency Interference,
 Thermal Management

How is Power electronics distinct from linear electronics?

It is not primarily in their power handling capacities.

While power management IC's in mobile sets working on Power Electronic

principles are meant to handle only a few milliwatts, large linear audio
amplifiers are rated at a few thousand watts.

The utilization of the Bipolar junction transistor, Fig. 1.2 in the two types of
amplifiers best symbolizes the difference. In Power Electronics all devices are
operated in the switching mode - either 'FULLY-ON' or 'FULLY-OFF' states. The
linear amplifier concentrates on fidelity in signal amplification, requiring
transistors to operate strictly in the linear (active) zone, Fig 1.3. Saturation and
cutoff zones in the VCE - IC plane are avoided. In a Power electronic switching
amplifier, only those areas in the VCE - IC plane which have been skirted above,
are suitable. On-state dissipation is minimum if the device is in saturation (or
quasi-saturation for optimizing other losses). In the off-state also, losses are
minimum if the BJT is reverse biased. A BJT switch will try to traverse the active
zone as fast as possible to minimize switching losses

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Fig.Typical Bipolar transistor based (a) linear (common emitter) (voltage) amplifier stage and
(b) switching (power) amplifier

What are Power Semiconductor Devices (PSD)?

 They are devices used as switches or rectifiers in power electronic circuits

What is the difference of Power Semiconductor Device and low-power semiconductor

device?
 Large voltage in the off state
 High current capability in the on state

History
Power electronics and converters utilizing them made a head start when
the first device the Silicon Controlled Rectifier was proposed by Bell Labs and
commercially produced by General Electric in the earlier fifties. The Mercury Arc
Rectifiers were well in use by that time and the robust and compact SCR first
started replacing it in the rectifiers and cycloconverters. The necessity arose of
extending the application of the SCR beyond the line-commutated mode of
action, which called for external measures to circumvent its turn-off incapability
via its control terminals. Various turn-off schemes were proposed and their
classification was suggested but it became increasingly obvious that a device
with turn-off capability was desirable, which would permit it a wider
application. The turn-off networks and aids were impractical at higher powers.

The range of power devices thus developed over the last few decades can be
represented as a tree,

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Fig.. The power semiconductor devices family

Construction and Characteristics of Power Diodes

Power Diodes of largest power rating are required to conduct several kilo
amps of current in the forward direction with very little power loss while
blocking several kilo volts in the reverse direction. Large blocking voltage
requires wide depletion layer in order to restrict the maximum electric field
strength below the “impact ionization” level. Space charge density in the
depletion layer should also be low in order to yield a wide depletion layer for a
given maximum Electric fields strength. These two requirements will be satisfied
in a lightly doped p-n junction diode of sufficient width to accommodate the
required depletion layer. Such a construction, however, will result in a device
with high resistively in the forward direction. Consequently, the power loss at
the required rated current will be unacceptably high.
On the other hand if forward resistance (and hence power loss) is reduced
by increasing the doping level, reverse break down voltage will reduce. This
apparent contradiction in the requirements of a power diode is resolved by
introducing a lightly doped “drift layer” of required thickness between two
heavily doped p and n layers. The Figure shows the circuit symbol and the
photograph of a typical power diode respectively

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Fig. Diagram of a power; (a) circuit symbol (b) photograph; (c) schematic cross
section.

Power Diode under Reverse Bias Conditions

Fig : Reverse bias I-V characteristics of a power Diode.

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Under reverse bias condition only a small leakage current (less than
100mA for a rated forward current in excess of 1000A) flows in the reverse
direction (i.e from cathode to anode). This reverse current is independent of the
applied reverse voltage but highly sensitive to junction temperature variation.
When the applied reverse voltage reaches the break down voltage, reverse
current increases very rapidly due to impact ionization and consequent
avalanche multiplication process. Voltage across the device dose not increase any
further while the reverse current is limited by the external circuit. Excessive
power loss and consequent increase in the junction temperature due to continued
operation in the reverse brake down region quickly destroies the diode.
Therefore, continued operation in the reverse break down region should be
avoided.

Power Diode under Forward Bias Conditions

Fig : Forward bias I-V characteristics of a power Diode.

p and n type carriers defuse and recombine inside the drift region. If the
width of the drift region is less than the diffusion length of carries the spatial
distribution of excess carrier density in the drift region will be fairly flat and
several orders of magnitude higher than the thermal equilibrium carrier density
of this region. Conductivity of the drift region will be greatly enhanced as a
consequence (also called conductivity modulation).

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The voltage dropt across a forward conducting power diode has two
components Vak = Vj + VRD

+ -
Where Vj is the drop across the p n for a given forward current jF. The
component VRD is due to ohmic drop mostly in the drift region. The ohmic drop
makes the forward i-v characteristic of a power diode more linear.

Switching Characteristics of Power Diodes

Power Diodes take finite time to make transition from reverse bias to
forward bias condition (switch ON) and vice versa (switch OFF). Behavior of the
diode current and voltage during these switching periods are important due to
the following reasons.
• Severe over voltage / over current may be caused by a diode switching at
different points in the circuit using the diode.
• Voltage and current exist simultaneously during switching operation of a
diode. Therefore, every switching of the diode is associated with some
energy loss. At high switching frequency this may contribute significantly
to the overall power loss in the diode.

Observed Turn ON behavior of a power Diode: Diodes are often used in

circuits with di/dt limiting inductors. The rate of rise of the forward current
through the diode during Turn ON has significant effect on the forward voltage
drop characteristics. It is observed that the forward diode voltage during turn
ON may transiently reach a significantly higher value Vfr compared to the steady
slate voltage drop at the steady current IF. In some power converter circuits (e.g
voltage source inverter) where a free wheeling diode is used across an
asymmetrical blocking power switch (i.e GTO) this transient over voltage may be
high enough to destroy the main power switch. Vfr (called forward recovery
voltage) is given as a function of the forward di/dt in the manufacturer’s data
sheet. Typical values lie within the range of 10-30V. Forward recovery time (tfr) is
typically within 10 us.
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Fig: Forward current and voltage waveforms of a power diode during Turn On
and Turn Off operation.

Observed Turn OFF behavior of a Power Diode: Figure shows a typical turn off
behavior of a power diode assuming controlled rate of decrease of the forward
current.

Salient features of these characteristics are:

• The diode current does not stop at zero, instead it grows in the negative
direction to Irr called “peak reverse recovery current” which can be
comparable to IF. In many power electronic circuits (e.g. choppers,
inverters) this reverse current flows through the main power switch in
addition to the load current. Therefore, this reverse recovery current has to
be accounted for while selecting the main switch.
• Voltage drop across the diode does not change appreciably from its steady
state value till the diode current reaches reverse recovery level. In many
power electric circuits (choppers, inverters) this may create an effective

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short circuit across the supply, current being limited only by the stray
wiring inductance. Also in high frequency switching circuits (e.g, SMPS) if
the time period t4 is comparable to switching cycle qualitative modification
to the circuit behavior is possible.
Silicon Controlled Rectifier (SCR)

Although the large semiconductor diode was a predecessor to thyristors,

the modern power electronics area truly began with advent of thyristors. One of
the first developments was the publication of the P-N-P-N transistor switch
concept in 1956 by J.L. Moll and others at Bell Laboratories, probably for use in
Bell’s Signal application. However, engineers at General Electric quickly
recognized its significance to power conversion and control and within nine
months announced the first commercial Silicon Controlled Rectifier in 1957.

Fig. : Constructional features of a thysistor (a) Circuit Symbol, (b) Photograph (c)
Schematic Construction.
-
The primary crystal is of lightly doped n type on either side of which two
p type layers with doping levels higher by two orders of magnitude are grown.
As in the case of power diodes and transistors depletion layer spreads mainly
-
into the lightly doped n region. The thickness of this layer is therefore
determined by the required blocking voltage of the device. However, due to
conductivity modulation by carriers from the heavily doped p regions on both
+
side during ON condition the “ON state” voltage drop is less. The outer n layers
are formed with doping levels higher then both the p type layers. The top p layer
+
acls as the “Anode” terminal while the bottom n layers acts as the “Cathode”.
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The “Gate” terminal connections are made to the bottom p layer. As it will be
shown later, that for better switching performance it is required to maximize the
peripheral contact area of the gate and the cathode regions. Therefore, the
cathode regions are finely distributed between gate contacts of the p type layer.
An “Involute” structure for both the gate and the cathode regions is a preferred
design structure.

Basic operating principle of a thyristor

The underlying operating principle of a thyristor is best understood in terms of
the “two transistor analogy” as explained below.

The thyristor can be triggered into the on state by applying a pulse of

positive gate current for a short duration provided that the device is in its
forward-blocking state. The resulting i-v relationship is shown by the on-state
portion The forward voltage drop in the on state is only a few volts (typically 1-3
V depending on the device blocking voltage rating). Once the device begins to
conduct, it is latched on and the gate current can be removed. The thyristor
cannot be turned off by the gate, and the thyristor conducts as a diode. Only
when the anode current tries to go negative, under the influence of the circuit in
which the thyristor is connected, does the thyristor turn off and the current go to
zero. This allows the gate to regain control in order to turn the device on at some
controllable time after it has again entered the forward-blocking state.

In reverse bias at voltages below the reverse breakdown voltage, only a

negligibly small leakage current flows in the thyristor, as is shown in Fig. 2-3b.
Usually the thyristor voltage ratings for forward- and reverse-blocking voltages
are the same. The thyristor current ratings are specified in terms of maximum
rms and average currents that it is capable of conducting. Using the same
arguments as for diodes, the thyristor can be represented by the idealized
characteristics shown in analyzing converter topologies. In an application such as
the simple circuit, control can be exercised over the instant of current conduction
during the positive half cycle of source voltage. When the thyristor current tries
to reverse itself when the source voltage goes negative, the idealized thyristor
would have its current become zero immediately after r = fiT, as is shown in the
waveform.
The V-I Characteristics of SCR is shown in the below fig.

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Thyristor Gate Characteristics

The gate circuit of a thyristor behaves like a poor quality diode with high
on state voltage drop and low reverse break down voltage. This characteristic
usually is not unique even within the same family of devices and shows
considerable variation from device to device.

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Voltage ratings

Peak Working Forward OFF state voltage (VDWM): It specifics the maximum
forward (i.e, anode positive with respect to the cathode) blocking state voltage
that a thyristor can withstand during working. It is useful for calculating the
maximum RMS voltage of the ac network in which the thyristor can be used. A
margin for 10% increase in the ac network voltage should be considered during
calculation.
Peak repetitive off state forward voltage (VDRM): It refers to the peak forward
transient voltage that a thyristor can block repeatedly in the OFF state. This
rating is specified at a maximum allowable junction temperature with gate
circuit open or with a specified biasing resistance between gate and cathode. This
type of repetitive transient voltage may appear across a thyristor due to
“commutation” of other thyristors or diodes in a converter circuit.
Peak non-repetitive off state forward voltage (VDSM): It refers to the allowable
peak value of the forward transient voltage that does not repeat. This type of
over voltage may be caused due to switching operation (i.e, circuit breaker

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opening or closing or lightning surge) in a supply network. Its value is about

130% of VDRM. However, VDSM is less than the forward break over voltage VBRF.

Peak working reverse voltage (VDWM): It is the maximum reverse voltage (i.e,
anode negative with respect to cathode) that a thyristor can with stand
continuously. Normally, it is equal to the peak negative value of the ac supply
voltage.
Peak repetitive reverse voltage (VRRM): It specifies the peak reverse transient
voltage that may occur repeatedly during reverse bias condition of the thyristor
at the maximum junction temperature.
Peak non-repetitive reverse voltage (VRSM): It represents the peak value of the
reverse transient voltage that does not repeat. Its value is about 130% of VRRM.
However, VRSM is less than reverse break down voltage VBRR.

Current ratings
Maximum RMS current (Irms): Heating of the resistive elements of a thyristor
such as metallic joints, leads and interfaces depends on the forward RMS current
Irms. RMS current rating is used as an upper limit for dc as well as pulsed current
waveforms. This limit should not be exceeded on a continuous basis.
Maximum average current (Iav): It is the maximum allowable average value of
the forward current such that
i. Peak junction temperature is not exceeded
ii. RMS current limit is not exceeded

Manufacturers usually provide the “forward average current derating

characteristics” which shows Iav as a function of the case temperature (Tc ) with
the current conduction angle φ as a parameter. The current wave form is
assumed to be formed from a half cycle sine wave of power frequency

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2 2
Maximum Squared Current integral (∫i dt): This rating in terms of A S is a
measure of the energy the device can absorb for a short time (less than one half
cycle of power frequency). This rating is used in the choice of the protective fuse
connected in series with the device.
Latching Current (IL): After Turn ON the gate pulse must be maintained until
the anode current reaches this level. Otherwise, upon removal of gate pulse, the
device will turn off.
Holding Current (IH): The anode current must be reduced below this value to
turn off the thyristor.
Maximum Forward voltage drop (VF): Usually specified as a function of the
instantaneous forward current at a given junction temperature.

Average power dissipation Pav): Specified as a function of the average forward

current (Iav) for different conduction angles. The current wave form is assumed to
be half cycle sine wave (or square wave) for power frequency.

TRIAC

The Triac is a member of the thyristor family. But unlike a thyristor which
conducts only in one direction (from anode to cathode) a triac can conduct in
both directions. Thus a triac is similar to two back to back (anti parallel)
connected thyristosr but with only three terminals. As in the case of a thyristor,
the conduction of a triac is initiated by injecting a current pulse into the gate
terminal. The gate looses control over conduction once the triac is turned on. The
triac turns off only when the current through the main terminals become zero.

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Construction and operating principle

The Triac can conduct in both the directions the terms “anode” and
“cathode” are not used for Triacs. The three terminals are marked as MT1 (Main
Terminal 1), MT2 (Main Terminal 2) and the gate by G. As shown in Fig 4.12 (b)
the gate terminal is near MT1 and is connected to both N3 and P2 regions by
metallic contact. Similarly MT1 is connected to N2 and P2 regions while MT2 is
connected to N4 and P1 regions Since a Triac is a bidirectional device and can
have its terminals at various combinations of positive and negative voltages,
there are four possible electrode potential combinations as given below
1. MT2 positive with respect to MT1, G positive with respect to MT1
2. MT2 positive with respect to MT1, G negative with respect to MT1
3. MT2 negative with respect to MT1, G negative with respect to MT1
4. MT2 negative with respect to MT1, G positive with respect to MT1

The triggering sensitivity is highest with the combinations 1 and 3 and are
generally used. However, for bidirectional control and uniforms gate trigger
mode sometimes trigger modes 2 and 3 are used. Trigger mode 4 is usually
averred.
Characteristics of TRIAC

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st rd
The V-I characteristics of Triac in the 1 and 3
quadrant of the V-I plane will be similar to the forward characteristics of a
thyristors, with no signal to the gate the triac will block both half cycle of the
applied ac voltage provided its peak value is lower than the break over voltage
(VBO) of the device. However, the turning on of the triac can be controlled by
applying the gate trigger pulse at the desired instance. Mode-1 triggering is used
in the first quadrant where as Mode-3 triggering is used in the third quadrant. As
such, most of the thyristor characteristics apply to the triac (ie, latching and
holding current). However, in a triac the two conducting paths (from MT1 to MT2
or from MT1 to MT1) interact with each other in the structure of the triac.
Therefore, the voltage, current and frequency ratings of triacs are considerably
lower than thyristors. At present triacs with voltage and current ratings of 1200V

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and 300A (rms) are available. Triacs also have a larger on state voltage drop
compared to a thyristor.

Power MOSFET(Metal Oxide Semiconductor Field effect Transistor)

Power MOSFET is a device that evolved from MOS integrated circuit

technology. The first attempts to develop high voltage MOSFETs were by
redesigning lateral MOSFET to increase their voltage blocking capacity. The
resulting technology was called lateral double defused MOS (DMOS). However
it was soon realized that much larger breakdown voltage and current ratings
could be achieved by resorting to a vertically oriented structure. Since then,
vertical DMOS (VDMOS) structure has been adapted by virtually all
manufacturers of Power MOSFET. A power MOSFET using VDMOS technology
has vertically oriented three layer structure of alternating p type and n type
semiconductors

Fig : Construction of MOSFET

Operating Principle of Power MOSFET

There is no path for any current to flow between the source and the
drain terminals since at least one of the p n junctions (source – body and body-

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Drain) will be reverse biased for either polarity of the applied voltage between
the source and the drain. There is no possibility of current injection from the gate
terminal either since the gate oxide is a very good insulator. However,
application of a positive voltage at the gate terminal with respect to the source
will covert the silicon surface beneath the gate oxide into an n type layer or
“channel”, thus connecting the Source to the Drain The gate region of a MOSFET
which is composed of the gate metallization, the gate (silicon) oxide layer and the
p-body silicon forms a high quality capacitor. When a small voltage is
application to this capacitor structure with gate terminal positive with respect to
the source (note that body and source are shorted) a depletion region forms at
the interface between the SiO2 and the silicon The positive charge induced on the
gate metallization repels the majority hole carriers from the interface region
between the gate oxide and the p type body. This exposes the negatively charged
acceptors and a depletion region is created. As VGS increases further the density
of free electrons at the interface becomes equal to the free hole density in the bulk
of the body region beyond the depletion layer. The layer of free electrons at the
interface is called the inversion layer The inversion layer has all the properties of
an n type semiconductor and is a conductive path or “channel” between the
drain and the source which permits flow of current between the drain and the
source. Since current conduction in this device takes place through an n- type
“channel” created by the electric field due to gate source voltage it is called
“Enhancement type n-channel MOSFET”. The inversion layer screens the
depletion layer adjacent to it from increasing VGS. The depletion layer thickness
now remains constant.

Gate Turn off Thyristor (GTO)

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Like the thyristor, the GTO can be turned on by a short-duration gate

current pulse, and once in the on-state, the GTO may stay on without any further
gate current. However, unlike the thyristor, the GTO can be turned off by
applying a negative gate-cathode voltage, therefore causing a sufficiently large
negative gate current to flow. This negative gate current need only flow for a few
microseconds (during the turn-off time), but it must have a very large
magnitude, typically as large as one-third the anode current being turned off.
The GTOs can block negative voltages whose magnitude depends on the details
of the GTO design Even though the GTO is a controllable switch in the same
category as MOSFETs and BJTs, its turn-off switching transient is different from
that. This is because presently available GTOs cannot be used for inductive turn-
off such as is illustrated unless a snubber circuit is connected across the GTO.
This is a consequence of the fact that a large dvldt that accompanies inductive
turn-off cannot be tolerated by present-day GTOs. Therefore a circuit to reduce
dvldt at turn-off that consists of R, C, and D, must be used across the GTO.
where dvldt is significantly reduced compared to the dvldt that would result
without the turn-off snubber circuit. The details of designing a snubber circuit to
shape the switching waveforms of GTOs. The on-state voltage (2-3 V) of a GTO is
slightly higher than those of thyristors. The GTO switching speeds are in the
range of a few microseconds to 25 FS. Because of their capability to handle large
voltages (up to 4.5 kV) and large currents (up to a few kiloamperes), the GTO is
used when a switch is needed for high voltages and large currents in a switching
frequency range of a few hundred hertz to 10 kHz.

VI Characteristics of GTO

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The latching current of a GTO is considerably higher than a thyristor of

similar rating. The forward leakage current is also considerably higher. In fact, if
the gate current is not sufficient to turn on a GTO it operates as a high voltage
low gain transistor with considerable anode current. It should be noted that a
GTO can block rated forward voltage only when the gate is negatively biased
with respect to the cathode during forward blocking state. At least, a low value
resistance must be connected across the gate cathode terminal. Increasing the
value of this resistance reduces the forward blocking voltage of the GTO.
Asymmetric GTOs have small (20-30 V) reverse break down voltage. This may
lead the device to operate in “reverse avalanche” under certain conditions. This
condition is not dangerous for the GTO provided the avalanche time and current
are small. The gate voltage during this period must remain negative.

Insulated Gate Bipolar Transistor (IGBT)

Better results MOSFET and BJT technologies are to be integrated at the cell
level. This was achieved by the GE Research Laboratory by the introduction of
the device IGT and by the RCA research laboratory with the device COMFET.
The IGT device has undergone many improvement cycles to result in the modern
Insulated Gate Bipolar Transistor (IGBT). These devices have near ideal
characteristics for high voltage (> 100V) medium frequency (< 20 kHZ)
applications. This device along with the MOSFET

The major difference with the corresponding MOSFET cell structure lies in
the addition of a p+ injecting layer. This layer forms a pn junction with the drain

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layer and injects minority carriers into it. The n type drain layer itself may have
two different doping levels. The lightly doped n- region is called the drain drift
region. Doping level and width of this layer sets the forward blocking voltage
(determined by the reverse break down voltage of J2) of the device. The IGBT cell
has a parasitic p-n-p-n thyristor structure embedded into it. The constituent p-n-
p transistor, n-p-n transistor and the driver MOSFET are shown by dotted lines
in this figure. Important resistances in the current flow path are also indicated.
Gate The top p-n-p transistor is formed by the p+ injecting layer as the emitter,
the n type drain layer as the base and the p type body layer as the collector. The
lower n-p-n transistor has the n+ type source, the p type body and the n type
drain as the emitter, base and collector respectively. The base of the lower n-p-n
transistor is shorted to the emitter by the emitter metallization. However, due to
imperfect shorting, the exact equivalent circuit of the IGBT includes the body
spreading resistance between the base and the emitter of the lower n-p-n
transistor. If the output current is large enough, the voltage drop across this
resistance may forward bias the lower n-p-n transistor and initiate the latch up
process of the p-n-p-n thyristor structure. Once this structure latches up the gate
control of IGBT is lost and the device is destroyed due to excessive power loss.
A major effort in the development of IGBT has been towards prevention
of latch up of the parasitic thyristor. This has been achieved by modifying the
doping level and physical geometry of the body region. The modern IGBT is
latch-up proof for all practical purpose.

Characteristics of IGBT

When the gate emitter voltage is below the threshold voltage only a very
small leakage current flows though the device while the collector – emitter
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voltage almost equals the supply voltage (point C in Fig 7.4(a)). The device,
under this condition is said to be operating in the cut off region. The maximum
forward voltage the device can withstand in this mode is determined by the
avalanche break down voltage of the body – drain p-n junction. Unlike a BJT,
however, this break down voltage is independent of the collector current. IGBTs
of Non-punch through design can block a maximum reverse voltage (VRM) equal
to VCES in the cut off mode. However, for Punch through IGBTs VRM is negligible
(only a few tens of volts) due the presence of the heavily doped n+ drain buffer
layer. As the gate emitter voltage increases beyond the threshold voltage the
IGBT enters into the active region of operation. In this mode, the collector current
ic is determined by the transfer characteristics of the device. This characteristic is
qualitatively similar to that of a power MOSFET and is reasonably linear over
most of the collector current range. The ratio of ic to (VgE – vgE(th)) is called the
forward transconductance (gfs) of the device and is an important parameter in the
gate drive circuit design. The collector emitter voltage, on the other hand, is
determined by the external load line

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