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Hardware

The document provides a truth table and asks the reader to determine the Boolean expression that corresponds to the truth table. It also asks the reader to complete a Karnaugh map for the truth table and use it to simplify the Boolean expression. Finally, it provides another truth table and asks similar questions about determining the Boolean expression and using a Karnaugh map to simplify it.

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0% found this document useful (0 votes)
17 views

Hardware

The document provides a truth table and asks the reader to determine the Boolean expression that corresponds to the truth table. It also asks the reader to complete a Karnaugh map for the truth table and use it to simplify the Boolean expression. Finally, it provides another truth table and asks similar questions about determining the Boolean expression and using a Karnaugh map to simplify it.

Uploaded by

charlesma463
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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6

3 (a) Complete the Boolean expression that corresponds to the following truth table.

INPUT OUTPUT
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

X = A . B . C ....................................................................................................................... [2]

The part to the right of the equals sign is known as the sum-of-products.

(b) (i) Complete the Karnaugh map (K-map) for the truth table given in part (a).

AB
00 01 11 10
0
C
1
[1]

The K-map can be used to simplify the function in part (a).

(ii) Draw loop(s) around appropriate groups of 1s to produce an optimal sum-of-products.


[2]

(iii) Using your answer to part (b)(ii), write the simplified sum-of-products Boolean
expression.

X = ................................................................................................................................ [2]

© UCLES 2018 9618/03/SP/21


10

4 (a) Explain what is meant by an interrupt.

[2]

(b) An operating system uses interrupts which have priorities.

Describe the sequence of steps which would be carried out by the interrupt handler software
when an interrupt is received and serviced.

[6]

© UCLES 2012 9608/03/SP/15


8

7 (a) Write the Boolean expression that corresponds to the given truth table as a sum-of-products.

INPUT OUTPUT

A B C D Z

0 0 0 0 0

0 0 0 1 0

0 0 1 0 0

0 0 1 1 0

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 0

1 0 0 0 0

1 0 0 1 1

1 0 1 0 0

1 0 1 1 1

1 1 0 0 1

1 1 0 1 1

1 1 1 0 1

1 1 1 1 1

Z = ............................................................................................................................................

............................................................................................................................................. [3]

© UCLES 2021 9618/32/O/N/21


9

(b) (i) Complete the Karnaugh map (K-map) for the given truth table.

AB

CD 00 01 11 10

00

01

11

10

[2]

(ii) Draw loop(s) around appropriate group(s) of 1s in the K-map to produce an optimal
sum-of-products. [2]

(iii) Write the Boolean expression from your answer to part b(ii) as a simplified
sum-of-products.

Z = .....................................................................................................................................

..................................................................................................................................... [2]

(iv) Write the simplified Boolean expression for your answer to part b(iii).

Z = .....................................................................................................................................

..................................................................................................................................... [1]

© UCLES 2021 9618/32/O/N/21 [Turn over


9

7 The diagram shows a logic circuit.

A P
Y
B

C R

Z
Q

(a) Complete the truth table for the given logic circuit. Show your working.

Inputs Working space Outputs


A B C P Q R Y Z
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
[3]
(b) State the name of the logic circuit.

............................................................................................................................................. [1]

(c) Write the Boolean expressions for the two outputs Y and Z in the truth table as
sum-of-products and state the purpose of each output.

Y = ............................................................................................................................................

Purpose ....................................................................................................................................

Z = ............................................................................................................................................

Purpose ....................................................................................................................................
[4]

© UCLES 2021 9618/33/M/J/21 [Turn over


12

5 (a) Write the Boolean expression that corresponds to the logic circuit.

[3]

(b) Use Boolean algebra to simplify the expression.

[3]

(c) Draw the logic circuit that corresponds to your simplified expression.

[3]

© UCLES 2012 9608/03/SP/15


13

(d) Complete the truth table for the logic circuit:

A B Work space X Y

0 0

0 1

1 0

1 1
[4]

(e) What is the name given to a logic circuit that has this truth table?

[1]

© UCLES 2012 9608/03/SP/15 [Turn over


6

4 (a) The truth table for a logic circuit with four inputs is shown.

INPUT OUTPUT
P Q R S X
0 0 0 0 1

0 0 0 1 0

0 0 1 0 1

0 0 1 1 0

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 0

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 0

1 1 0 0 0

1 1 0 1 1

1 1 1 0 0

1 1 1 1 1

(i) Write the Boolean expression for the truth table as a sum-of-products.

X = .............................................................................................................................. [2]

(ii) Complete the Karnaugh Map (K-map) for the truth table.

PQ
00 01 11 10
00
01
RS
11
10
[2]

© UCLES 2021 9608/33/M/J/21


7

(iii) The K-map can be used to simplify the expression in part (a)(i).

Draw loops around appropriate groups of 1s in the table in part (a)(ii) to produce an
optimal sum-of-products. [2]

(iv) Write the simplified sum-of-products expression for your answer to part (a)(iii).

X = ............................................................................................................................... [2]

(b) Simplify your expression for X in part (a)(i) using Boolean algebra. Show your working.

...................................................................................................................................................

...................................................................................................................................................

............................................................................................................................................. [2]

© UCLES 2021 9608/33/M/J/21 [Turn over


6

4 (a) The truth table for a logic circuit with four inputs is shown.

INPUT OUTPUT

P Q R S X

0 0 0 0 1

0 0 0 1 0

0 0 1 0 0

0 0 1 1 0

0 1 0 0 1

0 1 0 1 0

0 1 1 0 0

0 1 1 1 0

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 1

1 1 0 0 0

1 1 0 1 0

1 1 1 0 0

1 1 1 1 1

(i) Write the Boolean expression for the truth table as a sum-of-products.

X = ............................................................................................................................... [2]

(ii) Complete the Karnaugh Map (K-map) for the truth table.

PQ

00 01 11 10

00

01
RS
11

10
[2]

© UCLES 2021 9608/32/M/J/21


7

(iii) The K-map can be used to simplify the expression in part (a)(i).

Draw loops around appropriate groups of 1s in the table in part (a)(ii) to produce an
optimal sum-of-products. [2]

(iv) Write the simplified sum-of-products expression for your answer to part (a)(iii).

X = ............................................................................................................................... [2]

(b) Simplify your expression for X in part (a)(i) using Boolean algebra. Show your working.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

............................................................................................................................................. [2]

5 Flip-flops are used in computer construction.

(a) Describe the role of flip-flops in a computer.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

............................................................................................................................................. [3]

(b) Describe the difference between an SR flip-flop and a JK flip-flop.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

............................................................................................................................................. [2]

© UCLES 2021 9608/32/M/J/21 [Turn over


6

4 The following truth table represents a logic circuit with three inputs and two outputs.

INPUT OUTPUT
A B C X Y
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

(a) Write the Boolean expressions for the truth table as sum-of-products.

X = ............................................................................................................................................

...................................................................................................................................................

Y = ............................................................................................................................................

...................................................................................................................................................
[4]

(b) Complete the Karnaugh Maps (K-maps) for the truth table.

OUTPUT X OUTPUT Y
AB AB
00 01 11 10 00 01 11 10

0 0
C C
1 1
[2]

(c) The K-maps can be used to simplify one of the expressions in part (a).

(i) Draw loop(s) around appropriate group(s) of 1s to produce an optimal sum-of-products


for the single output table that can be simplified in part (b). [3]

(ii) Write the simplified sum-of-products expressions for this output from part (c)(i).

..................................................................................................................................... [3]

© UCLES 2020 9608/33/O/N/20


7

(d) Identify the common logic circuit given by the truth table in part (a). Give the use of each
output.

Logic circuit ...............................................................................................................................

Use of X ....................................................................................................................................

Use of Y ....................................................................................................................................
[3]

5 Complete these statements about a virtual machine.

A virtual machine is ................................................ that emulates a

................................................ computer system.

A virtual machine allows multiple ................................................ operating systems to run

on one computer using a ................................................ operating system.


[4]

6 Anita is studying computer science and she is confused about some of the computer security
terminology as some of the words are similar.

Anita wants to know the similarities (features that are the same) and differences (features that are
different) between some of the terms.

(a) Give the similarities and differences between a public key and a private key.

Similarities ................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

Differences ................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................
[4]

© UCLES 2020 9608/33/O/N/20 [Turn over


6

4 The following truth table represents a logic circuit with three inputs and two outputs.

INPUT OUTPUT
A B C X Y
0 0 0 1 0
0 0 1 0 0
0 1 0 0 0
0 1 1 0 1
1 0 0 0 0
1 0 1 0 1
1 1 0 0 0
1 1 1 1 1

(a) Write the Boolean expressions for the truth table as sum-of-products.

X = ............................................................................................................................................

Y = ............................................................................................................................................
[3]

(b) Complete the Karnaugh Maps (K-maps) for the truth table.

OUTPUT X OUTPUT Y
AB AB

00 01 11 10 00 01 11 10

0 0
C C
1 1

[2]

(c) The K-maps can be used to simplify one of the expressions in part (a).

(i) Draw loop(s) around appropriate group(s) of 1s to produce an optimal sum-of-products


for the single output table that can be simplified in part (b). [2]

(ii) Write the simplified sum-of-products expressions for this output from part (c)(i).

..................................................................................................................................... [2]

© UCLES 2020 9608/32/O/N/20


7

5 Complete these statements about flip-flops.

A flip-flop is a .................................................... .

It has .................................................... stable states.

A flip-flop is used for .................................................... .

There are different types of flip-flop, for example .................................................... and

.................................................... .
[5]

© UCLES 2020 9608/32/O/N/20 [Turn over


5

4 (a) Write the Boolean algebraic expressions for the following logic circuit.

P
X

R
Y

X = ............................................................................................................................................

...................................................................................................................................................

Y = ............................................................................................................................................

...................................................................................................................................................
[5]

(b) The logic circuit given in part (a) is a full adder.

(i) Give the purpose of outputs X and Y in this circuit.

X ........................................................................................................................................

Y ........................................................................................................................................
[2]

(ii) Give the use of the input R in this circuit.

..................................................................................................................................... [1]

5 Complete these three statements about computer processors.

A processor with a few simple fixed-length instructions that have a small number of instruction

formats is called a ............................................................................................. processor.

A processor with many complex variable-length instructions that has many instruction formats is

called a ............................................................................................. processor.

Instruction-level parallelism, applied to the execution of instructions during the fetch-execute cycle,

is called ............................................................................................. .
[3]

© UCLES 2020 9608/33/M/J/20 [Turn over


7

4 A Boolean expression produces the following truth table.

INPUT OUTPUT
A B C X
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1

(a) Write the Boolean expression for the truth table as a sum-of-products.

X = ...................................................................................................................................... [2]

(b) Complete the Karnaugh Map (K-map) for the truth table above.

AB

00 01 11 10

0
C
1

[1]

The K-map can be used to simplify the expression in part (a).

(c) Draw loops around appropriate groups in the K-map in part (b) to produce an optimal sum-of-
products. [2]

(d) Write, using your answer to part (c), a simplified sum-of-products expression for the truth
table.

X = ...................................................................................................................................... [2]

© UCLES 2019 9608/33/O/N/19 [Turn over


3

2 (a) A Boolean expression produces the following truth table.

INPUT OUTPUT
A B C X
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0

(i) Write the Boolean expression for the truth table by applying the sum-of-products.

X = .....................................................................................................................................

..................................................................................................................................... [3]

(ii) Complete the Karnaugh Map (K-map) for the truth table in part (a).

AB

00 01 11 10

0
C
1

[1]

The K-map can be used to simplify the function in part (a)(i).

(iii) Draw loop(s) around appropriate groups in the table in part (a)(ii), to produce an optimal
sum-of-products. [2]

(iv) Write, using your answer to part (a)(iii), a simplified Boolean expression for your
Karnaugh map.

X = ............................................................................................................................... [2]

© UCLES 2019 9608/32/O/N/19 [Turn over


4

(b)

(W + X) (Y + Z)

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

............................................................................................................................................. [3]

© UCLES 2019 9608/32/O/N/19


6

3 (a) The following logic circuit can be simplified to use only one gate.

Give the name of this single gate.

............................................................................................................................................. [1]

(b) (i) Complete the truth table for the logic circuit.

Working space
A B X Y

0 0

0 1

1 0

1 1

[2]

(ii) Give the name of the logic circuit that has this truth table.

..................................................................................................................................... [1]

(iii) Give the uses for outputs X and Y.

X ........................................................................................................................................

Y ........................................................................................................................................
[2]

© UCLES 2019 9608/33/M/J/19


7

(c) Consider the following Boolean algebraic expression:

A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D

Use Boolean algebra to simplify the expression. Show your working.

Working ..................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

Simplified expression ....................................................................................................... [5]

© UCLES 2019 9608/33/M/J/19 [Turn over


5

3 (a) A Boolean algebraic expression produces the following truth table.

INPUT OUTPUT
A B C X
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0

(i) Complete the Karnaugh Map (K-map) for the truth table.

AB

00 01 11 10

0
C
1

[1]

The K-map can be used to simplify the expression that produced the truth table in part (a).

(ii) Draw loops around appropriate groups of 1s in the K-map to produce an optimal sum-of-
products. [2]

(iii) Write the simplified sum-of-products Boolean expression for the truth table.

X = ............................................................................................................................... [2]

© UCLES 2019 9608/32/M/J/19 [Turn over


6

(b) A logic circuit with four inputs produces the following truth table.

INPUT OUTPUT
A B C D X
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 0

(i) Complete the K-map for the truth table.

AB

CD

[4]

(ii) Draw loops around appropriate groups of 1s in the K-map to produce an optimal
sum-of-products. [2]

(iii) Write the simplified sum-of-products Boolean algebraic expression for the truth table.

X = ............................................................................................................................... [2]

© UCLES 2019 9608/32/M/J/19


10

7 (a) RISC (Reduced Instruction Set Computing) and CISC (Complex Instruction Set Computing)
are two types of processor.

Tick ( ) one box in each row to show if the statement applies to RISC or CISC processors.

Statement RISC CISC

Larger instruction set

Variable length instructions

Smaller number of instruction formats

Pipelining is easier

Microprogrammed control unit

Multi-cycle instructions

[3]

(b) In parallel processing, a computer can have multiple processors running in parallel.

(i) State the four basic computer architectures used in parallel processing.

1 ........................................................................................................................................

2 ........................................................................................................................................

3 ........................................................................................................................................

4 ........................................................................................................................................
[4]

(ii) Describe what is meant by a massively parallel computer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

..................................................................................................................................... [3]

© UCLES 2019 9608/32/M/J/19


8

4 (a) A Boolean expression corresponds to the following truth table.

INPUT OUTPUT
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1

(i) Write the Boolean expression for the truth table by applying the sum-of-products.

X = .................................................................................................................................[2]

(ii) Complete the Karnaugh Map (K-map) for the truth table.

AB

00 01 11 10

0
C
1

[1]

(iii) The K-map can be used to simplify the expression in part (a)(i).

Draw loop(s) around appropriate groups of 1s in the table in part (a)(ii) to produce an
optimal sum-of-products. [3]

(iv) Write the simplified sum-of-products expression for your answer to part (a)(iii).

X = .................................................................................................................................[3]

© UCLES 2018 9608/33/O/N/18


9

(b) A logic circuit with four inputs produces the following truth table.

INPUT OUTPUT
A B C D X
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1

(i) Complete the K-map that corresponds to the truth table.

AB

CD

[4]

(ii) Draw loop(s) around appropriate groups of 1s in the table in part (b)(i) to produce an
optimal sum-of-products. [2]

(iii) Write the simplified sum-of-products expression for your answer to part (b)(ii).

X = .................................................................................................................................[2]

© UCLES 2018 9608/33/O/N/18 [Turn over


5

3 (a) Consider the following Boolean expression.

A.B.C+A.B.C+A.B.C

Use Boolean algebra to simplify the expression.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[4]

© UCLES 2018 9608/32/O/N/18 [Turn over


6

(b) (i) Complete the truth table for the following logic circuit.

A B C

Working space
A B C X

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

[2]

(ii) Complete the Karnaugh Map (K-map) for the truth table in part (b)(i).

AB

00 01 11 10

0
C
1

[1]

(iii) Draw loops around appropriate groups of 1s in the table in part (b)(ii) to produce an
optimal sum-of-products. [2]

(iv) Using your answer to part (b)(iii), write a simplified sum-of-products Boolean expression.

X = .................................................................................................................................[2]
© UCLES 2018 9608/32/O/N/18
7

(c) The truth table for a logic circuit with four inputs is shown.

INPUT OUTPUT
A B C D X
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1

(i) Complete the K-map for the truth table in part (c).

AB

CD

[4]

(ii) Draw loops around appropriate groups of 1s in the table in part (c)(i) to produce an
optimal sum-of-products. [2]

(iii) Using your answer to part (c)(ii), write a simplified sum-of-products Boolean expression.

X = .................................................................................................................................[2]

© UCLES 2018 9608/32/O/N/18 [Turn over


11

(b) In a RISC processor, four instructions (A, B, C, D) are processed using pipelining.

The following table shows five stages that take place when instructions are fetched and
executed. In time interval 1, instruction A has been fetched.

(i) In the table, write the instruction labels (A, B, C, D) in the correct time interval for each
stage. Each operation only takes one time interval.

Time interval
Stage
1 2 3 4 5 6 7 8 9
Fetch instruction A
Decode instruction
Execute instruction
Access operand in memory
Write result to register
[3]

(ii) When completed, the table in part (b)(i) shows how pipelining allows instructions to be
carried out more rapidly. Each time interval represents one clock cycle.

Calculate how many clock cycles are saved by using pipelining in the example in
part (b)(i).

Show your working.

Working .............................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

Answer ..............................................................................................................................
[3]

© UCLES 2018 9608/32/O/N/18 [Turn over


8

4 (a) A Boolean expression produces the following truth table.

INPUT OUTPUT
A B C X
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0

(i) Write the Boolean expression for the truth table as a sum-of-products.

X = .................................................................................................................................[2]

(ii) Complete the Karnaugh Map (K-map) for the truth table in part (a)(i).

AB

00 01 11 10

0
C
1

[1]

The K-map can be used to simplify the function in part (a)(i).

(iii) Draw loop(s) around appropriate group(s) of 1s to produce an optimal sum-of-products


for the table in part (a)(ii). [2]

(iv) Write the simplified sum-of-products expression for your answer to part (a)(iii).

X = .................................................................................................................................[2]

© UCLES 2018 9608/33/M/J/18


9

(b) A logic circuit with four inputs produces the following truth table.

INPUT OUTPUT
A B C D X
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 0

(i) Complete the K-map that corresponds to the truth table.

AB

CD

[4]

(ii) Draw loop(s) around appropriate group(s) of 1s to produce an optimal sum-of-products


for the table in part (b)(i). [2]

(iii) Write the simplified sum-of-products expression for your answer to part (b)(ii).

X = .................................................................................................................................[2]

© UCLES 2018 9608/33/M/J/18 [Turn over


4

(b) A computer has a single processor that contains four processing units.

Explain why this is not an example of a massively parallel computer.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

.............................................................................................................................................. [2]

(c) An application has previously executed on a single computer. The application will be
transferred onto a massively parallel computer.

The program code used in the application will need to be updated to ensure that the power of
the massively parallel computer is fully used.

Explain what changes will be required to the program code.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

.............................................................................................................................................. [2]

(d) Explain one of the hardware issues that will have to be overcome if a massively parallel
computer is to function successfully.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

.............................................................................................................................................. [2]

© UCLES 2017 9608/33/O/N/17


9

5 (a) (i) Complete the truth table for this 2-input NAND gate:

A B X
A 0 0
X 0 1
1 0
B
1 1

[1]

(ii) Complete the truth table for this 3-input NAND gate:

A B C X
0 0 0
0 0 1
A 0 1 0
B X 0 1 1
C 1 0 0
1 0 1
1 1 0
1 1 1
[1]

(b) A SR flip-flop is constructed using two NAND gates.

S
Q

Q
R

(i) Complete the truth table for the SR flip-flop:

S R Q Q
Initially 1 0 0 1
R changed to 1 1 1
S changed to 0 0 1
S changed to 1 1 1
S and R changed to 0 0 0 1 1
[3]

© UCLES 2017 9608/33/O/N/17 [Turn over


10

(ii) The final row in the table in part b(i) shows that the output for both Q and Q is 1.

Explain why this is a problem.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [2]

(c) Another type of flip-flop is the JK flip-flop.

A JK flip-flop is constructed as follows:

J
Q

Clock

Q
K

(i) Complete this truth table for the JK flip-flop.

Initial Final
Working space values values
J K Clock Q Q Q Q
0 0 1 1 0 1 0
0 0 1 0 1 0 1
0 1 1 1 0 0 1
0 1 1 0 1 0 1
1 0 1 1 0
1 0 1 0 1
1 1 1 1 0
1 1 1 0 1
[4]

© UCLES 2017 9608/33/O/N/17


4

2 (a) The following diagram shows four descriptions and two types of processor.

Draw lines to connect each description to the appropriate type of processor.

Description Type of processor

It has a simplified set of instructions.

Emphasis is on the hardware rather


CISC
than the software.

It makes extensive use of general


RISC
purpose registers.

Many instruction formats are available.


[4]

(b) In a RISC processor, instructions are processed using pipelining.

(i) Explain what is meant by pipelining.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

(ii) The following table shows the five stages that occur when instructions are fetched and
executed. The table also shows a number of time intervals.

table shows that instruction E has been fetched in time interval 2.

Complete each row of the table.

Time interval
Stage 1 2 3 4 5 6 7 8

Fetch instruction E
Read registers and decode instruction
Execute instruction
Access operand in memory
Write result to register
[3]
© UCLES 2017 9608/32/O/N/17
5

(c) The instruction set for a RISC processor that allows pipelining includes the following
instruction.

Instruction
Explanation
Op code Operands
Add the integers in registers op1 and op2.
ADD <dest>, <op1>, <op2>
Place the result in register dest.

A program contains the following three instructions.

ADD r3, r2, r1

ADD r5, r4, r3

ADD r10, r9, r8

(i) Explain why pipelining fails for the first two instructions.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

(ii) The instructions were produced by a compiler after translation of a high-level language
program.

The compiler is not capable of code optimisation.

State how the code from the compiler could have been optimised to overcome the
problem in part (c)(i).

...........................................................................................................................................

.......................................................................................................................................[1]

© UCLES 2017 9608/32/O/N/17 [Turn over


11

5 (a) Complete the truth table for this NOR gate:

A B X
0 0
A 0 1
X
B 1 0
1 1
[1]

A SR flip-flop is constructed using two NOR gates.

R
Q

Q
S

(b) Complete the truth table for the SR flip-flop:

S R Q Q
Initially 1 0 1 0
S changed to 0 0 0
R changed to 1 0 1
R changed to 0 0 0
S and R changed to 1 1 1
[4]

© UCLES 2017 9608/32/O/N/17 [Turn over


12

Another type of flip-flop is the JK flip-flop. The JK flip-flop is an improvement on the SR flip-flop.

(c) (i) The JK flip-flop has three inputs. Two of the inputs are the Set (J) and the Reset (K).

State the third input.

.......................................................................................................................................[1]

(ii) There are two problems with the SR flip-flop that the JK flip-flop overcomes.

State each problem and state why it does not occur for the JK flip-flop.

Problem 1 ..........................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

Problem 2 ..........................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................
[4]

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8

3 Consider the following logic circuit, which contains a redundant logic gate.

A
X

(a) Write the Boolean algebraic expression corresponding to this logic circuit.

X = ........................................................................................................................................[3]

(b) Complete the truth table for this logic circuit.

A B C Working space X

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1
[2]

(c) (i) Complete the Karnaugh Map (K-map) for the truth table in part (b).
AB
00 01 11 10
0
C
1
[1]
The K-map can be used to simplify the expression in part (a).

(ii) Draw loop(s) around appropriate groups to produce an optimal sum-of-products. [2]

(iii) Write a simplified sum-of-products expression, using your answer to part (ii).

X = .................................................................................................................................[2]

© UCLES 2017 9608/33/M/J/17


9

(d) One Boolean identity is:

A + A.B = A + B

Simplify the expression for X in part (a) to the expression for X in part (c)(iii). You should use
the given identity.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[2]

© UCLES 2017 9608/33/M/J/17 [Turn over


15

(c) An alternative method of reading and processing sensor data is to use interrupts. Each sensor
is connected so that it can send an interrupt signal to the processor if its value changes.

On receipt of an interrupt signal, the processor carries out a number of steps as shown in the
following diagram.

Interrupt 1. Disable interrupts

2. Save current task

3. Identify source of
interrupt

4. Jump to Interrupt
Service Routine

5. Restore task

Return to task 6. Enable interrupts

(i) State the purpose of step 1.

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[1]

(ii) State the purpose of step 6.

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[1]

(iii) Explain how the current task is saved in step 2.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

© UCLES 2017 9608/33/M/J/17 [Turn over


16

(iv) State two benefits of using interrupts to read and process the sensor data.

Benefit 1 ............................................................................................................................

...........................................................................................................................................

Benefit 2 ............................................................................................................................

...........................................................................................................................................
[2]

(v) The interrupt handler in step 3 has to test each bit of a 16-bit register to discover the
source of the interrupt.

The contents of the 16-bit register are loaded into the 16-bit accumulator:

Accumulator
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 0 0 0 0 0 1 0 1 0 1 0 1 0 0 0

An instruction is required to achieve the following:

• If bit 9 is zero, set the accumulator to zero.


• If bit 9 is one, set the accumulator to a non-zero value.

Write this instruction using an appropriate bitwise operation.

.......................................................................................................................................[2]

Permission to reproduce items where third-party owned material protected by copyright is included has been sought and cleared where possible. Every
reasonable effort has been made by the publisher (UCLES) to trace copyright holders, but if any items requiring clearance have unwittingly been included, the
publisher will be pleased to make amends at the earliest possible opportunity.

To avoid the issue of disclosure of answer-related information to candidates, all copyright acknowledgements are reproduced online in the Cambridge International
Examinations Copyright Acknowledgements Booklet. This is produced for each series of examinations and is freely available to download at www.cie.org.uk after
the live examination series.

Cambridge International Examinations is part of the Cambridge Assessment Group. Cambridge Assessment is the brand name of University of Cambridge Local
Examinations Syndicate (UCLES), which is itself a department of the University of Cambridge.

© UCLES 2017 9608/33/M/J/17


6

(c) Digital certificates are used in internet communications. A Certificate Authority (CA) is
responsible for issuing a digital certificate.

The digital certificate contains a digital signature produced by the CA.

(i) Name three additional data items present in a digital certificate.

1 ........................................................................................................................................

2 ........................................................................................................................................

3 ........................................................................................................................................
[3]

(ii) Describe how the digital signature is produced by the CA.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]

(iii) Give the reason for including a digital signature in the digital certificate.

...........................................................................................................................................

.......................................................................................................................................[1]

3 A logic circuit is shown:

S
Q

(a) Write the Boolean algebraic expression corresponding to this logic circuit:

S = ........................................................................................................................................[4]

© UCLES 2017 9608/32/M/J/17


7

(b) Complete the truth table for this logic circuit:

P Q R Working space S

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1
[2]

(c) (i) Complete the Karnaugh Map (K-map) for the truth table in part (b).
PQ
00 01 11 10
0
R
1
[1]

The K-map can be used to simplify the function in part (a).

(ii) Draw loop(s) around appropriate groups to produce an optimal sum-of-products. [1]

(iii) Write a simplified sum-of-products expression, using your answer to part (ii).

S = .................................................................................................................................[1]

(d) One Boolean identity is:


(A + B) . C = A . C + B . C

Simplify the expression for S in part (a) to the expression for S in part (c)(iii).

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[3]
© UCLES 2017 9608/32/M/J/17 [Turn over
14

(c) An alternative method of reading and processing sensor data is to use interrupts. Each sensor
is connected so that it can send an interrupt signal to the processor if its value changes.

On receipt of an interrupt signal, the processor carries out a number of steps as shown in the
following diagram.

Interrupt 1. Disable interrupts

2. Save current task

3. Identify source of
interrupt

4. Jump to Interrupt
Service Routine

5. Restore task

Return to task 6. Enable interrupts

(i) State the purpose of step 3.

...........................................................................................................................................

.......................................................................................................................................[1]

(ii) Explain what happens at step 4.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

© UCLES 2017 9608/32/M/J/17


8

(d) Explain why the algorithms given in part (c) may not be the best choice for efficient memory
management.

Longest resident .......................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

Least used ................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

.............................................................................................................................................. [4]

4 (a) (i) Complete the truth table for this logic circuit.

X Input Output
A X Y A B
Y 0 0
0 1
1 0
B 1 1

[2]

(ii) State the name given to this logic circuit.

...................................................................................................................................... [1]

(iii) Name the labels usually given to A and B.

Label A ..............................................................................................................................

Label B ..............................................................................................................................

Explain why your answers are more appropriate for the A and B labels.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [4]

© UCLES 2016 9608/33/O/N/16


9

(b) (i) Write the Boolean expression corresponding to the following logic circuit:

B
X

...................................................................................................................................... [2]

(ii) Use Boolean algebra to simplify the expression that you gave in part (b)(i).

Show your working.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [3]

© UCLES 2016 9608/33/O/N/16 [Turn over


10

5 (a) (i) A half adder is a logic circuit with the following truth table.

Input Output
X Y A B
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

The following logic circuit is constructed.

P X A
J
HALF ADDER
Q Y B

X A
HALF ADDER
R Y B K

Complete the following truth table for this logic circuit.

Input Working space Output


P Q R J K
0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1
[2]

(ii) State the name given to this logic circuit.

...................................................................................................................................... [1]

© UCLES 2016 9608/32/O/N/16


11

(iii) Name the labels usually given to J and K.

Label J ..............................................................................................................................

Label K ..............................................................................................................................

Explain why your answers are appropriate labels for these outputs.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [4]

(b) (i) Write down the Boolean expression corresponding to the following logic circuit:

A
B
X

...................................................................................................................................... [2]

(ii) Use Boolean algebra to simplify the expression given in part (b)(i).

Show your working.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [4]

© UCLES 2016 9608/32/O/N/16 [Turn over


2

1 A Local Area Network (LAN) consists of four computers and one server. The LAN uses a bus
topology.

(a) Complete the diagram below to show how the computers and the File server could be
connected.

Computer
A

Computer File server Computer


D B

Computer
C
[2]

(b) Computer C sends a data packet to Computer A.

Three statements are given below.

Tick ( ) to show whether each statement is true or false.

Statement True False


Computer C uses the IP address of Computer A
to indicate that the packet is for Computer A.
Computer B can read the packet sent from
Computer C to Computer A.
The File server routes the packet to Computer A.
[3]

© UCLES 2016 9608/33/M/J/16


10

5 (a) Complete the truth table for this NAND gate:

A B X

A 0 0

X 0 1
B 1 0
1 1

[1]

A SR flip-flop is constructed using two NAND gates.

S
Q

Q
R

(b) (i) Complete the truth table for the SR flip-flop.


S R Q Q
Initially 1 0 0 1
R changed to 1 1 1
S changed to 0 0 1
S changed to 1 1 1
S and R changed to 0 0 0
[4]

(ii) One of the combinations in the truth table should not be allowed to occur.

State the values of S and R that should not be allowed. Justify your choice.

S = .............................. R = ..............................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]
© UCLES 2016 9608/33/M/J/16
11

Another type of flip-flop is the JK flip-flop.

(c) (i) Give one extra input present in the JK flip-flop.

...........................................................................................................................................

.......................................................................................................................................[1]

(ii) Give one advantage of the JK flip-flop.

...........................................................................................................................................

.......................................................................................................................................[1]

(d) Describe the role of flip-flops in a computer.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[2]

© UCLES 2016 9608/33/M/J/16 [Turn over


10

5 (a) Complete the truth table for this NAND gate:

A B X

A 0 0

X 0 1
B 1 0
1 1

[1]

A SR flip-flop is constructed using two NAND gates.

S
Q

Q
R

(b) (i) Complete the truth table for the SR flip-flop.


S R Q Q
Initially 1 0 0 1
R changed to 1 1 1
S changed to 0 0 1
S changed to 1 1 1
S and R changed to 0 0 0
[4]

(ii) One of the combinations in the truth table should not be allowed to occur.

State the values of S and R that should not be allowed. Justify your choice.

S = .............................. R = ..............................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]
© UCLES 2016 9608/32/M/J/16
11

Another type of flip-flop is the JK flip-flop.

(c) (i) Give one extra input present in the JK flip-flop.

...........................................................................................................................................

.......................................................................................................................................[1]

(ii) Give one advantage of the JK flip-flop.

...........................................................................................................................................

.......................................................................................................................................[1]

(d) Describe the role of flip-flops in a computer.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[2]

© UCLES 2016 9608/32/M/J/16 [Turn over


8

4 (a) Three descriptions and two types of processor are shown below.

Draw a line to connect each description to the appropriate type of processor.

Description Type of processor

Makes extensive use of


RISC
general purpose registers

Many addressing modes


CISC
are available

Has a simplified set of


instructions
[3]

(b) In a RISC processor three instructions (A followed by B, followed by C) are processed using
pipelining.

The following table shows the five stages that occur when instructions are fetched and
executed.

(i) The ‘A’ in the table indicates that instruction A has been fetched in time interval 1.

Complete the table to show the time interval in which each stage of each instruction (A,
B, C) is carried out.

Time interval
Stage 1 2 3 4 5 6 7 8 9
Fetch instruction A
Decode instruction
Execute instruction
Access operand in memory
Write result to register
[3]

(ii) The completed table shows how pipelining allows instructions to be carried out more
rapidly. Each time interval represents one clock cycle.

Calculate how many clock cycles are saved by the use of pipelining in the above example.

Show your working.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]
© UCLES 2015 9608/33/O/N/15
9

5 (a) (i) Complete the Boolean function that corresponds to the following truth table.

INPUT OUTPUT

A B C X

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 1

X = A . B . C + ................................................................................................................[3]

The part to the right of the equals sign is known as the sum-of-products.

(ii) For the truth table above complete the Karnaugh Map (K-map).

AB

00 01 11 10

0
C
1
[1]

The K-map can be used to simplify the function in part(a)(i).

(iii) Draw loop(s) around appropriate groups of 1’s to produce an optimal sum-of-products.
[2]

(iv) Using your answer to part (a)(iii), write the simplified sum-of-products Boolean function.

X = .................................................................................................................................[2]

© UCLES 2015 9608/33/O/N/15 [Turn over


9

5 (a) (i) Complete the Boolean function that corresponds to the following truth table.

INPUT OUTPUT

P Q R Z

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 0

1 1 1 1

Z = P . Q . R + ................................................................................................................[3]

The part to the right of the equals sign is known as the sum-of-products.

(ii) For the truth table above complete the Karnaugh Map (K-map).

PQ

00 01 11 10

0
R
1
[1]

The K-map can be used to simplify the function in part(a)(i).

(iii) Draw loop(s) around appropriate groups of 1’s to produce an optimal sum-of-products.
[2]

(iv) Using your answer to part (a)(iii), write the simplified sum-of-products Boolean function.

Z = .................................................................................................................................[1]

© UCLES 2015 9608/32/O/N/15 [Turn over


10

(b) The truth table for a logic circuit with four inputs is given below:

INPUT OUTPUT
A B C D X
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 1

(i) Complete the K-map corresponding to the truth table above.

AB

CD

[4]

(ii) Draw loop(s) around appropriate groups of 1’s to produce an optimal sum-of-products.
[2]

(iii) Using your answer to part (b)(ii), write the simplified sum-of-products Boolean function.

X = .................................................................................................................................[2]

© UCLES 2015 9608/33/O/N/15


10

(b) The truth table for a logic circuit with four inputs is given below:

INPUT OUTPUT
P Q R S Z
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 1
0 1 1 0 0
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

(i) Complete the K-map corresponding to the truth table above.

PQ

RS

[4]

(ii) Draw loop(s) around appropriate groups of 1’s to produce an optimal sum-of-products.
[2]

(iii) Using your answer to part (b)(ii), write the simplified sum-of-products Boolean function.

Z = .................................................................................................................................[2]

© UCLES 2015 9608/32/O/N/15


10

5 (a) (i) Complete the truth table for this logic circuit:

A
X

Working space
A B X
0 0
0 1
1 0
1 1
[1]

(ii) Complete the truth table for this logic circuit:

Working space
A B X
0 0
0 1
1 0
1 1
[1]

© UCLES 2015 9608/33/M/J/15


11

(b) A student decides to write an equation for X to represent the full behaviour of each logic
circuit.

(i) Write the Boolean expression that will complete the required equation for X for each
circuit:

Circuit 1: X = ......................................................................................................................

Circuit 2: X = ..................................................................................................................[2]

(ii) Write the De Morgan’s Law which is shown by your answers to part (a) and part (b)(i).

.......................................................................................................................................[1]

(c) Write the Boolean algebraic expression corresponding to the following logic circuit:

A
B

...............................................................................................................................................[3]

(d) Using De Morgan’s laws and Boolean algebra, simplify your answer to part (c).

Show all your working.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[3]

© UCLES 2015 9608/33/M/J/15 [Turn over


8

4 (a) (i) Complete the truth table for this logic circuit:

A
X

Working space
A B X
0 0
0 1
1 0
1 1
[1]

(ii) Complete the truth table for this logic circuit:

Working space
A B X
0 0
0 1
1 0
1 1
[1]

© UCLES 2015 9608/32/M/J/15


9

(b) A student decides to write an equation for X to represent the full behaviour of each logic
circuit.

(i) Write the Boolean expression that will complete the required equation for X for each
circuit:

Circuit 1: X = ......................................................................................................................

Circuit 2: X = ..................................................................................................................[2]

(ii) Write the De Morgan’s Law which is shown by your answers to part (a) and part (b)(i).

.......................................................................................................................................[1]

(c) Write the Boolean algebraic expression corresponding to the following logic circuit:

A
B

...............................................................................................................................................[3]

(d) Using De Morgan’s laws and Boolean algebra, simplify your answer to part (c).

Show all your working.

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...............................................................................................................................................[3]

© UCLES 2015 9608/32/M/J/15 [Turn over

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