ISP Console User Manual

UM0006
User Manual

ISP Console User Manual

Introduction
This user manual gives an overview of Artery ISP Console. ISP Console is a command-line
application based on MCU Bootloader. With the help of this software, users can configure ARTERY
MCU devices through UART or USB ports.

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Contents

1 Introduction ............................................................................................................ 5

Environmental requirements ..................................................................................... 5

Glossary ................................................................................................................... 5

2 Installation .............................................................................................................. 6

3 Part numbers and interfaces ................................................................................ 7

AT32F403 series ...................................................................................................... 7

AT32F413 series ...................................................................................................... 7
AT32F415 series ...................................................................................................... 8
AT32F403A/F407 series ........................................................................................... 9
AT32F421 series .................................................................................................... 10
AT32F435/F437 series ............................................................................................11
AT32WB415 series ................................................................................................. 12
AT32F425 series .................................................................................................... 13
AT32L021 series..................................................................................................... 13

4 Software operation .............................................................................................. 15

Operating mode ...................................................................................................... 15

4.1.1 Used in Windows........................................................................................................15
4.1.2 Used in Linux ..............................................................................................................16

Command line parameters ..................................................................................... 17

ISP Console return codes ....................................................................................... 19
Flow chart ............................................................................................................... 20

5 Revision history ................................................................................................... 21

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List of tables
Table 1. AT32F403 series part numbers and interface support........................................................... 7
Table 2. AT32F403 GPIO Pin Map ...................................................................................................... 7
Table 3. AT32F413 series part numbers and interface support........................................................... 7
Table 4. AT32F413 GPIO Pin Map ...................................................................................................... 8
Table 5. AT32F415 series part numbers and interface support........................................................... 8
Table 6. AT32F415 GPIO Pin Map ...................................................................................................... 8
Table 7. AT32F403A/F407 series part numbers and interface support ............................................... 9
Table 8. AT32F403A/F407 GPIO Pin Map ........................................................................................... 9
Table 9. AT32F421 series part numbers and interface support......................................................... 10
Table 10. AT32F421 GPIO Pin Map .................................................................................................. 10
Table 11. AT32F435/F437 series part numbers and interface support ............................................. 11
Table 12. AT32F435/F437 GPIO Pin Map ......................................................................................... 12
Table 13. AT32WB415 series part numbers and interface support ................................................... 12
Table 14. AT32WB415 GPIO Pin Map ............................................................................................... 12
Table 15. AT32F425 series part numbers and interface support ...................................................... 13
Table 16. AT32F425 GPIO Pin Map .................................................................................................. 13
Table 17. AT32L021 GPIO Pin Map ................................................................................................... 13
Table 18. AT32L021 GPIO Pin Map ................................................................................................... 14
Table 19 List of command line parameters ........................................................................................ 17
Table 20 List of return codes.............................................................................................................. 19
Table 21. Document revision history.................................................................................................. 21

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List of figures
Figure- 1 Command line window ....................................................................................................... 15
Figure- 2 Batch file processing .......................................................................................................... 15
Figure- 3 Linux system ...................................................................................................................... 16
Figure- 4 Shell script file .................................................................................................................... 16
Figure- 5 Flow chart ........................................................................................................................... 20

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1 Introduction
Environmental requirements
 Software resources
Windows OS
Windows 7 and above

Linux OS
Ubuntu, Fedora

 Hardware resources
Serial communication port (COM).
USB communication port.

Glossary
 ISP:
ISP is the abbreviation for In-System Programming. It enables users to directly perform write or
erase operations on the chip with an ISP feature.

 UART：
UART is the abbreviation for Universal Asynchronous Receiver/Transmitter. It is a serial
communication port (COM) for full-duplex asynchronous communication.

 USB:
USB is the abbreviation for Universal Serial Bus. It is an external bus standard used to regulate the
connection and communication between computers and external devices.

 DFU:
DFU is the abbreviation for Device Firmware Upgrade. It is a USB-based device firmware update
protocol..

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2 Installation
 Hardware installation
UART communication: The device must be connected to the serial communication port (COM)
on the computer.
DFU communication: The device must be connected to USB port on the computer.

 USB DFU driver installation

USB DFU communication: a USB DFU driver is required for windows systems, but not for
Linux system.

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3 Part numbers and interfaces

AT32F403 series
Table 1. AT32F403 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pins
UART1 UART2 DFU
AT32F403ZCT6 256KB LQFP144 Y Y Y
AT32F403VCT6 256KB LQFP100 Y Y Y
AT32F403RCT6 256KB LQFP64 Y Y Y
AT32F403CCT6 256KB LQFP48 Y Y Y
AT32F403ZGT6 1024KB LQFP144 Y Y Y
AT32F403VGT6 1024KB LQFP100 Y Y Y
AT32F403RGT6 1024KB LQFP64 Y Y Y
AT32F403CGT6 1024KB LQFP48 Y Y Y
AT32F403ZET6 512KB LQFP144 Y Y Y
AT32F403VET6 512KB LQFP100 Y Y Y
AT32F403RET6 512KB LQFP64 Y Y Y
AT32F403CET6 512KB LQFP48 Y Y Y
AT32F403CGU6 1024KB QFN48 Y Y Y
AT32F403CEU6 512KB QFN48 Y Y Y
AT32F403CCU6 256KB QFN48 Y Y Y
AT32F403CBT6 128KB LQFP48 Y Y Y
AR8F403CGT6 1024KB LQFP48 Y Y Y

Table 2. AT32F403 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All PA9 PA10

AT32F403ZGT6/AT32F403VGT6 PD5 PD6

UART2
Others PA2 PA3

DFU All PA11 PA12

AT32F413 series
Table 3. AT32F413 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pins
UART1 UART2 DFU
AT32F413RCT7 256KB LQFP64 Y Y Y
AT32F413CCT7 256KB LQFP48 Y Y Y
AT32F413KCU7-4 256KB QFN32 Y Y Y
AT32F413CCU7 256KB QFN48 Y Y Y
AT32F413RBT7 128KB LQFP64 Y Y Y
AT32F413CBT7 128KB LQFP48 Y Y Y
AT32F413KBU7-4 128KB QFN32 Y Y Y

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Interfaces supported
Part numbers Flash Size Pins
UART1 UART2 DFU
AT32F413CBU7 128KB QFN48 Y Y Y
AT32F413C8T7 64KB LQFP48 Y Y Y
AT32FEBKC8T7 64KB LQFP48 Y Y Y

Table 4. AT32F413 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All PA9 PA10

UART2 All PA2 PA3

DFU All PA11 PA12

AT32F415 series
Table 5. AT32F415 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pins
UART1 UART2 DFU
AT32F415RCT7 256KB LQFP64 Y Y Y
AT32F415RCW 256KB LQFP64 Y Y Y
AT32F415RCT7-7 256KB LQFP64 Y Y Y
AT32F415CCT7 256KB LQFP48 Y Y Y
AT32F415KCU7-4 256KB QFN32 Y Y Y
AT32F415RBT7 128KB LQFP64 Y Y Y
AT32F415RBW 128KB LQFP64 Y Y Y
AT32F415RBT7-7 128KB LQFP64 Y Y Y
AT32F415CBT7 128KB LQFP48 Y Y Y
AT32F415KBU7-4 128KB QFN32 Y Y Y
AT32F415R8T7 64KB LQFP64 Y Y Y
AT32F415R8T7-7 64KB LQFP64 Y Y Y
AT32F415C8T7 64KB LQFP48 Y Y Y
AT32F415K8U7-4 64KB QFN32 Y Y Y
AT32F415CCU7 256KB QFN48 Y Y Y
AT32F415CBU7 128KB QFN48 Y Y Y

Table 6. AT32F415 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All PA9 PA10

UART2 All PA2 PA3

DFU All PA11 PA12

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AT32F403A/F407 series
Table 7. AT32F403A/F407 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pin
UART1 UART2 DFU
AT32F403AVCT7 256KB LQFP100 Y Y Y
AT32F403ARCT7 256KB LQFP64 Y Y Y
AT32F403ACCT7 256KB LQFP48 Y Y Y
AT32F403ACCU7 256KB QFN48 Y Y Y
AT32F403AVET7 512KB LQFP100 Y Y Y
AT32F403ARET7 512KB LQFP64 Y Y Y
AT32F403ACET7 512KB LQFP48 Y Y Y
AT32F403ACEU7 512KB QFN48 Y Y Y
AT32F403AVGT7 1024KB LQFP100 Y Y Y
AT32F403ARGT7 1024KB LQFP64 Y Y Y
AT32F403ACGT7 1024KB LQFP48 Y Y Y
AT32F403ACGU7 1024KB QFN48 Y Y Y
AT32F407VCT7 256KB LQFP100 Y Y Y
AT32F407RCT7 256KB LQFP64 Y Y Y
AT32F407VET7 512KB LQFP100 Y Y Y
AT32F407RET7 512KB LQFP64 Y Y Y
AT32F407VGT7 1024KB LQFP100 Y Y Y
AT32F407RGT7 1024KB LQFP64 Y Y Y
AT32F407AVCT7 256KB LQFP100 Y Y Y
AT32F407AVGT7 1024KB LQFP100 Y Y Y
AR8F403CGT6-A 1024KB LQFP48 Y Y Y
AT32F403AVGW 1024KB LQFP100 Y Y Y

Table 8. AT32F403A/F407 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All PA9 PA10

AT32F403AVGT7/AT32F407VGT7 PD5 PD6

UART2
Others PA2 PA3

DFU All PA11 PA12

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AT32F421 series
Table 9. AT32F421 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pin
UART1 UART2 DFU
AT32F421C8T7 64KB LQFP48 Y Y N
AT32F421C8W 64KB LQFP48 Y Y N
AT32F421K8T7 64KB LQFP32 Y Y N
AT32F421K8U7 64KB QFN32 Y Y N
AT32F421K8U7-4 64KB QFN32 Y Y N
AT32F421F8U7 64KB QFN20 Y Y N
AT32F421F8P7 64KB TSSOP20 Y Y N
AT32F421PF8P7 64KB TSSOP20 Y Y N
AT32F421G8U7 64KB QFN28 Y Y N
AT32F421C6T7 32KB LQFP48 Y Y N
AT32F421K6T7 32KB LQFP32 Y Y N
AT32F421K6U7 32KB QFN32 Y Y N
AT32F421K6U7-4 32KB QFN32 Y Y N
AT32F421F6U7 32KB QFN20 Y Y N
AT32F421F6P7 32KB TSSOP20 Y Y N
AT32F421G6U7 32KB QFN28 Y Y N
AT32F421C4T7 16KB LQFP48 Y Y N
AT32F421K4T7 16KB LQFP32 Y Y N
AT32F421K4U7 16KB QFN32 Y Y N
AT32F421K4U7-4 16KB QFN32 Y Y N
AT32F421F4U7 16KB QFN20 Y Y N
AT32F421F4P7 16KB TSSOP20 Y Y N
AT32F421PF4P7 16KB TSSOP20 Y Y N
AT32F421G4U7 16KB QFN28 Y Y N
AT32F4212C8T7 64KB LQFP48 Y Y N

Table 10. AT32F421 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All PA9 PA10

UART2 All PA2 PA3

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AT32F435/F437 series
Table 11. AT32F435/F437 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pin
UART1 UART2 UART3 DFU1 DFU2
AT32F435ZMT7 4032KB LQFP144 Y Y Y Y Y
AT32F435ZGT7 1024KB LQFP144 Y Y Y Y Y
AT32F435ZCT7 256KB LQFP144 Y Y Y Y Y
AT32F435VMT7 4032KB LQFP100 Y Y Y Y Y
AT32F435VGT7 1024KB LQFP100 Y Y Y Y Y
AT32F435VCT7 256KB LQFP100 Y Y Y Y Y
AT32F435RMT7 4032KB LQFP64 Y Y Y Y Y
AT32F435RGT7 1024KB LQFP64 Y Y Y Y Y
AT32F435RCT7 256KB LQFP64 Y Y Y Y Y
AT32F435CMT7 4032KB LQFP48 Y Y Y Y Y
AT32F435CGT7 1024KB LQFP48 Y Y Y Y Y
AT32F435CCT7 256KB LQFP48 Y Y Y Y Y
AT32F435CMU7 4032KB QFN48 Y Y Y Y Y
AT32F435CGU7 1024KB QFN48 Y Y Y Y Y
AT32F435CCU7 256KB QFN48 Y Y Y Y Y
AT32F437ZMT7 4032KB LQFP144 Y Y Y Y Y
AT32F437ZGT7 1024KB LQFP144 Y Y Y Y Y
AT32F437ZCT7 256KB LQFP144 Y Y Y Y Y
AT32F437VMT7 4032KB LQFP100 Y Y Y Y Y
AT32F437VGT7 1024KB LQFP100 Y Y Y Y Y
AT32F437VCT7 256KB LQFP100 Y Y Y Y Y
AT32F437RMT7 4032KB LQFP64 Y Y Y Y Y
AT32F437RGT7 1024KB LQFP64 Y Y Y Y Y
AT32F437RCT7 256KB LQFP64 Y Y Y Y Y
AT32F435CMT7- 4032KB LQFP48 Y Y Y Y Y
E
AT32F435CGT7- 960KB LQFP48 Y Y Y Y Y
W
AT32F435CCT7- 192KB LQFP48 Y Y Y Y Y
W
AT32F435CMU7- 4032KB QFN48 Y Y Y Y Y
E
AT32F435CGU7- 960KB QFN48 Y Y Y Y Y
W
AT32F435CCU7- 192KB QFN48 Y Y Y Y Y
W

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Table 12. AT32F435/F437 GPIO Pin Map
IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All PA9 PA10

AT32F435/F437ZxT7,AT32F435/F437VxT7 PD5 PD6

UART2
Others PA2 PA3
AT32F435/F437ZxT7, AT32F435/F437VxT7, AT32F435/F437RxT7 PC10 PC11
UART3
Others PB10 PB11

DFU1 All PA11 PA12

DFU2 All PB14 PB15

AT32WB415 series
Table 13. AT32WB415 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pin
UART1 UART2 DFU
AT32WB415CCU7-7 256KB QFN48 N Y Y

Table 14. AT32WB415 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP

UART1 All 无 无

UART2 All PA2 PA3

DFU All PA11 PA12

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AT32F425 series
Table 15. AT32F425 series part numbers and interface support
Interfaces supported
Part numbers Flash Size Pin
UART1 UART2 DFU
AT32F425R8T7 64KB 64LQFP Y Y N
AT32F425R6T7 32KB 64LQFP Y Y N
AT32F425R8T7-7 64KB 64LQFP Y Y N
AT32F425R6T7-7 32KB 64LQFP Y Y N
AT32F425C8T7 64KB 48LQFP Y Y N
AT32F425C6T7 32KB 48LQFP Y Y N
AT32F425C8U7 64KB 48QFN Y Y N
AT32F425C6U7 32KB 48QFN Y Y N
AT32F425K8T7 64KB 32LQFP Y Y N
AT32F425K6T7 32KB 32LQFP Y Y N
AT32F425K8U7-4 64KB 32QFN Y Y N
AT32F425K6U7-4 32KB 32QFN Y Y N
AT32F425F8P7 64KB 20TSSOP Y Y N
AT32F425F6P7 32KB 20TSSOP Y Y N
AT32F425G8U7 64KB 28QFN Y Y N
AT32F425G6U7 32KB 28QFN Y Y N

Table 16. AT32F425 GPIO Pin Map

IP MCUs supported TX Pin/DM RX Pin/DP
UART1 All PA9 PA10

UART2 All PA2 PA3

AT32L021 series
Table 17. AT32L021 GPIO Pin Map
Interfaces supported
产品型号 Flash Size Pin
UART1 UART2 DFU
AT32L021C8T7 64KB 48LQFP Y Y N
AT32L021C6T7 32KB 48LQFP Y Y N
AT32L021C4T7 16KB 48LQFP Y Y N
AT32L021K8T7 64KB 32LQFP Y Y N
AT32L021K6T7 32KB 32LQFP Y Y N
AT32L021K4T7 16KB 32LQFP Y Y N
AT32L021K8U7 64KB 32QFN Y Y N
AT32L021K6U7 32KB 32QFN Y Y N
AT32L021K4U7 16KB 32QFN Y Y N
AT32L021K8U7-4 64KB 32QFN Y Y N
AT32L021K6U7-4 32KB 32QFN Y Y N
AT32L021K4U7-4 16KB 32QFN Y Y N

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Interfaces supported
产品型号 Flash Size Pin
UART1 UART2 DFU
AT32L021F8U7 64KB 20QFN Y Y N
AT32L021F6U7 32KB 20QFN Y Y N
AT32L021F4U7 16KB 20QFN Y Y N
AT32L021F8P7 64KB 20TSSOP Y Y N
AT32L021F6P7 32KB 20TSSOP Y Y N
AT32L021F4P7 16KB 20TSSOP Y Y N
AT32L021G8U7 64KB 28QFN Y Y N
AT32L021G6U7 32KB 28QFN Y Y N
AT32L021G4U7 16KB 28QFN Y Y N

Table 18. AT32L021 GPIO Pin Map

IP MCU TX Pin/DM RX Pin/DP
UART1 All PA9 PA10
UART2 All PA2 PA3

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4 Software operation
Operating mode
4.1.1 Used in Windows
Mode 1: Input parameters on the command line

Figure- 1 Command line window

Mode 2: Batch file processing (Refer to DFU_download.bat and USART_download.bat for details on common
operations)

Figure- 2 Batch file processing

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4.1.2 Used in Linux
1. The script AT32_ISP_Console.sh needs an execution permission. Command: chmod +x
AT32_ISP_Console.sh;
2. Edit the script USART_download.sh, add operation steps based on command line parameters
shown in Section 4.2 (See USART_download.sh in the example) and give an execution
permission. Command: chmod +x USART_download.sh;
3. To execut the script USART_download.sh in the terminal, a sudo is required, for either a serial
interface or USB device needs a root user authority. Command: sudo ./ USART_download.sh.

Figure- 3 Linux system

Figure- 4 Shell script file

Note: 1.To use DFU communication in Windows system, it is required to run

Artery_DFU_DriverInstall.exe and install a DFU driver;
2. When using DFU communication, one PC can only be connected to one device.

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Command line parameters
Table 19 List of command line parameters

Command Sub Command Remarks

-? Show the help.

-dfu Establish connection to the DFU port.

Establish connection to the COM port.

If OS is Windows, this is port number, e.g: 1, 2… default 1. Else this is port name,
--pn port number
e.g: ttyACM0, ttyS0.

--br baud rate E.g: 256000, 128000, 115200, 57600 ..., default 115200.

--db data bit Value in {5,6,7,8} ... default 8.

--pr parity Value in {NONE,ODD,EVEN} default EVEN.

--to time out (s) e.g 1, 2, 3 ..., default 5.

Auto connect option, e.g 0, 1, 2, 3 ..., default 0.

0: Not use RTS and DTR.

1: DTR low level to reset, not use RTS.

2: DTR low level to reset, RTS low level to load bootloader.

-com
3: DTR low level to reset, RTS high level to load bootloader.

4: DTR high level to reset, not use RTS.

5: DTR high level to reset, RTS low level to load bootloader.

--auto option
6: DTR high level to reset, RTS high level to load bootloader.

7: RTS low level to reset, not use DTR.

8: RTS low level to reset, DTR low level to load bootloader.

9: RTS low level to reset, DTR high level to load bootloader.

10: RTS high level to reset, not use DTR.

11: RTS high level to reset, DTR low level to load bootloader.

12: RTS high level to reset, DTR high level to load bootloader.

Erase flash.

-e --all Erase all sectors of flash,SPIM(SPIM enabled),boot memory(AP mode enabled).

--sec n-m Erase selected sectors, begin_sector-end_sector, e.g 0-20.

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Command Sub Command Remarks

Upload flash contents to the specified file.

-u --sec n-m Upload selected sectors, begin_sector-end_sector, e.g 0-20.

--fn file_name Full path name (bin, hex or s19 file; the file type is recognized by its extension).

Download the conent of the specified file into flash.

--a address(hex) Start address, default 0x08000000; ignored if the target file is not a binary file.

-d --fn file_name Full path name (bin, hex or s19 file; the file type is recognized by its extension).

--v verify after download.

--o Optimize; removes FFs data..

Enable or disable protection.

--dfap Disable flash access protection .

--depp Disable erase and program protection .

--efap Enable flash access protection, all arguments following this one will fail .

-p
--efap1 Enable basic access protection, all options following this one will fail.

--efap2 Enable high level access protection, all options following this one will fail.

If the device is AT32F425/AT32F423/AT32L021, you must enter "--y" for

--y
confirmation. (--efap2 --y).
Enable erase and program protection for sector codes, begin_sector-end_sector,
--eepp n-m
e.g 0-20.
Set user system data to MCU.
--get --fn Get user system data from the device and write it in the specified file , full path
-usd file_name name (bin/hex file,the file type is recognized by its extension).
--set --fn Load user system data from the specified file and write it to the device , full path
file_name name (bin/hex file,the file type is recognized by its extension).

Run the flash code at the specified address.

-r
--a address(hex) Address, default 0x08000000.

Enable to access SPIM.

--ft type SPIM flash type value 1 or 2.default value 1.

--fs size SPIM flash size (MB).

-enspim
--fda value(hex) SPIM FLASH_DA, hexadecimal.

Remap IO pin used by SPIM(bank3).

--remap 0/1 0: remap0(Use PA11/PA12 pins).
1: remap1(Use PB10/PB11 pins).

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Note: Depending on the used USB chips, the serial interface hardware flow control DTR and RTS may
have opposite electrical levels in Windows and Linux systems. For example, for CH340, its high and low
levels are opposite in Windows and Linux systems; while for FT232, its high and low levels are the same
in both systems. For others, their levels must be configured according to the actual situations.

ISP Console return codes

In case fo error, while executing AT-Link Console commands, the return code (Errrolevel) is greater
than 0.

Table 20 List of return codes

Return code Command Error

0x00 All Finished successfully

0x01 All Command arguments error.

0x02 All Connection problem.

0x03 -d Flash memory programming/verification error.

0x04 -u Failed to upload Flash memory contents

0x06 -usd --get Failed to get user system data from the device.

0x07 -usd --set Failed to write user system data to the device.

0x08 -enspim Failed to enable SPIM.

0x0C -r Failed to run at address.

0x20 -p --efap1 Failed to enable access protection.

0x21 -p --efap2 Failed to enable high level access protection.

0x22 -p --dfap Failed to disable flash access protection.

0x23 -p --depp Failed to disable erase and program protection.

0x24 -p --eepp Failed to enable erase and program protection.

0x30 -e --all Failed to erase all sectors of Flash.

Failed to erase all sectors of Flash,SPIM(SPIM enabled),boot memory(AP

0x31 -e --all
mode enabled).

0x33 -e --sec Failed to erase selected sectors.

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Flow chart
Figure- 5 Flow chart

Start

When MCU acce ss

protected or e rase a nd
Disa ble access p rote ction or prog ram p rote cted
erase and pro gram
protection

When a SPIM is
nee ded
Ena ble SPIM

Era se Flash

Download
Per form
verifica tion
according to the
nee ds
Upload an d V erify

Pro gram u ser system

data

Ena ble protection

End

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5 Revision history
Table 21. Document revision history
Date Revision Changes
2022/08/25 V3.03 1. Added AT32F4212C8T7.
2022/08/12 V3.02 1. Added return codes.
2022/07/06 V3.01 1. Added AT32F425 series.
2022/03/16 V3.00 1. Supports multiple platforms，inluding Windows、Linux(Ubuntu, Fedora) OS.
2022/01/26 V2.03 1. Adjustment description.
2022/01/04 V2.02 1. Added SPIM support.
2. Added access protection and advanced access protection.
2021/11/26 V2.01 1. Added AT32F403/F413/F415/F421/F403A/F407/F435/F437.
2. Added AT32F425 series.
3. Added AT32F403AVGW.
4. Added AT32WB415 series.

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IMPORTANT NOTICE – PLEASE READ CAREFULLY

Purchasers understand and agree that purchasers are solely responsible for the selection and use of Artery’s products and services.

Artery’s products and services are provided “AS IS” and Artery provides no warranties express, implied or statutory, including, without
limitation, any implied warranties of merchantability, satisfactory quality, non-infringement, or fitness for a particular purpose with respect to
the Artery’s products and services.

Notwithstanding anything to the contrary, purchasers acquires no right, title or interest in any Artery’s products and services or any
intellectual property rights embodied therein. In no event shall Artery’s products and services provided be construed as (a) granting
purchasers, expressly or by implication, estoppel or otherwise, a license to use third party’s products and services; or (b) licensing the third
parties’ intellectual property rights; or (c) warranting the third party’s products and services and its intellectual property rights.

Purchasers hereby agrees that Artery’s products are not authorized for use as, and purchasers shall not integrate, promote, sell or
otherwise transfer any Artery’s product to any customer or end user for use as critical components in (a) any medical, life saving or life
support device or system, or (b) any safety device or system in any automotive application and mechanism (including but not limited to
automotive brake or airbag systems), or (c) any nuclear facilities, or (d) any air traffic control device, application or system, or (e) any
weapons device, application or system, or (f) any other device, application or system where it is reasonably foreseeable that failure of the
Artery’s products as used in such device, application or system would lead to death, bodily injury or catastrophic property damage.

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2022.08.25 22 Ver 3.03