Consolidated Report.
Consolidated Report.
EXPT NO: 1
DATE:09/01/2024
NAME:Hemantjha
REG. NO.:22BEC1060
GENERATION OF SIGNALS
AIM
MATLAB PROGRAM
clc;
clearall;
t=0:0.1:5;
y=t;
figure;plot(t,y);
xlabel("time");
ylabel("amplitude");
title("linear -ct");
OUTPUT
MATLAB PROGRAM
clc;
clearall;
t=0:0.5:5;
y=t;
figure;stem(t,y);
xlabel("time");
ylabel("amplitude");
title("linear -dt");
OUTPUT
MATLAB PROGRAM
clc;
clearall;
t=0:0.1:5;
y=t.^2;
figure;stem(t,y);
xlabel("time");
ylabel("amplitude");
title("non linear -dt");
OUTPUT
MATLAB PROGRAM
clc;
clearall;
t=0:0.5:5;
y=exp(-t);
figure;stem(t,y);
xlabel("time");
ylabel("amplitude");
title("exponential-dt");
OUTPUT
MATLAB PROGRAM
clc;
clearall;
t=0:0.5:5;
y=sin(2*t);
figure;stem(t,y);
xlabel("time");
ylabel("amplitude");
title("sinusoidal-dt");
OUTPUT
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 2
DATE:23/01/2024
NAME:HemantJha
AIM
MATLAB PROGRAM
clc
clear
closeall
x=[1,2,3,4];
y=[5,6,7,8];
l=conv(x,y);
figure;subplot(3,1,1);stem(x);
subplot(3,1,2);stem(y);
subplot(3,1,3);stem(l);
a=[2,1,3,1];
b=[7,5,8,4];
c=cconv(x,y,4);
figure;subplot(3,1,1);stem(a);
subplot(3,1,2);stem(b);
subplot(3,1,3);stem(c);
OUTPUT
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 3
DATE:30/01/2024
NAME:HemantJha
REG. NO.:22BEC1060
AIM
MATLAB PROGRAM
clc
closeall
clear
x=[1 1 1 1 1 1 0 0];
N=8;
X=[];
fork=0:N-1
X(k+1)=0;
forn=0:N-1
X(k+1)=X(k+1)+x(n+1)*exp((-1i*2*pi*n*k)/N);
end
end
figure;stem(x);title('input');
figure;stem(abs(X)),title('magnitude of DFT');
figure;stem(abs(X).^2);title('power spectra')
OUTPUT
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 4
DATE: 06/02/2024
AIM
MATLAB PROGRAM
clc;
closeall;
clearall;
x=[1 1 1 0 1 1 1 0];
y=[1 1 1 1 1 1 0 0];
X=fft(x,length(x));
Y=fft(y,length(y));
Z=X.*Y;
C=ifft(Z,length(X));
disp(C);
OUTPUT
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 5
DATE:20/02/24
NAME:HemantJha
AIM
MATLAB PROGRAM
BUTTEWORTH LPF:
clc
clear
closeall
f1=200;
f2=400;
fs=1000;
t=0:1/fs:0.1;
x=cos(2*pi*f1*t) + sin(2*pi*f2*t);
figure;plot(t,x);
N=5;
fc=300;
[b,a]=butter(N,fc/(fs/2));
figure; freqz(b,a,[],fs);
y=filter(b,a,x);
figure;plot(t,y);
CHEBYSHEV LPF:
clc
clear
closeall
f1=200;
f2=400;
fs=1000;
rp=3;
t=0:1/fs:0.1;
x=cos(2*pi*f1*t) + sin(2*pi*f2*t);
figure;plot(t,x);
N=5;
fc=300;
[b,a]=cheby1(N,rp,fc/(fs/2));
figure; freqz(b,a,[],fs);
y=filter(b,a,x);
figure;plot(t,y);
OUTPUT
BUTTEWORTH LPF:
CHEBYSHEV LPF:
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 6
DATE: 27.02.2024
AIM
Filtered output:
HIGH PASS FILTER:
Filtered output:
BAND STOP FILTER:
Filtered output:
Filtered output:
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 7
DATE:05/03/2024
Name :HemantJha
AIM
MATLAB PROGRAM
clc
clear
closeall
f1=200;
f2=400;
fc=300;
fs=1000;
t=0:1/fs:0.1;
x=cos(2*pi*f1*t) + sin(2*pi*f2*t);
figure;plot(t,x);
N=5;
F=[0,0.1,0.2,0.3,0.8,1];
A=[0,0,1,1,1,0];
b=firpm(N,F,A);
freqz(b,1,512);
y=filter(b,1,x);
figure;plot(t,y);
OUTPUT
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 8
DATE:16/04/2024
NAME:HemantJha
AIM
MATLAB PROGRAM
clc
clear
closeall
x=[1,3,-1,4,6,8,9,-1,3]
xu=upsample(x,2)
xd=downsample(x,2)
xud=downsample(xu,3)
figure;
subplot(4,1,1);
stem(x);title("input signal");
subplot(4,1,2);
stem(xu);title("upsample");
subplot(4,1,3);
stem(xd);title("downsample")
subplot(4,1,4);
stem(xud);title("coversion by ratio of 2/3")
OUTPUT
BECE301P – DIGITAL SIGNAL PROCESSING LAB
EXPT NO: 9
DATE:26/03/2024
NAME:HemantJha
AIM
The LCDK C6748 is a powerful and versatile development board designed for embedded
systems and digital signal processing applications. This compact board packs a punch, featuring
a high-performance ARM Cortex-A8 processor and a rich set of peripherals to enable a wide
range of project possibilities.
Processor Architecture
Powerful ARM Cortex-A8 CPU
Extensive Peripherals
The board includes a diverse array of on-chip peripherals, such as timers, serial interfaces, and
analog-to-digital converters, enabling comprehensive system integration.
The processor architecture is designed for optimal power efficiency, making the LCDK C6748
well-suited for battery-powered and energy-conscious projects.
Connectivity Options
Ethernet
The LCDK C6748 features a built-in Ethernet interface, enabling high-speed, reliable network
connectivity for networked applications and remote access.
Wi-Fi
Optional Wi-Fi connectivity allows the LCDK C6748 to integrate seamlessly into wireless
networks and enable remote monitoring and control capabilities.
Bluetooth
Bluetooth support on the LCDK C6748 enables wireless communication with other Bluetooth-
enabled devices, expanding the board's connectivity and application possibilities.
Conclusion and Key Specifications
The LCDK C6748 is a powerful and versatile development board that offers a rich set of features
and capabilities, making it an excellent choice for a wide range of embedded systems and digital
signal processing applications.