F. Y. B.

Tech Academic Year 2023-24

Subject: Basics of Electrical and Electronics Engineering
Semester: I
Name ------------------------------ Division ---------
Roll No ---------------------------- Batch ----------
Experiment No: 7
Name of the Experiment: Design and implementation of full adder using basic
and universal gates.

Performed on: -----------------------------------------------

Submitted on: -----------------------------------------------

AIM: Design and implementation of Full Adder using basic and universal
gates.

Prerequisite:

● Theory of digital logic circuits

Objectives:
● Identify pins of digital logic gates ICs

● Implement Full Adder circuit with basic and universal gates

Components and equipment required:

Power supply, digital board, digital logic gate ICs: OR (IC 7432), AND (IC 7408), NOT
(IC 7404), NOR (IC 7402), NAND (IC 7400), EX-OR (IC 7486), connecting wires etc.

Theory:

Logic Gates:

Logic Gates are used to implement Boolean Logic. There are six types of basic logic
gates that are used in digital systems. It is a device which has the ability to produce one
output level with the combinations of input levels. Table 5.1 demonstrates description,
symbol and truth table of the logic gates namely AND, OR, NOT, NAND, NOR and
EXOR.

Table 5.1 Symbol and truth table of the logic gates

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GATE Description Symbol Truth Table

A Y A Y = A’
Inverts the
NOT given input
A 0 1
1 0

A
Y A B Y = A*B
Logical
0 0 0
AND of two
AND
inputs A and 0 1 0
B
B
1 0 0
1 1 1

A
Y A B Y = A+B

Logical OR 0 0 0
OR of two inputs
0 1 1
A and B B
1 0 1
1 1 1

A A B Y = (A.B)’
Complement Y
of logical 0 0 1
NAND AND of two
0 1 1
inputs A and
B B 1 0 1
1 1 0

A A B Y = (A+B)’
Y (A+B)’
Complement
of Logical
0 0 1
OR of two
NOR B
inputs A and 0 1 0
B
1 0 0
1 1 0

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 GATE Description Symbol Truth Table

A B Y = A⊕B
Exclusive
0 0 0
OR of two
EXOR
inputs A and 0 1 1
B
1 0 1
1 1 0

Figure 5.1 indicates pin diagram of IC 7404 which is NOT gate. Fig. 5.2 indicates pin
diagram of IC 7400 which is quad two input NAND gate. Pin diagrams of OR gate IC
7432, AND gate IC 7408 and EX-OR gate IC 7486 are similar to that of NAND gate IC
7400. Fig. 5.3 indicates pin diagram of IC 7404 hex inverter (NOT) gate.

Fig 5.1 Pin diagram of IC 7404 NOT gate

Fig 5.2 Pin diagram of IC 7400 NAND gate

Fig 5.3 Pin diagram of IC 7402 NOR gate

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Adder:
An Adder is a device that can add two binary digits. It is a type of digital circuit that
performs the addition of two binary numbers. Adders are used in various applications
like binary code decimal, address decoding, table index calculation etc.
There are two types of adders, half adder and full adder. Half adder is used to add two
binary digits and a full adder is used to add two binary digits with third binary digit which
represents carry input. The detailed explanation of the full adder is given below.
Full Adder:
A full adder circuit is an arithmetic circuit block that can be used to add three bits to
produce a SUM and a CARRY output. Such a building block is needed in order to add
binary numbers with a large number of bits. The full adder circuit overcomes the
limitation of the half-adder, which can be used to add two bits only
There are three inputs and two outputs to a full adder as shown in Fig. 5.4. Inputs are
named as A, B and Cin, outputs are named as Sum (S) and Carry (C). Truth table for the
full adder is shown in Table 5.2.

Table 5.2 Truth Table of Full adder

Using Karnaugh-maps (K-map), Boolean expressions derived for sum and carry are given
by Eq. 5.1 & Eq. 5.2.

SUM = A’B’ Cin + A’BC’ in +A B’C’in + A B Cin = A ⊕ B ⊕ Cin (5.1)

CARRY-OUT = A B + A Cin + B Cin = A.B + Cin (A ⊕ B) (5.2)

Full adder schematic drawn, based on the sum and carry expressions is shown in Fig. 5.5.
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 SUM = A’B’ Cin + A’BC’ in +A B’C’in + A B Cin

Carry Out = C out = A B + A Cin + B Cin

Fig: 5.4 Full adder block, K-map for sum and carry

After optimization we get

SUM = A XOR B XOR Cin = A ⊕ B ⊕ Cin

CARRY-OUT = A AND B OR Cin (A XOR B) = A.B + Cin (A ⊕ B)

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 Fig. 5.5 Full adder Schematic

Procedure:
1. Identify the ICs and verify the truth table of all given ICs as per the entries in Table
5.1.
2. Build a full adder circuit as shown in Fig. 5.5 on the digital board.
3. Make the connections and apply the voltage.
4. Verify the results of half adder as per the truth table entries in Table 5.2.

Conclusion:
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Post Lab Questions:
1. Implement the basic logic gates using Universal gates.
2. Implement NOR gate using NAND gates, NAND gate using NOR gates.
3. What is XOR gate?
4. Implement full adder using NAND gates only.
5. State and prove Dorgan’s theorem.
6. Explain the operation of following gates:
a) NOT b) AND c) OR d) NAND e) NOR

Additional links for more information:

● http://www.ee.surrey.ac.uk/Projects/CAL/digital-logic/gatesfunc/

● https://www.electronicshub.org/half-adder-and-full-adder-circuits/

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Ex- Or Gate

OR Gate

AND Gate

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