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MPL - Assignment No 6-Protected mode-LDTR GDTR IDTR

This document describes an x86/64 assembly language program that detects if the processor is in protected or real mode. It displays the values of the GDTR, LDTR, IDTR, TR and MSW registers. The program first checks the PE bit in CR0 to determine the operating mode, then stores and displays the contents of the specified system registers.
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0% found this document useful (0 votes)
324 views

MPL - Assignment No 6-Protected mode-LDTR GDTR IDTR

This document describes an x86/64 assembly language program that detects if the processor is in protected or real mode. It displays the values of the GDTR, LDTR, IDTR, TR and MSW registers. The program first checks the PE bit in CR0 to determine the operating mode, then stores and displays the contents of the specified system registers.
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Progressive Education Society's

MODERN COLLEGE OF ENGINEERING, PUNE-05.


Department of Computer Engineering

EXPERIMENT NO. 06

AIM: Write X86/64 ALP to detect protected mode and display the values of GDTR, LDTR, IDTR,
TR and MSW Registers.

OBJECTIVES:
 To understand assembly language programming instruction set.
 To understand different assembler directives with example.
 To apply instruction set for implementing X86/64 bit assembly language programs

ENVIRONMENT:
 Operating System: 64-bit Open source Linux or its derivative.
 Programming Tools: Preferably using Linux equivalent or MASM/TASM/NASM/FASM.
 Text Editor: geditor

THEORY:

RealMode:
Real mode, also called real address mode, is an operating mode of all x86-compatible CPUs.
Real mode is characterized by a 20-bit segmented memory address space (giving exactly 1 MB of
addressable memory) and unlimited direct software access to all addressable memory, I/O addresses
and peripheral hardware. Real mode provides no support for memory protection,
multitasking,orcodeprivilegelevels.

ProtectedMode:
In computing, protected mode, also called protected virtual address mode is an operational mode
of x86-compatible central processing units (CPUs). It allows system software to use features such as
virtual memory, paging and safe multi-tasking designed to increase an operating system's control over
application software.

When a processor that supports x86 protected mode is powered on, it begins executing
instructions in real mode, in order to maintain backward compatibility with earlier x86 processors.
Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

Protected mode may only be entered after the system software sets up several descriptor tables and
enables the Protection Enable (PE) bit in the control register 0 (CR0).
Protected mode System Registers:

And TR register along with Control Register

In CR0 it contains the MSW. In this first bit is PE bit, If PE bit is not set processor is in real mode and if
it set processor is in protected mode.
Some of the system instructions used:
LMSW/SMSW Instructions
Load or Store Machine Status
Syntax: LMSW src
SMSW dest
Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

Description:
 LMSW loads a value from a memory operand into the Machine Status Word (MSW).
 SMSW stores the MSW into a specified memory operand.
 LMSW is available only in privileged mode.
SMSW eax
It stands for "Store Machine Status Word (MSW) in EAX register". This instruction is used to store the
contents of the MSW register into the EAX register.
BT (Bit Test)
The BT stands for Bit. BT copies a bit from a given register to the carry flag.
Example: BT EAX, 2
This instruction copy the third least significant bit from EAX to the carry flag.
Global Descriptor TableRegister
This register holds the 32-bit base address and 16-bit segment limit for the global descriptor table
(GDT). When a reference is made to data in memory, a segment selector is used to find a segment
descriptor in the GDT or LDT. A segment descriptor contains the base address for a segment.
Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

Local Descriptor Table Register


This register holds the 32-bit base address, 16-bit segment limit, and 16-bit segment selector for the
local descriptor table (LDT). The segment which contains the LDT has a segment descriptor in the
GDT. There is no segment descriptor for the GDT. When a reference is made to data in memory, a
segment selector is used to find a segment descriptor in the GDT or LDT. A segment descriptor
contains the base address for a segment

InterruptDescriptorTableRegister
This register holds the 32-bit base address and 16-bit segment limit for the interrupt descriptor table
(IDT). When an interrupt occurs, the interrupt vector is used as an index to get a gate descriptor from
this table. The gate descriptor contains a far pointer used to start up the interrupt handler.
Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

Algorithm:
1. Start
2. Display the message using sys_write call.
3. Read CR0.
4. Checking PE bit,if1=Protected Mode.
5. Load number of digits to display.
6. Rotate number left by four bits.
7. Convert the number in ASCII.
8. Display the number from buffer.
9. Exit using sys_exitcall.

Program:

;This program first check the mode of processor (Real or Protected),then reads GDTR, IDTR, LDTR, TR,
MSW and displays the same.

section .data
introMsg dw "ALP to detect the operating mode of the microprocessor and display the contents of some
system registers"
introMsgLen equ $ - introMsg

gdtrMsg db 10,10,"Contents of GDTR : ",10


gdtrMsgLen equ $ - gdtrMsg

ldtrMsg db 10,10,"Contents of LDTR : ",10


ldtrMsgLen equ $ - ldtrMsg

idtrMsg db 10,10,"Contents of IDTR : ",10


idtrMsgLen equ $ - idtrMsg

trMsg db 10,10,"Contents of TR : ",10


Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

trMsgLen equ $ - trMsg

mswMsg db 10,10,"Contents of MSW (CR0) register : ",10


mswMsgLen equ $ - mswMsg

protectedMsg db 10,10,"The Microprocessor is in the protected mode"


protectedMsgLen equ $ - protectedMsg

proMsg db 10,10,"The contents of the system registers are as follows : "


proMsgLen equ $ - proMsg

realMsg db 10,10,"The Microprocessor is in the real mode"


realMsgLen equ $ - realMsg

colon db " : "


colonLen equ $ - colon

section .bss
gdtr resd 1 ;to store 48-bit GDTR value-resd(32-bit) and resw(16-bit).
resw 1

ldtr resw 1 ;to store 16-bit LDTR

idtr resd 1 ;to store 48-bit LDTR value-resd(32-bit) and resw(16-bit).

resw 1

tr resw 1

msw resd 1

result resb 4

%macro write 2
mov rax,1
mov rdi,1
mov rsi,%1
mov rdx,%2
syscall
%endmacro

section .text
global _start

_start:
write introMsg,introMsgLen

smsw eax ; This instruction is used to store the contents of the MSW register into the EAX register.
bt eax,0 ; copy the 0th least significant bit from EAX to the carry flag.
Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

jc protected_mode ;if CF is set ,processor is in protected mode

write realMsg,realMsgLen

jmp endOfProgram

protected_mode :
write protectedMsg , protectedMsgLen

write proMsg , proMsgLen

sgdt [gdtr] ; Stores the content of the global descriptor table register (GDTR) in the destination
operand gdtr
sldt [ldtr] ;store LDTR
str [tr]
smsw [msw]

write gdtrMsg,gdtrMsgLen
mov bx,[gdtr+4] ;move upper half of gdtr in bx reg.
call disp
mov bx,[gdtr+2]
call disp
write colon , colonLen
mov bx,[gdtr]
call disp

write ldtrMsg,ldtrMsgLen
mov bx,[ldtr]
call disp

write idtrMsg,idtrMsgLen
mov bx,[idtr+4]
call disp
mov bx,[idtr+2]
call disp
write colon , colonLen
mov bx,[idtr]
call disp

write trMsg,trMsgLen
mov bx,[tr]
call disp

write mswMsg,mswMsgLen
mov bx,[msw+2] ;upper half of CR0 or MSW
call disp
mov bx,[msw]
call disp

endOfProgram:
Progressive Education Society's
MODERN COLLEGE OF ENGINEERING, PUNE-05.
Department of Computer Engineering

mov rax, 60
mov rdi, 0
syscall

disp:
mov rdi, result ;point rdi to result variable
mov cx,04 ;load count of rotation in cl
up1:
rol bl,04 ;rotate number left by four bits
mov dl,bl ;move lower byte in dl
and dl,0fh ; get only LSB
cmp dl,09h ;compare with 39h
jg add_37 ;if greater than 39h skip add 37
add dl,30h
jmp skip1 ;else add 30
add_37: add dl,37h
skip1: mov [rdi],dl ;store ascii code in result variable
inc rdi ;point to next byte
dec cx ;decrement the count of digits to display
jnz up1 ;if not zero jump to repeat

write result , 4

ret

Conclusion: Hence we performed an ALP to to use GDTR,LDTR and IDTR in Real Mode.
Oral Questions
1. What is Control register. Explain with diagram
2. Explain CR0(Each bit) in detail
3. What is SMSW and LMSW. Explain with example.
4. What is GDT and GDTR(size, use)
5. What is LDT and LDTR(Size, use)
6. What is IDT and IDTR (size, use)
7. What is TR-Task Register.
8. Explain instruction set of SMSW,SGDT,SLDT, STR?
9. What is selector?
10. Function of Descriptor (GDT ,LDT ,IDT) ?
11. What is mean by Interrupt Handler?
12. Explain Difference between Real Mode & Protected Mode?

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