Jump & Call

Chapter 3

The AVR microcontroller

and embedded
systems
using assembly and c

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Topics
◼ Introduction to jump and call
◼ Jump
◼ Call
◼ Stack
◼ Calling a function
◼ Time Delay

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Jump and Call
◼ CPU executes instructions one after
another.
1 void main ()
◼ For example in the following C 2 {
program, CPU first executes the 3 a = b + c;

instruction of line 3 (adds b and c), 4 c -= 2;

5 d = a + c;
then executes the instruction of 6 }
line 4.

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Jump and Call (Continued)
◼ But sometimes we need the CPU to execute, an
instruction other than the next instruction. For
example:
◼ When we use a conditional instruction (if)
◼ When we make a loop
◼ When we call a function

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Jump and Call (Continued)
◼ Example 1: Not executing the
next instruction, because of
condition. 1 void main ()

◼ In the following example, the 2 {

instruction of line 6 is not

3 int a = 2;
4 int c = 3;

executed. 5 if (a == 8)
6 c = 6;
7 else
8 c = 7;
9 c = a + 3;
}

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Jump and Call (Continued)
◼ Example 2: In this example
the next instruction will not
be executed because of 1 void main ()
loop. 2 {
3 int a, c = 0;
◼ In the following example, 4 for(a = 2; a < 4; a++)

the order of execution is as 5 c += a;

follows:
6 a = c + 2;
7 }

◼ Line 4 8
9
◼ Line 5
◼ Again, line 4
◼ Again line 5
◼ Line 6
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Jump and Call (Continued)
◼ Example 3: Not executing
the next instruction, because
of calling a function. 1
Code
void func1 ();

◼ In the following example, 2 void main ()

the instruction of line 6 is

3 {
4 int a = 2, c = 3;

not executed after line 5. 5 func1 ();

6 c = a + 3;
7 }
8 void func1 (){
9 int d = 5 / 2;
10 }
11

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Jump and Call (Continued)
◼ In the assembly language, there are 2 groups of
instructions that make the CPU execute an
instruction other than the next instruction. The
instructions are:
◼ Jump: used for making loop and condition
◼ Call: used for making function calls

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Topics
◼ Introduction to jump and call
◼ Jump
◼ Call
◼ Stack
◼ Calling a function/subroutine
◼ Time Delay

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Branch (or Program control) Instructions
▪ Jump (unconditional jump/branch)
jmp label1
Jump to label1 – no information about where we jumped from is saved. This
is a one way trip
◼ Branch (conditional jump)
breq label2 ; Branch if equal to location label2
brlo label3 ; Branch if lower to location label3
If the Branch test fails – the next line of code is executed
If the Branch test is successful, the program jumps to the location specified

▪ Call, Return
rcall mysub
ret
Call subroutine mysub. The program saves information about where it currently
is executing and then jumps to the code at mysub. When the subroutine is
finished it calls ret, which then returns to where the rcall was made.

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Jump
◼ Jump changes the Program Counter (PC) and causes
the CPU to execute an instruction other than the next
instruction.

◼ There are 2 kinds of Jump

◼ Unconditional Jump: When CPU executes an unconditional
jump, it jumps unconditionally (without checking any condition)
to the target location.
◼ Example: RJMP and JMP instructions
◼ Conditional Jump: When CPU executes a conditional jump,
it checks a condition, if the condition is true then it jumps to the
target location; otherwise, it executes the next instruction.
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Unconditional Jump in AVR
◼ There are 3 unconditional jump
instructions in AVR: RJMP,
JMP, and IJMP Code

◼ We label the location where we 1 LDI R16, 0

2 LDI R17, 2
want to jump, using a unique 3 L1:
L1: ADD R16, R17

name, followed by ‘:’ 4 RJMP L1

L1
5 SUB R10,R15
◼ Then, in front of the jump
instruction we mention the
name of the label.
◼ This causes the CPU to jump to
the location we have labeled,
instead of executing the next
instruction.
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Ways of specifying the jump target
◼ There are 3 ways to provide the jump address:
◼ PC = operand (JMP)
◼ PC = PC + operand (RJMP)
◼ PC = Z register (IJMP)

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 JMP
◼ JMP PC = operand = 22-bit const

Opcode = 10010101110

◼ Example:
1001 0100 0000 1100 0000 0000 0000 0110

◼ Operand = 0000000000000000000110

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 Direct Program Addressing, JMP and CALL

Syntax: Operands:
JMP k 0 ≤ k ≤ FLASHEND < 4M = 222
(ATMega32: FLASHEND = 0x3FFF)

31 Machine code 0

Figure 11. Direct Program Memory Addressing

Program execution continues at the address immediate in
the instruction word.
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 JMP

Address Code
◼ In JMP, the operand, PC: 0002
0001
0000
0007
contains the address of 0000 .ORG 0

the destination 0000 LDI R16, 15

Machine code:
◼ When an JMP is 0001 LDI R17, 5

executed: 940C 0006

0006 0002 JMP LBL_NAME

◼ PC is loaded with opCode operand 0004 LDI R18, 4

the operand 0005 ADD R18, R17

value 0006
0006 LBL_NAME:
Machine code: 0006 ADD R16,R17

940C 0006
0006 0007 JMP LBL_NAME

opCode operand 0009

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 RJMP (Relative jump)

◼ RJMP PC = PC + operand
1100 XXXX XXXX XXXX

◼ Example: 1100 0000 0000 0110

◼ Operand = 000000000110
◼ PC = PC + 000000000110

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Relative Program Addressing, RJMP and RCALL

Figure 13. Relative Program Memory Addressing

Program execution continues at address PC + k + 1. The relative address k is
from -2048 to 2047.
Ex: Syntax: Operands: Program Counter:
RJMP k -2048 ≤ k ≤ 2047 PC  PC + k + 1
k (12-bit number) = Destination address – Next instruction address

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 RJMP
◼ When RJMP is
executed:
◼ The operand
PC: 0003
0007
0006
0002
0001
0000 Address Code
+0
+F 0000 .ORG 0
will be added 0005 0000 LDI R16, 15

to the current Machine code: 0001 LDI R17, 5

value of PC 002
C002 0002 RJMP LBL_NAME
opCode operand 0003 LDI R18, 4
0004 ADD R18, R17
0005
0005 LBL_NAME:
Machine code: 0005 ADD R16,R17

CFFE
FFE 0006 RJMP LBL_NAME
opCode operand 0007

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 IJMP (Indirect jump)
◼ IJMP PC = Z register
1001 0100 0000 1001

◼ The instruction has no operand.

◼ The Program counter is loaded with the
contents of Z register.
◼ For example, if Z points to location 100,

by executing IJMP, the CPU jumps to

location 100.
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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Indirect Program Addressing, IJMP and ICALL

Figure 12. Indirect Program Memory Addressing

Program execution continues at address contained by the Z register

(i.e., the PC is loaded with the contents of the Z register).

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 Conditional Jump in AVR
SREG: I T H S V N Z C

◼ The conditional jump instructions in AVR are as follows:

Instruction Abbreviation of Comment
BREQ lbl Branch if Equal Jump to location lbl if Z = 1,
BRNE lbl Branch if Not Equal Jump if Z = 0, to location lbl
BRCS lbl Branch if Carry Set Jump to location lbl, if C = 1
BRLO lbl Branch if Lower
BRCC lbl Branch if Carry Cleared Jump to location lbl, if C = 0
BRSH lbl Branch if Same or Higher
BRMI lbl Branch if Minus Jump to location lbl, if N = 1
BRPL lbl Branch if Plus Jump if N = 0
BRGE lbl Branch if Greater or Equal Jump if S = 0
BRLT lbl Branch if Less Than Jump if S = 1
BRHS lbl Branch if Half Carry Set If H = 1 then jump to lbl
BRHC lbl Branch if Half Carry Cleared if H = 0 then jump to lbl
BRTS lbl Branch if T flag Set If T = 1 then jump to lbl
BRTC lbl Branch if T flag Cleared If T = 0 then jump to lbl
BRIS lbl Branch if I flag set If I = 1 then jump to lbl
BRIC lbl Branch if I flag cleared If I = 0 then jump to lbl
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 Conditional Branch Summary

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Usages of Conditional jump
◼ Conditions
◼ Loop

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Conditions
◼ When b is subtracted from a:
◼ The result is zero, when a is equal to b a
◼ Carry will be set when a < b -b

◼ Compare:
◼ CP Rd,Rr ; 0 ≤ d, r ≤ 31 → Rd – Rr sets flags
◼ CPC Rd,Rr ; Rd – Rr – C sets flags
◼ CPI Rd,K ; 0 ≤ K ≤ 255 → Rd – K sets flags

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Example 1
◼ Write a program that if R20 is equal to R21 then
R22 increases.
R20 is changed, R21 is unchanged
◼ Solution 1: if (R20 == R21)
No

SUB R20,R21 ;Z will be set if R20 == R21

BRNE NEXT ;if Not Equal jump to next Yes

INC R22
NEXT: increment R22

R20 and R21 are unchanged

◼ Solution2:
CP R20,R21 ;Z will be set if R20 == R21
BRNE NEXT ;if Not Equal jump to next
INC R22
NEXT:

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 CP Instruction
◼ CP (Compare) instruction performs a subtraction
Syntax: CP destination, source
Computes: destination – source
◼ Destination operand is NOT modified
◼ Any general purpose register (Rn) can be
Destination or Source .
◼ Flags: H, C, N , V, S , and Z are affected
◼ Examples: assume R2 = 5, R1 = 10, and R0 = 5
CP R1, R0 ; C = 0, S = 0, Z = 0
CP R2, R1 ; C = 1, S = 1, Z = 0

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Unsigned Comparison
◼ CP can perform unsigned and signed comparisons
◼ The destination and source operands can be unsigned or signed
◼ For unsigned comparison, we examine Z and C flags
Unsigned Comparison C Z Branches are executed
unsigned destination < unsigned source 1 0 BRLO, BRCS, BRNE, BRMI
unsigned destination > unsigned source 0 0 BRSH, BRCC, BRNE, BRPL
destination = source 0 1 BRSH, BRCC, BREQ, BRPL

◼ CP does a subtraction and C is the borrow flag

CF = 1 if and only if unsigned destination < unsigned source

◼ Assume R1 = 5 and R0 = -1 = FFh

CP R1, R0 ; Sets carry flag C = 1

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 Signed Comparison
◼ For signed comparison, we examine S, V, and Z
Signed Comparison Flags Branches are excecuted
signed destination < signed source S≠V BRLT, BRNE
signed destination > signed source S = V, Z = 0 BRGE, BRNE
destination = source Z=1 BRGE, BREQ

◼ Recall for subtraction, the overflow flag is set when …

◼ Operands have same signs and result sign ≠ destination sign
◼ CP R2, R1 (consider the cases shown below)
Case R2 R1 BREQ BRNE BRLT BRGE
1 80 50  
2 80 –50  
3 –80 50  
4 –80 –50  
5 –80 –80  
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Example 2
◼ Write a program that if R26 < R24 then R22
increases.

◼ Solution: if (R26 < R24)

No

CP R26,R24 ;C will be cleared if R26 >= R24

BRCC L1 ;if Carry cleared jump to L1 Yes

INC R22
L1: increment R22

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Example 3
◼ Write a program that if R26 >= R24 then R22
increases.

◼ Solution: if (R26 < R24)

No

CP R26,R24 ;C will be set if R26 < R24

Yes
BRCS L1 ;if Carry set jump to L1
INC R22
L1: increment R22

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Example 4: IF and ELSE
R17 = 5
R17 = 5;
if (R20 > R21)
R22++;
else if (R20 > R21)
No

R22--;
R17 ++; Yes

LDI R17,5 increment R22

CP R21,R20
BRCS IF_LABEL
increment R22
DEC R22
JMP NEXT
IF_LABEL:
INC R22
NEXT:
INC R17 increment R17

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 Loop
◼ Write a program that executes the instruction
“ADD R30,R31” 9 times.
R16 = 9

◼ Solution:
.ORG 00 ADD R30,R31

LDI R16,9 ;R16 = 9

L1: ADD R30,R31
R16 = R16 - 1
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever
Yes
if (R16 > 0)

No

END

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 Loop
◼ Write a program that calculates the result of
9+8+7+…+1
R16 = 9
R17 = 0

◼ Solution:
.ORG 00 R17 = R17 + R16

LDI R16, 9 ;R16 = 9

LDI R17, 0 ;R17 = 0
R16 = R16 - 1
L1: ADD R17,R16 ;R17 = R17 + R16
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever Yes
if (R16 > 0)

No

END

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 Loop
◼ Write a program that calculates the result of
20+19+18+17+…+1
R16 = 20
R17 = 0

◼ Solution:
R17 = R17 + R16
.ORG 00
LDI R16, 20 ;R16 = 20
LDI R17, 0 ;R17 = 0
R16 = R16 - 1
L1: ADD R17,R16 ;R17 = R17 + R16
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever Yes
if (R16 > 0)

No

END

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 Loop
for (init; condition; calculation) init

{
do something
Do something

} calculation

Yes
Condition

No

END

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Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Loop
◼ Write a program that calculates 1+3+5+…+27
◼ Solution: R20 = 0
R16 = 1

LDI R20,0
LDI R16,1 R20 = R20 + R16

L1:ADD R20,R16
LDI R17,2 R16 = R16 + 2

ADD R16,R17 ;R16 = R16 + 2

LDI R17,27 ;R17 = 27
SUB R17,R16 Yes
R16 <= 27
BRCC L1 ;if R16 <= 27 jump L1
No

END

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Topics
◼ Introduction to jump and call
◼ Jump
◼ Call
◼ Stack
◼ Calling a function/subroutine
◼ Time Delay

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Call Topics
◼ Stack, Push and Pop
◼ Calling a function/subroutine

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Plate and stack analogy to computer stack operation
❑ The stack is an area of memory
❑ The stack pointer (SP) is the address of the last value pushed onto the stack. (In
AVR MCUs, SP = the address of the available location for next PUSH
operation) Usually, the stack is used for storing data when subroutines are called.
❑ The stack is a last-in-first-out, i.e., LIFO structure so the last thing stored in the
stack is the first thing retrieved.
❑ A mechanical analogy will help you learn how the stack operates. One common
mechanical stack is the plate rack used in some cafeterias:

The stack POP operation PUSH operation

◼ Source: “Microcomputer engineering” by Miller

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Stack Pointer or SP
◼ On RISC machines, the stack is much less used than some other
architectures. This is because there are many registers where one
can store temporary data.
◼ AVRs have a stack, and it is mainly used for storing temporary data,
for storing local variables and for storing return addresses after
interrupts and subroutine calls.
◼ The AVR Stack Pointer or SP is consists of two 8-bit registers in
the I/O space, namely SPH and SPL.
IOR Addr SRAM Addr
$3E $5E
$3D $5D

◼ The stack is implemented in SRAM, and SP always points to the

top of the stack and decrements with a push instruction.
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 SP

◼ AVR processors automatically push the return address during

a subroutine call (CALL, RCALL, …)
◼ AVR processors automatically pop the return address as part
of the return (RET) instruction
◼ AVR processors automatically push the return address when
an interrupt occurs
◼ Interrupt service routines (ISPs) should return with an RETI
instruction, which pops the return address
◼ AVR Instructions that affect SP

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Stack
◼ PUSH Rr ◼ POP Rd
[SP] = Rr SP = SP + 1
SP = SP - 1 Rd = [SP]

SP

Stack

Note: [SP] = D(SP)

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Stack
◼ The stack is implemented in SRAM, and SP always points to the
top of the stack and decrements with a PUSH instruction.
◼ Thus, to utilize the stack using the PUSH and POP instructions,
one must initialize SP properly.
◼ On AVRs, SP is initialized to the end of SRAM
◼ Other AVR documentation suggest that at reset, SP is initialized to
0x00, which is where the 32 general purpose registers
start—see the AVR memory map, so programmer has to
initialize SP
; Point the stack to end of SRAM.
ldi r23,LOW(RAMEND) ; Load LSB of last SRAM address in r23
out spl,r23
ldi r23,HIGH(RAMEND) ; Load MSB of last SRAM address in r23
out sph,r23

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
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 Stack
SP is located in
I/O space so we
use IN and OUT
instructions RAMEND is defined in “m32def.inc”

.include “m32def.inc”
; Point the stack to end of SRAM.
ldi r23, LOW(RAMEND)
LOW RAMEND ; Load LSB of last SRAM address in r23
out spl,r23
out
ldi r23,HIGH(RAMEND
HIGH RAMEND ) ; Load MSB of last SRAM address in r23
out sph,r23

LOW and HIGH are Assembler operators

that extract LSB and MSB from RAMEND.

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 Stack

Address Code
ORG 0

0000 LDI R16,HIGH(RAMEND)

0001 OUT SPH,R16

R20: $10
$00 R22: $30
$00
LDI R16,LOW(RAMEND)
0002
R21: $00
$20 R0: $00 0003 OUT SPL,R16

0004 LDI R20,0x10

0005 LDI R21, 0x20

0006 LDI R22,0x30

SP 0000 0007 PUSH $10
R20

0008 PUSH $20

R21

0009 PUSH $30

R22

000A POP R21

000B POP R0

000C POP R20

000D L1: RJMP L1

Memory
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 Calling a function/subroutine
❑ Subroutine calls are a special type of branch where we return to one instruction below the
calling instruction.
- Provision must be made to save the return address, since it cannot be written into ROM.

◼ To execute a call: Address Code

0000 LDI R16,HIGH(RAMEND)
◼ Address of the next
0001 OUT SPH,R16
instruction is saved 0002 LDI R16,LOW(RAMEND)
◼ PC is loaded with 0003 OUT SPL,R16
the appropriate 0004 LDI R20,15

value Machine code: 0005 LDI R21,5

940E 000A
000A 0006
0006 CALL FUNC_NAME
opCode operand 0008
00 08 INC R20
0009 L1: RJMP L1
000A FUNC_NAME:
000A ADD R20,R21
SP 000B SUBI R20,3
PC: 000C
000B
0006
0005
0004
0009
0008 000C RET
000D
Stack
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 Why subroutines?
◼ Divide and Conquer – Allow you to focus on one small
“chunk” of the problem at a time.
◼ Code Organization – Gives the code organization and
structure. A small step into the world of object-oriented
programming.
◼ Hierarchical Design – Moves information about the program
at the appropriate level of detail.
◼ Code Readability – Allows others to read and understand the
program in digestible “bites” instead of all at once.
◼ Encapsulation – Insulates the rest of the program from
changes made within a procedure.
◼ Team Development – Helps multiple programmers to work on
the program in parallel; a first step to configuration control.

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
Subroutine Call and Return Instructions

◼ RCALL Relative Subroutine Call *

◼ CALL Absolute Subroutine Call **
◼ ICALL Indirect Subroutine Call to
Routine @Z (PC  Z)

◼ RET Return from Subroutine

◼ RETI Return from Interrupt Routine

* - Reaches ± 2K instructions from current program location

- Wrap-around
** 4-Byte Instruction

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Push/Pop and Call/Ret

◼ PUSH Rn ◼ POP Rn
◼ [SP]  Rn ◼ SP  SP + 1
◼ SP  SP – 1 ◼ Rn  [SP]

◼ RCALL Addr ◼ RET

◼ PUSH PCH ◼ POP PCL
◼ PUSH PCL ◼ POP PCH
◼ PC  Addr
Note: PCL = low byte of PC; PCH = high byte of PC
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Assembly subroutine template
; ---- My Subroutine -------
; Called from Somewhere
; Input: Registers, SRAM variables, or I/O registers
; Outputs: . .. .
; No others registers or flags are modified by this subroutine
; --------------------------
MySubroutine:
push r 5 // push any flags or registers modified by the procedure
in r15,SREG
push r 16
<my assembly code>
endMySubroutine:
clr r25 // zero-extended to 16-bits for C++ call (optional)
pop r16 // pop any flags or registers placed on the stack
out REG,r15
pop r15
ret

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 How to send information to and/or from
the calling program

There are many way to send information to and from

a subroutine or function. Here are a few…
◼ In Register(s) or Register Pair(s) agreed upon between

the calling program and Procedure or Function.

◼ By setting or clearing one of the bits in SREG (I, T, H, S,
V, N, Z, C).
◼ In an SRAM variable, this method is not recommended.

◼ As part of a Stack Frame, this method is beyond the

scope of a course on microcontrollers but is highly
recommended.

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Ex: larger.asm
; larger.asm RESET:
.include "m32def.inc" LDI temp, low(RAMEND)
RJMP RESET OUT SPL, temp
.def temp =r16 LDI temp, high(RAMEND)
.def a = r17 OUT SPH, temp ; init SP
.def b = r18 main:
larger: LDI a, 0xFF
CP a, b LDI b, 0x46
BRLT return RCALL larger
RET loop:
return: RJMP loop
MOV a, b
RET
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Topics
◼ Introduction to jump and call
◼ Jump
◼ Call
◼ Stack
◼ Calling a function
◼ Time Delay

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Time delay

40 PIN DIP
(XCK/T0) PB0 1 40 PA0 (ADC0)
(T1) PB1 2 39 PA1 (ADC1)
(INT2/AIN0) PB2 3 38 PA2 (ADC2)
(OC0/AIN1) PB3 4 MEGA32 37 PA3 (ADC3)
(SS) PB4 5 36 PA4 (ADC4)
(MOSI) PB5 6 35 PA5 (ADC5)
(MISO) PB6 7 34 PA6 (ADC6)
(SCK) PB7 8 33 PA7 (ADC7)
RESET 9 32 AREF
RAM EEPROM Timers
VCC 10 31 AGND
GND 11 30 AVCC PROGRAM
XTAL2 12 29 PC7 (TOSC2) Flash ROM
XTAL1 13 28 PC6 (TOSC1)
Program Data
(RXD) PD0 14 27 PC5 (TDI)
Bus Bus
(TXD) PD1 15 26 PC4 (TDO) CPU
(INT0) PD2 16 25 PC3 (TMS)
(INT1) PD3 17 24 PC2 (TCK)
(OC1B) PD4 18 23 PC1 (SDA)
(OC1A) PD5 19 22 PC0 (SCL)
(ICP) PD6 20 21 PD7 (OC2)
Interrupt Other
OSC Ports
Unit Peripherals

I/O
PINS
AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Time delay
machine cycle
LDI R16, 19 1
LDI R20, 95 1
LDI R21, 5 1
ADD R16, R20 1
ADD R16, R21 1
5

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Time delay

machine cycle
LDI R16, 100
1
AGAIN: ADD R17,R16 *100
1
DEC R16 1 *100

BRNE AGAIN 1/2 *100

Branch penalty

Total = 1 + (1+1+2) x 100 -1 = 400 cycles

If XTAL = 10 MHz then execution time for this code is 400 x 1/(10MHz) = 40 µs

Syntax: Operands: Program Counter: Cycles:

BRNE k -64 ≤ k ≤ +63 PC ← PC + k + 1 2
PC ← PC + 1, if condition is false 1

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Time delay

machine cycle
LDI R16, 50
1
AGAIN: NOP 1 *50
NOP 1 *50
DEC R16 1 *50

BRNE AGAIN 1/2 *50

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Time delay

machine cycle
LDI R17, 20
1
L1: LDI R16, 50
1 *20
L2: NOP
1 *20 * 50
NOP 1 *20 * 50
DEC R16 1 *20 * 50
BRNE L2 1/2 *20 * 50
DEC R17 1 *20
BRNE L1 1/2 *20

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Example 3-20 (1/2)

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Example 3-20 (2/2)

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.
 Modification on Example 3-20
.include "M32DEF.inc"
.org 0 DELAY_1S:
LDI R20,32
LDI R16,HIGH(RAMEND) L1: LDI R21,200
OUT SPH,R16 L2: LDI R22,5
LDI R16,LOW(RAMEND) ; The modification is need so that
OUT SPL,R16 ; we get an almost 1 sec delay on
; AVR simulator
LDI R16,0X55
L3:
BACK: NOP
COM R16 NOP
OUT PORTB,R16 DEC R22
CALL DELAY_1S BRNE L3
DEC R21
RJMP BACK
BRNE L2
DEC R20
BRNE L1
RET

AVR Microcontroller and Embedded System Using Assembly and C © 2011 Pearson Higher Education,
Mazidi, Naimi, and Naimi Upper Saddle River, NJ 07458. • All Rights Reserved.