Batch 2019-2023 and Onwards

Revised Syllabus (Effective from the session 2021-22)

Gurukula Kangri (Deemed to be University), Haridwar
Faculty of Engineering & Technology
Electrical Engineering

MICROPROCESSORS AND INTERFACING

BET-C 613
MM: 100 Sessional: 30
Time: 3 Hr ESE: 70
L T P Credit: 3
3 0 0

NOTE: The question paper shall consist of two sections (Sec.-A and Sec.-B). Sec.-A shall contain ten questions
of six marks each and student shall be required to attempt five questions Sec.-B shall contain eight descriptive
type questions of ten marks each and students shall be required to attempt any four questions. Question shall be
uniformly distributed from the entire syllabus. The previous year paper /model paper can be used as a guideline
and the following syllabus should be strictly followed while setting the question paper.

Course objectives: This subject deals about the basic 16-bit processor and an 8-bit controllers, their
architecture, internal organization and their functions, interfacing an external device with the processors/
controllers.

UNIT-I
Introduction to Microprocessors and assembly language, 8085 architectures, addressing modes of 8085,
8085 instruction set and programming techniques, timing diagrams, Counters & time delays.

UNIT-II
Stacks and subroutines, basics of memory interfacing. Interfacing I/O Devices, programming of basic
arithmetic operations: addition, subtraction, multiplication, division, code conversion etc, Interrupts
.
UNIT-III
Programmable Peripheral Interface (PPI) (8255), Programmable Interval Timer (8254), Programmable
interrupt controller (8259), DMA & DMA controller (8237), ADC / DAC interfacing.

UNIT-IV
8086 Processor: 8086 architectures, Pin configuration, 8086 in min/max mode, addressing modes,
Instruction set of 8086, Assembler directives, basic assembly language programming.

UNIT-V
Overview of Advanced Microprocessors- 80186,286,386,486, Pentium I, Pentium II, Pentium III,
Pentium IV.

Course Outcomes: At the end of this course students will demonstrate the ability to
Do assembly language programming
Do interfacing design of peripherals like, I/O, A/D, D/A, timer etc.

Faculty of Engineering and Technology, GKV, Haridwar Department of Electrical Engineering

 Revised Syllabus (Effective from the session 2020-21)
Gurukula Kangri Vishwavidyalaya, Haridwar
Faculty of Engineering & Technology
Computer Science & Engineering

BET-C306
DIGITAL SYSTEM DESIGN
MM: 100 Sessional: 30
Time: 3 hrs ESE: 70
LTP Credits 3
310

NOTE: The question paper shall consist of three sections (Sec.-A, Sec.-B and Sec.-C). Sec.-A shall contain 10
objective type questions of one mark each and student shall be required to attempt all questions. Sec.-B shall
contain 10 short answer type questions of four marks each and student shall be required to attempt any five
questions. Sec.-C shall contain 8 descriptive type questions of ten marks each and student shall be required to
attempt any four questions. Questions shall be uniformly distributed from the entire syllabus. The previous year
paper/model paper can be used as a guideline and the following syllabus should be strictly followed while setting
the question paper.
UNIT I
Number System: Representation of negative numbers, 9’s and 1’s complement, 10’s and 2’s
complement, arithmetic using 2’s complement. BCD Code, Gray Code, Excess-3 Code, Introduction to
Boolean algebra, Truth table verification of various gates, Realization of Switching functions with
gates.
K- Map: Representation up to 4 variables, simplification and realization of various functions using
gates, Tabular Method, Combinational logic and design procedure.
UNIT II
Combinational logic Circuits: Arithmetic circuits, Half and Full adder, Subtractors, BCD adders,
Code Conversion, 4-bit Magnitude Comparator (IC -7485), Cascading of IC 7485, Decoder,
Multiplexer, Demultiplexers, Encoders. Parallel Binary adder, IC 7483, 4-bit Binary parallel
adder/subtractor,
UNIT III
Sequential Logic Circuits: Flip Flops, S-R latch, gated latches, Edge triggered Flip Flops, Master-
slave Flip Flops, Conversion of flip flops, Analysis of clocked sequential circuits, Design of
synchronous circuits, State transition diagram, state reduction and assignment.
UNIT IV
Counters: Design of Asynchronous and Synchronous Counters, two bits & four bits up & down
counters and their design, Shift registers, Serial & Parallel data transfer, Shift left/Right register, Shift
Register applications.
UNIT V
Logic Families: Diode switching, Transistors as a switching element, MOS as a digital circuit element,
concept of transfer characteristics, input characteristics and output characteristics of logic gates, fan in,
fan out, noise margin, Logic families: TTL, IIL, ECL, NMOS, & CMOS, Open collector outputs.

Text Books / References

1. M.Morris Mano, Digital Design, PHI
2. R.P.Jain, Modern Digital electronics, TMH
3. A.Anand Kumar, Fundamentals of Digital Circuits, PHI
4. Lee S.C, Modern Switching Theory and Digital design, PHI
5. Greenfield J.D., Practical Digital design using ICs, John Wiley.

Faculty of Engineering & Technology, GKV, Haridwar Computer Science & Engineering
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