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CV VishrutDave R5

Vishrut Dave is a senior hardware design engineer with over 7 years of experience in circuit design, PCB layout, testing and validation. He has worked on projects involving FPGA boards, power amplifiers, EV chargers, medical devices and more. He holds a B.Tech in electronics engineering and is qualified for the GATE exam. He is looking for opportunities to further develop his technical skills and provide value to an organization.

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100% found this document useful (1 vote)
55 views

CV VishrutDave R5

Vishrut Dave is a senior hardware design engineer with over 7 years of experience in circuit design, PCB layout, testing and validation. He has worked on projects involving FPGA boards, power amplifiers, EV chargers, medical devices and more. He holds a B.Tech in electronics engineering and is qualified for the GATE exam. He is looking for opportunities to further develop his technical skills and provide value to an organization.

Uploaded by

avishek001
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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VISHRUT DAVE

[email protected]
+91 9898305605
+91 9875051632
B-201, Gini Lake Gardenz App.
Off. S.G. Highway,
Makarba, Ahmedabad- 380051

CAREER OBJECTIVE
• Eager to work with an organization where I can implement my technical skills & provide
growth for the organization while learning new things as I work along.
• GATE exam Qualified B.TECH. candidate having 7+ years of total industrial
experience in designing & leading different core technical areas ranging from
schematic design to layout design with thermal simulation, signal & power integrity
analysis as well as on hand testing, validation & board bring up activity.

EXPERIENCE
Organization Position Held Experience Duration
Optimized solutions Ltd. Sr. Hardware Design Nov. 2023 – Present
Engineer
eInfochips – An Arrow Engineer – Hardware July 2021 – Oct. 2023
Company Design (PES)
Smartmeters Embedded Design Sept. 2020 – July 2021
Technologies Pvt. Ltd. Engineer
(Adani group)
Space Application Center Engineer - PCB Layout August 2018 – June 2020
(ISRO) design & Simulation
Hitachi Hi-rel Power Trainee Engineer – R&D June 2016 to August
Electronics Ltd. dept. 2018

EDUCATION
• B.TECH. in EC Engineering |2016, Dharmsinh Desai University, Gujarat CPI: 7.26
• HSC (GSEB) |2012, G.K. Dholakia High school 78%
• SSC (GSEB) |2010, G.K. Dholakia High school 91.38%

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DETAILED EXPEREIENCE
❖ Optimized Solutions Limited Nov. 2023 to
Present
Role: Sr. Hardware design engineer
Successfully completed bring up and functional test activities of 2 projects from SAC &
NPCIL FPGA boards.
• Reviewed schematics and Layout of more than 3 projects and also helped design remaining
schematic from other complex FPGA projects consisting Virtex Ultrascale+ and Zynq 7000
series FPGAs.
Finalized the architecture and detailed block diagram from scratch, for one of the Power
Amplifier monitoring system project from BARC.
❖ eInfochips – An Arrow Company July 2021 to Oct.
2023
Role: Engineer – Hardware design (PES)
• Successfully tested & passed EMI/EMC Pre-compliance tests for CISPR32, U.L. as well as
FCC compliance test standards.
• Performed component selection, circuit design, design improvement after pre-compliance
tests, BOM optimization, Bring-up & EDVT tests for 4+ projects within span of 2 years.
• Designed & fully tested 4-door controller for client using SiP module, eMMC & various low
speed (I2C, SPI, UART, RS232, RS485) & high-speed peripherals (USB3.0, 1000 base T1,
Wi-Fi 5GHz, BT/BLE).
• I have used STM32MP1 series of microprocessors, Qualcomm’s QCS8250 & QCA6391(Wi-
Fi6/BT SoC) & various PMICs from Qualcomm in my design. I have also done pin-mux build
up, power budget analysis, PCB stack-up design, thermal analysis & schematic design from
scratch for the projects involving these chipsets.
• Worked on Altium schematic design & supervised layout design in Altium tool as well.
• In another project of EV charger, I designed schematic in Cadence Allegro while also
working on Mentor graphics Hyper lynx for PI & SI analysis.
• Currently working on medical grade Spine surgery camera module & finished calculating
MTBF analysis for SOM as well as Carrier board for the same.
• Also Helped pass Prescan certification for Wi-Fi & BT module reusability using
different antenna.
• I have worked on Spectrum analyzer for Conducted & Near field testing, 8GHz MSO for
High-speed signals’ validation as well as various thermal chambers.

❖ Smartmeters Technologies Pvt. Ltd.


Role: Embedded Design Engineer September-2020 to July-2021
• Designed HES & MDMS for grid of smart meters deployed in field.
• Gathered profound experience in LabVIEW simulation software.
• Worked on several communication protocols such as MQTT, serial, USB, RS-485, SPI,
I2C, FTP, GSM/GPRS & its AT command sets.
• Designed complete schematic of smart Gas meter with 8x20 LCD interface.
• Worked on designing multiple hardware for Smart Energy meter & Gas meter.
• Currently working on MQTT broker-client configuration to build state of the art Head-
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End-System (HES) for a new grid of smart meters.
• I have also worked on SQL server management. Right now, my focus lies on Bluetooth
low energy & LoRA based RF solution R&D for my company.

❖ SAC-ISRO (Space Application Centre- Indian Space Research Organization)


Role: DEGREE ENGG. SERV. UNIT August-2018 to June-2020
• Last worked on department’s R&D project based on embedded Decaps in PCB layout.
Simulation proved the merits of embedded design.
• Carrying out power integrity & signal integrity analysis in Mentor Graphics’
Hyperlynx SI/PI CO-SIM after carefully designing high speed / mixed signal board
layout in CADSTAR/ORCAD layout tools. Also, have designed stack-up in
SPEEDSTACK software. Setting up symbols & footprints library & synchronizing it with
master library at the end of each layout.
• Have performed various process including studying schematics, verifying the drawing
in schematic editor along with the designer.
• Generating a netlist and transferring it to board layout stage.
• Have designed stack-up with necessary impedance requirements in SPEEDSTACK.
• Final placement & routing has been performed after verifying the tentative placement
with the designer. If SI/PI is not required, then have generated Gerber data for DFM
check (Design for manufacturing check) in UCAMCO. And if SI/PI is required then have
exported odb++ data to Hyperlynx CO-SIM software.
• Have carried out power integrity analysis following IR drop analysis if DC drop is found
within limits.
• If optimization is needed, have made necessary changes to the board layout.
• When the Board passes DC drop & PIA test, have carried out SI analysis after assigning
IBIS models.
• Finally, SI/PI CO-SIM has been carried out after passing all the individual tests.

❖ Hitachi Hi-rel Power Electronics Pvt. Ltd.


Role: Trainee engineer, R&D dept. June-2016 to August-2018
• Designing various sensing & driver circuits which are to be used within different power
electronics applications such as Industrial UPS (Ranging from 10 kVA to 120 kVA),
Railway underslung battery charger & inverter, Industrial battery charger.
• Studying specification sheet for every newly assigned development, calculating
development time & gathering information on how to use shared resources for new
project.
• Developing control & sensing circuit for the power electronics blocks already
developed during first prototype.
• Preparing all the schematics, simulating the necessary circuits & then outsourcing the
layout work to layout designer.
• Assembling & testing of the PCBs individually & then integrating them with the power
electronics stage in the prototype product.
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❖ PRL (Physical Research Laboratory) - Internship
Role: Project assistant Dec-2015 to April-2016
• Developed a working prototype of a fluxgate magnetometer for Aditya-L1 mission to be
launched by ISRO in 2021. It can measure up to a minimum of 1 micro-tesla of magnetic
flux density. Project was built by minimum apparatus at considerably low cost, thus
being one of a kind.

INTERESTS & HOBBIES


• Reading scientific magazines
• Jogging & exercising
• Getting familiar with Embedded C & assembly level programming language.
• Automobile & Astrophysics tech. information videos

REFERENCES
• Mr. Divyeshkumar Patel – Tech Lead (level 2), eInfochips – An Arrow Company
• Mr. Aditya Kumar Sharma – Scientist/Engineer-SE, SAC-ISRO
• Mr. Akhil Tayal – Dy. General Manager, Smartmeters Technologies Pvt. Ltd.
• Mr. Haresh Patel – Technical Manager, Hitachi Hi-rel Pvt. Ltd.

ACADEMIC PROJECTS
• Speech to text and text to speech conversion using MATLAB (7th Semester): A
manually activated automated response application based on MATLAB’s GUI tool.

• Range Finder Machine Using Ultrasonic waves (6TH SEMESTER): Range finder
measures up to minimum of 0.5 cm and maximum of 85 cm with accuracy of +/- 0.2
cm. Except the microcontroller, all other parts of project were built/created and
assembled by me along with the PCB.

• Digital Speedometer-My own design (5th Semester): A fully digital speedometer with
resolution of 1kmph and max speed of 99 kmph was built by the most basic ICs (Flip
Flops, Counters, etc.) using No MCU.

• Sequence Detector (4th Semester): Based on the fundamentals of digital electronics, a


simple 1010 sequence detector was built as a mini project this semester.

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