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Tutorial Feb 20

The document contains 4 numerical problems related to MOSFET amplifiers: 1) Analyzing the bias point and gain of a MOSFET amplifier circuit. 2) Verifying the bias point of a common source amplifier and deriving small signal parameters. 3) Calculating the source resistance needed to reduce the voltage gain of a common source amplifier by a factor of 4. 4) Deriving expressions for voltage gain by replacing a MOSFET with its small signal equivalent circuit model.

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sourish.ambati
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0% found this document useful (0 votes)
25 views

Tutorial Feb 20

The document contains 4 numerical problems related to MOSFET amplifiers: 1) Analyzing the bias point and gain of a MOSFET amplifier circuit. 2) Verifying the bias point of a common source amplifier and deriving small signal parameters. 3) Calculating the source resistance needed to reduce the voltage gain of a common source amplifier by a factor of 4. 4) Deriving expressions for voltage gain by replacing a MOSFET with its small signal equivalent circuit model.

Uploaded by

sourish.ambati
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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NUMERICAL 1

Consider the FET amplifier of Fig for the case


Vt= 2 V, knW/L =1mA/V2, VGS = 4 V, VDD = 10 V, and RD = 3.6k.
(a) Find the dc quantities ID and VDS.
(b) Calculate the value of gm at the bias point.
(c) Calculate the value of the voltage gain.
(d) If the MOSFET has λ = 0.01 V-1, find ro at the bias point
and calculate the voltage gain.
Numerical 2
Figure shows a discrete-circuit CS amplifier employing the classical biasing scheme. The input signal vsig is coupled to the gate
through a very large capacitor (shown as infinite). The transistor source is connected to ground at signal frequencies via a very
large capacitor (shown as infinite). The output voltage signal that develops at the drain is coupled to a load resistance via a very
large capacitor (shown as infinite).
a) If the transistor has Vt = 1 V, and kn’W/L = 2mA/V2, verify that the bias circuit establishes VGS = 2 V, ID = 1 mA, and VD = +7.5 V
That is, assume these values, and verify that they are consistent with the values of the circuit components and the device
parameters.
b) Find gm and ro if VA = 100 V.
c) Draw a complete small-signal equivalent circuit for the amplifier assuming all capacitors behave as short circuits at signal
frequencies.
d) Find Rin, vgs/vsig, vo/vgs

2/23/2024 2
Numerical 3
• A CS amplifier using an NMOS transistor is biased as shown below, for which gm =
2mA/V is found to have an overall voltage Gv of -16 V/V. What value should a
resistance Rs inserted in the source lead to have to reduce the voltage gain by a
factor of 4?

2/23/2024 3
Numerical 4
• For the NMOS amplifier in Fig. P4.74,
replace the transistor with its T equivalent
circuit of Fig. 4.39(d). Derive expressions
for the voltage gains vs /vt and vd /vi

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