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Cache Memory

The document discusses cache memory, registers, processor to memory communication, and other computer hardware components. Cache memory stores frequently accessed data closer to the CPU for faster access times. There are primary and secondary cache levels. Registers temporarily store instructions and data during processing. The processor uses memory address and data registers to read from and write to main memory. Buses transfer data, addresses, and control signals between components.

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0% found this document useful (0 votes)
16 views

Cache Memory

The document discusses cache memory, registers, processor to memory communication, and other computer hardware components. Cache memory stores frequently accessed data closer to the CPU for faster access times. There are primary and secondary cache levels. Registers temporarily store instructions and data during processing. The processor uses memory address and data registers to read from and write to main memory. Buses transfer data, addresses, and control signals between components.

Uploaded by

Centaur360
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Cache Memory

Cache Memory is the small fast and expensive memory that


stores the data which needs to be frequently accessed from the
main memory.The processor before reading dadta or writing
data first checks for the same data in the cache and if the data
is present there then the processor reads thedata or writes the
data to the cache itself because the acces time is much
morethan the main memory ,The cach memory is always
placed betweent the CPU(processor) and the main
memory .The transfer of data from the processor and the
cache mmeory is bidirectional.The availability of data in the
cache is known ass cache hit ,the capability of a cache
memory is always measured in cache hit
There are two types of caches –
Primary cache -Primary cache or level 1 cache is stored inside
the CPU.It is smaller and the fastest type of caches that
provides a quick access to the frequently accessed data by the
microprocessor
Secondary cache -> The secodnary cache or the level 2
cache ,It is usually stored outside the CPU inside the
motherboard ,It is larger but slwoer than primary cache
Register
Registers is a small storage are inside the CPU, it is a hgih
speed memory location that is used for holding instruction and
the interrmediate results that needs to be proceessed
There are various types of registers-
Programme counter-Program counter keeps track of the next
instruction to be executed
Instruction Register holds the instruction that is to be decoded
by the control unit
Memory address register It Holds the address of the next
memory location that needs to be accessed
Memory Buffer Register -It is used for storing the data that is
received by or sent to the CPU
Memory Data register-it is used for storing the operands and
data
Accumulator is used for storing the results of the arithemetic
unit andd the logic unit
Proccessor to Memory communication
The direct communciation of the processor and the memory is
usually done with the help fo two registers ,they are memory
address registers and the memory buffer register
The processor canc interact with the memory for reading the
data from the memory or writing the data on to the
memory ,These registerrs are special purpose registers of the
processor
.The MAR is used by the processor to keep track of the
memory location where it has to perform reading or writing
operation.
The MDR is used by the processor to store the data that needs
to be copied from/to the memory of the computer system
What are the steps followed by the processor to read data
from the desired memory location?
1) First the processor loads the data that needs to be read
on to the MAR register using the address bus
2) After loading the data ,the processor issues the READ
control signal the control BUS ,The control BUS is used
to carry out the commands of the proccesssor, adnd the
status ssignals are issued by the various devices in
repsonse to these commands
3) After receiving the READ control signal the memory
loads the data into the MDR using the address received
by the MAR registere using the data bus
4) Finally the data is transffered to the processor

What are the steps followed by the processor to read data


from the desired memory location?
1) First the processor loads the address of thee next memory
location where the data is to be written to in the MAR
reigster usign the address BUS
2) After loading the address of the memory location,the
processor loads the desired data in the MDR register
using the data BUS
3) After this the processor issues the WRITE control signal
to the memory using the control BUS
4) Finally the memory stores the data loaded in the MDR
register to the desired memory location
The device controller is used to control the working of the
variosu peripheral devices
The processor actually communicates with the device
controllers for performing the I/O operations
The itnerface unit acts as the intermediary between the
processor andhte device controllers of the various peripheral
devices fo the ccomputer system,The basic function fo the
interface unit is to accept the command controls from the
processor and interpret the commands so that they can easily
be undersstood by the device controllers for carrying out the
necessary operations
,Therfore we can say that the interface unit is responsible for
controlliung the inout and output operations between the
processor and the I/O devices.the interface uniit has twro
registers,They are the DATA registers and the status registers
The DATA register is used to ccopy the data that needs to be
transffered to the processor or to an output devices,The status
regisster is used to indicate the status of the dat
register ,wether it is currently holding the data or not .If the
data register is holding the data that needs tio be transfffered
then the flag bit of the status register is set to one ,
What are the steps involved while transffering the data from
the input device to the processor?
1) The data to bee transffered is placed on the data
bus ,which transfers a single byte of a data a a time
2) The input device then sends the data valid signal through
the control BUS to the data register indicating that the
data is available on the data BUS
3) When the interface unit receives the data from the data
BUS and it issues a data accepted signal through the
device control BUS as an acknopwledgement that the
data is received .The input deveice then disables the data
valid signal
4) As the data register now holds the data ,The F or the flag
bit of the status register is set to 1
5) The processor now issues the I/O read signal to the data
register in the interface unit
6) The data register then places the ddata on the data bus
connected ot the processor of the computer system,After
receiving the data the processor sends an appropriate data
acknowledgement signal to the input device indicating
that the data has been received

The steps performed while transfferign data from the


processor to the output devices are
1) The processor places the data that needs to be transffered
to the data bus connected to the data register fo the
interface unit
2) The CPU also places the address of the output device on
the device address BUS
3) After placing the addreess and the data on the
appropriate buses the CPU issues a I/O write signal
which write the data on the data register,The flag bit in
the interfae is s et to 1 indicating that the data register
now holds the data
4) The data register of the interface unit issues a data
accepted signal through the control BUS of the processor
, indicating that the data has been received
5) The interface unit then places the data on the data
reigster onto the data bus connected to the device
controller of the output device
6) The output device then receives the data and sends an
acknowledgement signal to the processor through the
interface indicating that the desired data has been
received
In Fetching
Fetching:-In this phase the CPU retrieves the instruction
from the main memory of the computer system.The
address of the instruction that needs to be exectuted is
sent to the CPU throgugh the address bus ,The address of
the instruction is stored by the CPU in the internal
register known as Program counter ,After the address of
the instruction is confirmed by the CPU ,The actual
instruction is retrieved by the CPU and is sent to the
instruction register
Decoding:-This phase of the instruction cycle is
responsible for breaking down the instruction into
several part so that it can be understood easily before
being processed by the CPU,The instruction is usually
decoded by the instruction decoder which is a vital
component of the CPU,The decoding is alsow known as
interpreting ,The instructions are interpreted to determine
two key factors,The opcode and the operand,The opcode
speccifies the instruction that needs to be performed and
the operand specify the data on which the data needs to
be executed
Exectuion Cycle
Executing :-In this phase the decoded instruciton is
executed by the ALU of the CPU,The execution time
specnt by the ALU for executing the instruction may
vary,It depends on the size of the instruction ,The
exectuion time also depneds on the process architecture

Storing:-In this phase , the result computed by the


execution phase is either sent to the memory or to an
output device of the computer system .Te Program
ccounter resiter also gets updated in this phase to point to
the next instruction that is to be exexcuted
BUS
A bus is a set of wires that is used to connect different
internal components for the purpose of transferring data
and adddress among them.
There are two types of BUS
Serial BUS and Parellel BUS
In Serial BUS only one bit of data is transffered at a time
amongst the various hardware component
In parellel BUS several bits of data is trasfferedd at a
time amongst the various hardware components
The speed of any type of BUS is measured in terms of
the number of bits trasnffered persecond
The control BUS manages the transfer of data
and instrcution between various hardware components by
transffering apporpriate control signals
As the name suggest the data bus ina computer is used to
trasnfer data amongst the different internal
comonents,the speed of the data bus also affects the
processing speed .Modern computers uses a 32 bit data
bus ,this means that the data bus is able to carry 32 bits
of data at a time,The data bus is implemented between
the main memory and the processor
The figure shows that a bidirectional data bus is
implemented between the main memory and the
processor.The bidirectional data bus allows for the
transfer of data in bith the directions ,The data bus Is
generally bidirectional in most computer systems
Address BUS
The Address BUS also known as memory BUS is used to
transfer the memory address of the read and write
operations,The address BUS contains a number of
address lines that determines the range of memory
address that can be referenced by using the address BUS
For example a 32 bit address BUS can be used to
reference 2^32 memory location
The address BUS can be used for transffering memroy
between the processor and the main memory
The complex instruction set referes to the set of
instruction that mpincludes very complex and large set
off instruction,The numebr of instruction is this set may
vary from 100 to 250,
The instruction set in this set are memory based
instruction which involves frequent reference to the
memory ,The complex instruction set has a lrge number
of addressing modes because of the frequent reference to
the registers as weel as the memory ,The instructions in
this instruction set are variable length instruction format
which is not limited to 32 bits,The execution of this
instruction takes a lot of time because the instructions are
memory based and accessign the memory takes a lot time
as compared to accesssing the register
The computer which uses the complex instruction set is
called Complex instruction set computer,this computer
requires a separate circuitry which makes the CPU
design more complicated
 There is no need to invent a new instruction set for a
new design,A new processor can use the instruction
set of its predecessor
 A programme written In CISC requries less memory
space as the code is confined to less number of
instruction
 CISC makes the job of compiler easy by facilitating
the use of high level language constructs

Disadvantages
 The inheritance of the old instruction set to the new
one icnreasees the complexity
 Many CISC instrucions are not used
 CISC commands are translated into large number of
micro codes which mmakes the CPU processing
more slower
 CISC systems have a complex hardware so they
require more time for designing
Reduced instruction set
The reduced instruction set refers to avery few set
of instructions ranging from 0 to 100 ,These
instruction only include those instructions which are
frequently used by the processor to execute the
programme
These instructions are generally very easy to
exectute,The instructions used in these set are
mostly register based which means that the
execution of the instruction involves frequent
references to the register ,The memory based
instructions which involves the frrequent reference
to the memor yare very few ,The memory based
instructions include only the load and store
instructions,the instructions in this instruction set
haved fixed length instruction formate of 32 bits,An
instruction format divides the bits into small groups
know as fields
The Opcode fields -It represents the operations to be
performed by the instruction,
The Operand field-It represents the data on which
the operation has to be performed or it stores the
memory location or the register where the data is
stored
Mode field -It reprensents the method fo fetching
the operands in the specified memory location or the
registers
RISC is preffered over CISC because of the
compact size and small instruction set >The speed
of RISC processors are in MIPS(Millions of
Instructions per second
Advantages of RISC processors
In RISC processors , the instructions are executed
by decoding and in CISC processors the instructions
are executed by first translating them into micro
code instructions ,The conversion of instructions
into microcode consumes a lot fo memory thereny
reducign the speed of the execution
The RISC proccessors exectue instructions in a
single clock cycle wheras the CISC processors
require multiple clock cycles for the execution of an
instruction
The hardware of the RISC is very simple and can be
designed easily as compared to the hardware of
CISC processor which is very complex,require a lot
of time to design and are in large in size
The only disadavantage of RISC over CISC is the
number of instructions required to perform an
operation is comparitively large
Static Ram -Type of RAM which stores data unitl
the power of the data system is switched ON
ASRAM(Asynchronous RAM)->ASRAM is a type
of RAM which performs its operation without the
use fo ssystem clock
,IT makes use of three signals namely -Chip
Select ,Write Enable (WE) Output Enable ,The CS
signal enables the processor to select the memory on
which the operation (Read and write )to be
performed.If the CS value equals to zero memory is
enabled to perform operation ,if the value of CS is
one then the memory is disabled to perform
operations such as read and write
The WE signal makes the decision related to the
data wether it should read be read from or write to
the memory
The signal Output enable is an active low signal that
enables the processor to give output for the data
The BSRAM or The Burst RAM works in
association with the system clock
It is used for high speed application because the
read and write cycles are synchronised with the
clock cycles of the processor,the access waiting time
gets reduced considerably after the read and write
cycles are synchronised witeh clock cycles
The speed and the cost of BSRAM increases or
decreases simultaneously
Burst SRAM is also called as synchronous RAM
PBSRAM makes use of the pipeline technology in
which a large amount if data iss broken up in the for
mof small packets containing data ,These packets
are arranged in a sequential manner in the pipeline
and are sent to the memory
simultaneously,PBSRAM can handle a large amount
of dat a simultaneously ,It is the fastest tyep fo
SRAM because it operate at bus rates as high as
66MHz
Dynamic RAM is a RAM in which the data is stored
in a storage cell containing a trasnistorr and a
capacitor
Unlike SRAM ,DRAM needs to be constantly
refreshed with power supply because the capacitor
ahs a tendency to get discharged ,DRAM retains
the data for a very short span of even after the
power supply is switched off
SDRAM performs its oeprations in a synchronous
mode ,That is in association with the clock sycle of
the processor BUS,SDRAM consists of tw ointernal
memory Banks such that if the address is sent from
the first bank then the adddress can be read by the
second BANK,The Internal banks are used because
the row and column address aneeds to be charged
for reading an addresss,the SDRAM provides a
synchronous interface in which it waits for a clock
signal before responding to a control
inoput ,Genernally it used with the processor for
storing the datai na continous manner,The continous
form of data storage helps in processing more
number of instructions per unit time that increases
the speed of the data access.
Rambus DRAM or RDRAM works at a faster speed
as compared to a SDRAM ,it is compact in size and
uses a 16 bit address bus ,it provides the facility to
transfer data at a maximum speed of 800 MHz
It contains multiple address and data lines which
increases the speed of data access ,The multiple
address and data lines helps to perform read and
wrtie operations simultaneously
High cost low compatibility
EDODRAM(Extended Data Out DRAM)
EDODRAM can acccess more than one bit of data
at once ,which helps in achieving faster data access
rates,It can perform various operations at once such
as reading and writing,The EDODRAM starts
accepting the next data immediately after receiving
the first bit of data for performing the read or write
operations on .
Fast Page Mode DRAM (FPDRAM) :- Fast Page
Mode DRAM uses the concept of paging in which
the read or write operation is poerformed by
selecitng the address of the data from the rows and
column of the matrix.After the user reads the data
the address of the particcular column is
incremnetedd so that the user can read the next part
of the data ,The use of paging concept in
FPMDRAM does not work with the buses at the
memory speed more than 66 MHz,As a result a lot
of time is consumed in reading or writing the data
from the matrix
Programmable ROM is a memory chip on which
the write operation can be performed only once .the
data is stored in the PROM permanently,Once a
program is written on the PROM it cannot be erased
or destroyed,To write the data on the PROM a
device know as PROM programmer or PROM
burner is requireed,The process of writing data into
the PROM is reffered to as “burning” the PROM
EPROM (Erasable PROM) is a ROM in which data
can be erased or destroyed by using Ultra Violet
Light ,
EPROM provides the facility of changing the
contents of the data that is is it can be reprogrammed
EPROM consists of floating gate transistors which can hold
an electric charge even after the power ssupply of the
computer system is swithced off ,It has the ability to storre
data for a long period of time
EEPROM is atype of ROM in which data can be erased or
destroyed by making use of electric charges ,It has the ability
to retain data even after the computer system is switched
off ,IT can store data permanently but it allows us to make
changes in the data by erasing it with the help fo electric
cahrges ,In this type fo memory the data can be written to or
erased by one byte at a time because of which it works veery
slowly
Flash ROM is a type of EEPROM whicch stores the
information using floating gate transistors,It can hold
electricity much longer than a normal transisotr,The data
sstored in flash ROM can be easily transffered using data
cables,bluetooth and infrared technology ,We can easily erase
the data stored in flash ROM and reprogramme this type of
memory ,Flash ROM has much faster speed of reading data as
compared to nay other type of ROM ,It uses continous cells
for storing data
There are two types of flash ROM
The yare
NAND flash:- In NAND flash each cell behaves like a
MOSFET which contains two gate for amplifying an electric
signal
NOR flash:- NOR flash provides the facility to write data or
information with the help fo tunne linjection ,It can be defined
as the process of inserting an electron in an electric conductor
with the help of electric insulator,It also provides the facility
to erase the data by using tunnel release
One block may contain one or more record and each record is
seperated by a blank space known as inter record gaps
A magnetised portion refers to the binary digitr ‘1’ wheras a
non magnetised portion refers to the binary digit ‘0’
In magnetic tapes the data is stored in the for mof “records”
and a set of records is known as files,’the davnatager of
magnetic tapes is -> low cost
Large torage cacpicty
Easy to handle and store
Easily transportable
Disadvantage
Low data transmission speed due to the sequemtial access
Is not suitable for radnom access
Fast wear out
Needs tobe stored in a protected environment
Updating such as insertion or deletion is difficult
Magnetic disk is a flat disk that is covered with manetic
coating to hold information
It is a type of secondary memory that is used to store different
programmes and files,IT is used to store digital information in
the form of small magentized needles,These needles helps in
encoding a single bit of information by getting polarized in
one direction represneted by one adnthe opposite direction
represented as 0
Magentic disk can store a large amount of data and is less
expensive as compared to RAM As it takes more time to
read data from a specifiedd location,Its data access rate is
slow as compared ot te main memory ,IT allows the random
acccesso f data and provides the facility of erasing recording
the data as many times as desired
The thickness between two tracks affect the sorage capcity ofa
magnetic disk,If the thickness between the two track is less
the storage capcity of magnetic disk is more
And vice versa
The data is stored in tracks in the form of tiny dots on the
tracks which are known as spots ,The size of these spots
should be small in order to hold large aount of data and
information

High storage capcity


Less prone to corruption of data s compared to magnetic tapes
Easy , direct access
Easily moveable from place to place
Better data transfer rate as compared to magenetic tapes
Low cost as compared to RAM
The disadvantages of magnetic disks are
More expensive as compared to magnetic tapes
When used on-line they aremore prone to corruption as
compared to magentic tapes
Not exactly ideal for situations where data has to be accessed
sequentially
Requires dust free environent
Major advantage of optical disks are
Large storage cacpity
Low cost per bit of storage
Longer lifespan than magnetic disks
Easily portable and stored

Disadvantages:-
Low data access speed as compared to magnetic disk
The Drive mechanism is more ccomplicated to that of
magnetic disks
The requirements of material used for recording in the MO
system is
1) It should have low thermal conductivity that provides
facility to limit laterla heating
2) It should have a smooth surface and domain boundary to
ddecrease the system noise
3) The coercivity of the material should be high at room
temperature
4) The melting point should be high enough ot provide
stability in room temperature
Architecture of Magneto optical disks
The antif reflection layer is used to increase the lgiht
absorption,The qudri layer is used to decrease the
reflection of light that provides the facility to decrease
the requirement of laser light ,The amorphous metal is
used as MO media
SSD’s have no moving parts due to which access time of
SSD is lower than that of hard disks
SSD is vulnerable
SSD are affected by power loss, Electrci discharge and
magenteic fields

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