Total No. of Questions : 4] SEAT No.

8
23
PA-4978 [Total No. of Pages : 2

ic-
[6008]-230

tat
2s
S.E. (Computer) (Insem.)

0:0
MICROPROCESSOR

02 91
5:1
(2019 Pattern) (210254) (Semester - II)

0
31
8/0 13
Time : 1 Hour] [Max. Marks : 30
0
4/2
Instructions to the candidates:
.23 GP

1) Answer Q1 or Q2, Q3 or Q4.

2) Figures to the right indicate full marks.
E
80

8
C

23
ic-
16

tat
Q1) a) Explain the architecture of the 80386 microprocessor with an appropriate
8.2

2s
diagram. [5]
.24

0:0
91
b) Describe the following addressing modes of 80386 with example [6]
49

5:1
30
31

i) Index addressing mode

01
02

ii) Direct addressing mode

4/2
GP
8/0

iii) Based index mode

CE
80

8
23
c) Describe the use of various 80386 Data Movement Instructions in assembly
.23

language programming with examples. [4]ic-

16

tat
8.2

2s

OR
.24

0:0
91
49

Q2) a) Describe the various operating modes of 80386. [5]

5:1
30
31

b) Describe the following addressing modes of 80386 with example [6]

01
02
4/2

i) Register addressing mode

GP
8/0

ii) Register Indirect addressing mode

CE
80
.23

iii) Immediate addressing mode

16

c) Explain the General Registers and Segment Registers of 80386 with an

8.2

appropriate diagram. [4]

.24
49

P.T.O.
Q3) a) Explain the 80386 processor state after Reset. [5]

8
23
b) Draw and Explain Read Cycle with non-pipelined address timing. [5]

ic-
tat
c) Draw and Explain Control Registers of 80386. [5]

2s
0:0
OR

02 91
5:1
Q4) a) Explain the following signals [5]

0
31
i) 8/0 13
INTR
0
4/2
.23 GP

ii) ADS#

iii) READY#
E
80

8
C

23
iv) HOLD

ic-
16

tat
v) NMI
8.2

2s
.24

b) Draw and explain the Write Cycle with non-pipelined address timing.[5]
0:0
91
49

5:1
c) Draw and Explain Debug Registers of 80386. [5]
30
31
01
02


4/2
GP
8/0
CE
80

8
23
.23

ic-
16

tat
8.2

2s
.24

0:0
91
49

5:1
30
31
01
02
4/2
GP
8/0
CE
80
.23
16
8.2
.24
49

[6008]-230 2