1.

1 Microcontroller Series
1.1.1 Intel 8048
This type of microcontrollers has the following features;
1. Memory
Has Data memory and stack memory occupy the same memory space while Program memory is
separate from data and stack memory.
• Program memory: It consists of 1 KB on-chip masked ROM and up to 3 KB of external
program memory. It is possible to disable on-chip memory and use up to 4 KB of external
memory. The total size of supported program memory is 4 KB. Conditional branch and
unconditional indirect jump instructions is used to jump program memory. Unconditional
jump and call instructions are used to address within current 2 KB program memory block.
• Data memory: It consists of 64 bytes of on-chip RAM and up to 256 bytes of external
RAM where;
i. 16 bytes of on-chip RAM are used for 2 banks of working registers, located at addresses
00h - 07h (bank 0) and 18h - 1Fh.
ii. Up to 16 bytes of on-chip RAM at addresses 08h - 17h are used as stack memory.
iii.The rest of the on-chip RAM can be accessed indirectly.
iv. Up to 256 bytes of external memory can be accessed using MOVX instruction.
Stack is stored in data memory locations 08h - 17h (8 - 23) and can be 8-levels deep. The stack
starts at location 08h and grows upwards and when a CALL instruction is executed the return
address (12 bits) and the upper 4 bits of the program status word (CY, AC, F0 and BS flags) are
stored in the stack.
Reserved locations include:
• 0000h - the MCU starts executing instructions at this address after RESET.
• 0003h - the MCU jumps to this address when an external interrupt occurs.
• 0007h - the MCU jumps to this address when a timer/counter interrupt occurs.
2. Interrupts
The processor has two maskable interrupts which are:
i. INT external interrupt: When this interrupt occurs, the microcontroller disables any
further interrupts, saves the program counter and part of the program status word into
stack, and jumps to address 0003h. This address usually contains a jump instruction to
 interrupt processing routine. To return from the interrupt the routine should use RETR
instruction.
ii. Timer/counter interrupt: This interrupt occurs when the counter overflows, i.e. when
it has the value FFh and it's incremented. When the interrupt occurs the microcontroller
disables further interrupts, saves the program counter and part of the program status
word into stack, and jumps to address 0007h. This address usually contains a jump
instruction to interrupt processing routine.
3. I/O ports
It has twenty seven I/O lines:
• 8-bit quasi-bidirectional ports 1 and 2.
• 8-bit bidirectional BUS port.
• 3 Test inputs
4. Registers
i. Program counter - It is a 12 bit most significant bit of the program counter is not updated
when the program counter is incremented. To tell the MCU to set/reset this bit the program
should use SEL MB1 or SEL MB0 instructions.
ii. Accumulator is used for data moving, arithmetic, logic and I/O operations
iii. Working registers are used for temporary data storage. These registers can be addressed
directly by many instructions. There are two sets of working registers - bank 0 and bank 1,
each bank has 8 working registers.
iv. RAM pointer registers are used by many instructions to address RAM indirectly. These
registers are located in RAM. Their addresses are 00h and 01h for register bank 0, and 18h
and 19h for register bank 1.
5. Program status word consists of the following bits:
• Carry (CY) - set to 1 if there is a carry from the MSB during last ADD operation.
• Auxiliary carry (AC) - set by last ADD instruction.
• Flag 0 (F0) - user flag. This flag can be set/reset by user program, and can be tested using
JF0 instruction. The MCU also has flag 1 that can be set/reset/tested similar to flag 0, but
the flag 1 is not a part of program status word register.
• Register bank select (BS) - set to 0 to use the bank 0 (RAM locations 00h - 07h), set to 1
for the bank 1 (RAM locations 18h - 1Fh).
 6. Instruction Set
8048 instruction set consists of the following instructions:
• Data moving instructions.
• Arithmetic - add, increment and decrement. No subtract nor compare instructions.
• Logic - rotate, AND, OR, exclusive OR, NOT and bit test.
• Control transfer - conditional branch (limited to current 256-byte page) and unconditional
jumps and calls (limited to current 2 KB memory block).
• Input/Output instructions - input, output and logic operations with port data.
• Timer/counter related instructions - start, stop and read value of the timer/counter.
• Other - flag operations, decimal adjust, nibble swap, memory bank selection,
enable/disable interrupts, etc.
7. Addressing Modes
i. Implied addressing - the data value/data address is implicitly associated with the
instruction.
• Accumulator - the instruction implies that the accumulator contains data.
• Register - references data in one of 8 working registers in the currently selected data
memory bank.
• 8-bit operands are used to transfer control within current 256-byte program memory page.
Accumulator - the instruction implies that the accumulator contains data.
ii. Immediate addressing- 8-bit data is provided in the instruction.
iii. Absolute addressing- the instruction operand specifies the memory address where control
is transferred. The instruction may have 8-bit or 11-bit operand:
• 8-bit operands are used to transfer control within current 256-byte program memory page.
• 11-bit operands are used to transfer control within current 2 KB program memory block.
iv. Register indirect Addressing– instruction specifies RAM pointer register that contains
RAM address, where data is located.
v. Accumulator indirect – the accumulator contains a program memory address within
current 256 byte program memory page where the program control will be transferred.
1.1.2 Intel 8051
The features of the 8051 family are as follows :

i. 4096 bytes on-chip program memory.

ii. 126 bytes on-chip data memory,
iii. Four register banks.
iv. 128 user-defined software flags,
v. 64 kilobytes each program and external RAM addressability.
vi. One microsecond instruction cycle with 12 MHz crystal.
vii. 32 bidirectional I/O lines organized as four 8 - bit ports (16 lines on 8031).
viii. Multiple mode, high-speed programmable serial port.
ix. Two multiple mode, 16-bit Timers/Counters.
x. Two-level prioritized Interrupt structure,
xi. Full depth stack for subroutine return linkage and data storage.
xii. Direct byte and bit addressability.
xiii. Binary or decimal arithmetic
xiv. Signed-overflow detection and parity computation.
xv. Hardware multiple and divide in 4 jjsec.
xvi. Integrated Boolean Processor for control applications.
xvii. Upwardly compatible with existing 8084 software.

The 8051 Hardware Configurations

The figure below shows the Internal block diagram of 8051, It consists of a CPU, two kinds of
memory sections (data memory - RAM and program memory - EFKOM/R.OM), input/output
ports, special function registers and control logic needed for a variety of peripheral functions.

These elements communicate through an eight bit data bus which runs throughout the chip referred
as internal data bus. This bus is buffered to the outside world through an I/O port when memory
or I/O expansion is desired.
The 8051 Pin Configurations

The 8051 is packaged, in a 40-pin DIP.

The 8051 family having the IC diagram and its internal block diagram showing I/O, PC, RAM,
CPU, Timers and Interrupts is shown in the figure below.

It is important to note that many pins of 8051 are used for more than one function. The alterative
functions of pins are shown in bold letters.
 i. Pins 1-8: Port 1- Each of these pins can be configured as an input or an output.
ii. Pin 9: RS-A logic one on pin 9 disables the microcontroller and clears the contents of registers.
A logic zero to pin 9 the program starts execution from the beginning.
iii. Pins 10-17: Port 3- Similar to port 1, each of these pins can serve as general input or output.
iv. Pin 10: RXD- Serial asynchronous input /synchronous communication output pin.
v. Pin 11: TXD-Serial asynchronous c output /Serial synchronous communication clock output.
vi. Pin 12: INT0- Is the Interrupt 0 input.
vii. Pin 13: INT1- is the Interrupt 1 input.
viii. Pin 14: T0- is the Counter 0 clock input.
ix. Pin 15: T1- is the Counter 1 clock input.
x. Pin 16: WR- is the Write to external (additional) RAM.
xi. Pin 17:- RD- is the Read from external RAM.
xii. Pin 18, 19: X2, X1-is the internal oscillator input and output. A quartz crystal which specifies
operating frequency is connected to these pins.
xiii. Pin 20: GND- is the Ground terminal.
 xiv. Pin 21-28: Port 2- If there is no intention to use external memory then these port pins are
configured as general inputs/outputs. The higher address byte, i.e. addresses A8-A15 will
appear on this port.
xv. Pin 29: PSEN- If external ROM is used for storing program then a logic zero (0) appears on it
every time the microcontroller reads a byte from memory.
xvi. Pin 30: ALE- Prior to reading from external memory, the microcontroller puts the lower
address byte (A0-A7) on P0 and activates the ALE output. After receiving signal from the ALE
pin, the external register memorizes the state of P0 and uses it as a memory chip address.
xvii. Pin 31: EA- By applying logic zero to this pin, P2 and P3 are used for data and address
transmission with no regard to whether there is internal memory or not. It means that even
there is a program written to the microcontroller, it will not be executed.
xviii. Pin 32-39: Port 0- Similar to P2, if external memory is not used, these pins are used as general
inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE pin is
driven high (1) or as data output (Data Bus) when the ALE pin is driven low (0).
xix. Pin 40: VCC- is the +5V power supply source pin.
1. Input/Output (I/O) pin
❖ Output pin: A logic zero (0) is applied to a bit of the P register. The output FE transistor is
turned on, thus connecting the appropriate pin to ground.
❖ Input pin: A logic one (1) is applied to a bit of the P register and the output FE transistor is
turned off and the appropriate pin remains connected to the power supply voltage over a pull-
up resistor of high resistance.
❖ Input/Output Ports (I/O Ports): Microcontrollers have 4 I/O ports each comprising 8 bits
which can be configured as inputs or outputs. In total of 32 input/output pins enabling the
microcontroller to be connected to peripheral devices are available for use. Pin configuration,
i.e. whether it is to be configured as an input (1) or an output (0), depends on its logic state. In
order to configure a microcontroller pin as an output, it is necessary to apply a logic zero (0)
to appropriate I/O port bit.
i. Port 0 : The P0 port is characterized by two functions. If external memory is used then the
lower address byte (addresses A0-A7) is applied on it. All bits of this port are configured
as inputs/outputs.. When the pin is configured as an output, it acts as an “open drain”.
 ii. Port 1 : P1 is a true I/O port, because it doesn't have any alternative functions as is the case
with P0, but can be configured as general I/O only.
iii. Port 2 : P2 acts similarly to P0 when external memory is used. Pins of this port occupy
addresses intended for external memory chip.
iv. Port 3 : All port pins can be used as general I/O, but they also have an alternative function.
In order to use these alternative functions, a logic one (1) must be applied to appropriate
bit of the P3 register.
2. Memory Organization in 8051 Microcontrollers

Intel 8051 has two types of memory. Program Memory (ROM) is used to permanently save the
program being executed, while Data Memory (RAM) is used for temporarily storing data and
intermediate results created and used during the operation of the microcontroller. 8051
microcontrollers have a 16-bit addressing bus and are capable of addressing 64 kb memory.

i. Program Memory: All models have a few Kbyte ROM embedded though a memory is
sufficient for writing most of the programs. How it handles external memory depends on the
EA pin logic state: EA= 0 -; the microcontroller ignores internal program memory and
executes only the program stored in external memory. EA = 1; the microcontroller executes
first the program from built-in ROM and then the program stored in external memory.
ii. Data Memory: Data Memory is used to store data temporarily and RAM in 8051 family has
many registers such as hardware counters and timers, input/output ports, serial data buffers
etc. The first block consists of 4 banks each including 8 registers denoted by R0-R7. The next
memory block (address 20h-2Fh) is bit- addressable which means that each bit has its own
address (0-7Fh).
Since there are 16 such registers, this block contains in total of 128 bits with separate
addresses. The third group of registers occupies addresses 2Fh-7Fh.
Memory expansion

It is possible to add two external memory chips with capacity of 64Kb each. P2 and P3 I/O ports
are used for their addressing and data transmission. The first one is used for reading data from
external data memory (RAM) while the other is used for reading data from external program
memory (ROM).

Addressing modes in 8051 microcontrollers

There are two ways of addressing are used for all 8051 microcontrollers depending on which part
of memory should be accessed:

i. Direct Addressing

The address of memory location containing data to be read is specified in an instruction. The
address may contain a number being changed during operation (variable). Since the address is
only one byte in size (the largest number is 255), only the first 255 locations of RAM can be
accessed this way. The first half of RAM is available while another half is reserved for SFRs.
MOV A, 33h; Means: move a number from address 33 hex. to accumulator

ii. Indirect Addressing

A register containing the address of another register is specified in instruction. Data to be used in
the program is stored in the letter register. Indirect addressing is only used for accessing RAM
locations available for use (never for accessing SFRs). When the program encounters instruction
including “( )” sign and if the specified address is higher than 128 (7F hex.), the processor knows
that indirect addressing is used and skips memory space reserved for SFRs.

MOV A, (R0); Means: Store the value from the register whose address is in the R0 register into
accumulator

Special Function Registers (SFRs)

These are used for running and monitoring the operation of the microcontroller. Each of these
registers include has its name, address in the scope of RAM and a defined purpose such as timer
control, interrupt control, serial communication control etc.

The A Register (Accumulator)

Prior to executing an instruction upon any number or operand it is necessary to store it in the
accumulator first. All results obtained from arithmetical operations performed by the ALU are
stored in the accumulator. Data to be moved from one register to another must go through the
accumulator.
The B Register

Multiplication and division can be performed only upon numbers stored in A and B registers
The R Registers (R0-R7)

This is a name for 8 general-purpose registers (R0, R1, R2 ...R7). They occupy 4 banks within
RAM and are used for temporary storing variables and intermediate results during operation. The
active banks depend on two bits of the PSW Register. Active bank is a bank the registers of
which are currently used.

Suppose it is necessary to perform some arithmetical operations upon numbers previously stored
in the R registers: (R1+R2) - (R3+R4). A register for temporary storing results of addition is
needed. This is how it looks in the program:
MOV A,R3; Means: move number from R3 into accumulator

ADD A,R4; Means: add number from R4 to accumulator (result remains in accumulator)

MOV R5,A; Means: temporarily move the result from accumulator into R5

MOV A,R1; Means: move number from R1 to accumulator

ADD A,R2; Means: add number from R2 to accumulator

SUBB A,R5; Means: subtract number from R5 (there are R3+R4)

Program Status Word (PSW) Register

PSW register contains several status bits that reflect the current state of the CPU. This register also
contains Carry bit, Auxiliary Carry, two register bank select bits, Overflow flag, parity bit and
user-definable status flag.

P - Parity bit- if a number stored in the accumulator is even then this bit will be automatically set
(1), otherwise it will be cleared (0). It is mainly used during data transmit and receive via serial
communication.
- Bit 1. This bit is intended to be used in the future versions of microcontrollers.

OV Overflow- occurs when the result of an arithmetical operation is larger than 255 and cannot
be stored in one register. Overflow condition causes the OV bit to be set (1). Otherwise, it will be
cleared (0).

RS0, RS1 - Register bank select bits. These two bits are used to select one of four register banks
of RAM. By setting and clearing these bits, registers R0-R7 are stored in one of four banks of
RAM.
F0 - Flag 0. This is a general-purpose bit available for use.

AC - Auxiliary Carry Flagis used for BCD operations only.

CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operations and shift
instructions.

Data Pointer Register (DPTR)

It consists of two separate registers which is{DPH (Data Pointer High) and (Data Pointer Low)}.
For this reason it may be treated as a 16-bit register or as two independent 8-bit registers. Their
16 bits are primarily used for external memory addressing. The DPTR Register is used for
storing data and intermediate results.

Stack Pointer (SP) Register

A value stored in the Stack Pointer points to the first free stack address and permits stack
availability. Stack pushes increment the value in the Stack Pointer by 1. Likewise, stack pops
decrement its value by 1. Upon any reset and power-on, the value 7 is stored in the Stack Pointer.

P0, P1, P2, P3 - Input/Output Registers

If neither external memory nor serial communication system are used then 4 ports within total of
32 input/output pins are available for connection to peripheral environment. Each bit within these
ports affects the state and performance of appropriate pin of the microcontroller.