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Save trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.viuresource.com SCHEME T | | 2y Third Semester B.E. Degree Examination, Jan/Feb. 202, Computer Organization and Architecture ‘Time: 3 hrs Max. hi Note: Answer any FIVE full questions, choosing ONE fall question fy molt Modute-t 1a, With the hslp of a neat block diagram discuss the basic operayigng| Wag GPF a conte a b. Wie a program to evaluate the arithmetic statement Y= (AU By Ao + Dy using thes 2 adress, two address, one address and zero address instru (8 Nek) Write the hasie performance equation indicate the role agdgach pam in the equarion 2 a Define Addressing Mode. Explain th le (0 Manes With proper example explain Big ¢, What is performance measurement? ofbyte addressin (06 Marks) EC rating of a computer. 3a, With respect to handling interrups jf vices explain: (i) Inerruptnesting (i) Dail hod. (10 Maris) b is Bus arbitration? Explain ‘and distributed arbitration method with 1 srains. (10 Manis) OR 4a, Mlustrate a program th@re! Ine from keyboard, stored it in memory bufler ad echoes ifback to dispi@jy VO Mettaces, 10 Stari b, Discuss wih a neat gre MQagram, the genora) & bit parallel interface citowit, (Ad Marks) 5a zabit DRAM chip configured as 2M 8 (8 Maris) b. Ric the structure of synchronous DRAM (SDRAM). (08 Marka) © iypes of Read Only Memory (ROM), [04 Maris) oR Module-s lc help of logic diagram explain 4-bit cairy look adder and its operation, (19 Maris) ystrate the hardware arrangement for sequential multiplication with an example. (10 Marks) g BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Vturesource Go Green initiativeSave trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.viuresource.com oR Draw the single bus architeenure and explain the control sequence for ex instruction ADD (R3), RI b. With neat sketches, explain the detailed 0 sanization of hardwired control unit. Modute-5, 1. With a suitable example explain the concept of pipeline processing. b. Draw and explain pipeline for floating point addition and subtraction, @ oR 1. With the help of flowchart and timing diagram explain four sey Pipeline (0 Mares b. Explain the organization of SIMD array processor with an apprdriate dram. (10 Marks) S S + « BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Vturesource Go Green initiative
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