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BRT 21

The BRT21, BRT22, BRT23 product family consists of optocouplers with the following key features: 1. They contain an optically coupled GaAs IRLED to a photosensitive thyristor system with integrated noise suppression and zero crossing circuit. 2. They enable low trigger currents of 1.2 mA and feature a high dV/dt ratio of greater than 10 kV/μs and load voltages up to 800 V. 3. They are designed to isolate low voltage logic from high voltage 120 VAC, 240 VAC, and 380 VAC lines and control resistive, inductive, or capacitive AC loads.

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0% found this document useful (0 votes)
43 views9 pages

BRT 21

The BRT21, BRT22, BRT23 product family consists of optocouplers with the following key features: 1. They contain an optically coupled GaAs IRLED to a photosensitive thyristor system with integrated noise suppression and zero crossing circuit. 2. They enable low trigger currents of 1.2 mA and feature a high dV/dt ratio of greater than 10 kV/μs and load voltages up to 800 V. 3. They are designed to isolate low voltage logic from high voltage 120 VAC, 240 VAC, and 380 VAC lines and control resistive, inductive, or capacitive AC loads.

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BRT21, BRT22, BRT23

www.vishay.com
Vishay Semiconductors
Optocoupler, Phototriac Output, Zero Crossing
FEATURES
• Low trigger current IFT = 1.2 mA
• ITRMS = 300 mA
A 1 6 MT2 • High static dV/dt 10 000 V/μs
• Load voltage = 800 V
C 2 5 NC • Zero voltage crossing detector
• Material categorization:
NC 3 ZCC* 4 MT1 for definitions of compliance please see
www.vishay.com/doc?99912
*Zero crossing circuit
APPLICATIONS
• Industrial controls
• Office equipment
23128
• Consumer appliances
LINKS TO ADDITIONAL RESOURCES
AGENCY APPROVALS
• UL 1577
Related Models • cUL 1577
Documents
• DIN EN 60747-5-5 (VDE 0884-5) available with option 1
DESCRIPTION
The BRT21, BRT22, BRT23 product family consists of an
optically coupled GaAs IRLED to a photosensitive thyristor
system with integrated noise suppression and zero crossing
circuit.
The thyristor system enables low trigger currents of 1.2 mA
and features a dV/dt ratio of greater than 10 kV/μs and load
voltages up to 800 V.
The BRT21, BRT22, BRT23 product family is a perfect
microcontroller friendly solution to isolate low voltage logic
from high voltage 120 VAC, 240 VAC, and 380 VAC lines and
to control resistive, inductive, or capacitive AC loads like
motors, solenoids, high power thyristors, or TRIACs and
solid-state relays.

ORDERING INFORMATION
DIP-6 Option 6

B R T 2 # x - X 0 # # T
7.62 mm 10.16 mm

Option 7 Option 8 Option 9


PART NUMBER PACKAGE OPTION TAPE AND
REEL 9.27 mm
> 0.7 mm > 0.1 mm

VDRM (V)
AGENCY CERTIFIED / PACKAGE
≤ 400 ≤ 600 ≤ 800
UL IFT = 2 mA IFT = 1.2 mA IFT = 2 mA IFT = 1.2 mA IFT = 2 mA
DIP-6 BRT21H BRT22F BRT22H BRT23F BRT23H
DIP-6, 400 mil, option 6 - - - BRT23F-X006 -
SMD-6, option 7 - BRT22F-X007T BRT22H-X007T (1) BRT23F-X007T BRT23H-X007T (1)
SMD-6, option 9 - BRT22F-X009T - BRT23F-X009T -
UL, VDE IFT = 2 mA IFT = 1.2 mA IFT = 2 mA IFT = 1.2 mA IFT = 2 mA
DIP-6 - BRT22F-X001 - - BRT23H-X001
DIP-6, option 6 - - BRT22H-X016 - BRT22H-X016
SMD-6, option 7 - - BRT22H-X017T - -
SMD-6, option 8 - - - - BRT23H-X018T
Note
(1) Also available in tube, do not put T on the end

Rev. 2.0, 18-Nov-2020 1 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors

ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)


PARAMETER TEST CONDITION PART SYMBOL VALUE UNIT
INPUT
Reverse voltage IR = 10 μA VR 6 V
Forward current IF 60 mA
Surge current IFSM 2.5 A
Power dissipation Pdiss 100 mW
Derate from 25 °C 1.33 mW/°C
OUTPUT
BRT21 VDRM 400 V
Peak off-state voltage BRT22 VDRM 600 V
BRT23 VDRM 800 V
On state RMS current ITRM 300 mA
Single cycle surge current 3 A
Power dissipation Pdiss 600 mW
Derate from 25 °C 6.6 mW/°C
COUPLER
Storage temperature range Tstg -40 to +150 °C
Ambient temperature range Tamb -40 to +100 °C
Max. ≤ 10 s dip soldering
Soldering temperature Tsld 260 °C
≥ 0.5 mm from case bottom
Note
• Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. Functional operation of the device is not
implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute
maximum ratings for extended periods of the time can adversely affect reliability

Rev. 2.0, 18-Nov-2020 2 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors

ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)


PARAMETER TEST CONDITION PART SYMBOL MIN. TYP. MAX. UNIT
INPUT
Forward voltage IF = 10 mA VF - 1.16 1.35 V
Reverse current VR = 6 V IR - 0.1 10 μA
Capacitance f = 1 MHz, VF = 0 V CO - 25 - pF
Thermal resistance, junction to ambient RthJA - 750 - K/W
OUTPUT
BRT21 - 400 -
Peak off-state voltage ID(RMS) = 100 μA BRT22 VDM - 600 - V
BRT23 - 800 -
Off-state current VD = VDRM, Tamb = 100 °C, IF = 0 mA ID(RMS) - 10 100 μA
On-state voltage IT = 300 mA VTM - 1.7 3 V
On-state current PF = 1, VT(RMS) = 1.7 V ITM - - 300 mA
Surge (non-repetitive), on-state current f = 50 Hz ITSM - - 3 A
ΔIFT1/ΔTj - 7 14 μA/K
Trigger current temp. gradient
ΔIFT2/ΔTj - 7 14 μA/K
Inhibit voltage temp. gradient ΔVDINH/ΔTj - -20 - mV/K
Off-state current in inhibit state IF = IFT1, VDRM IDINH - 50 200 μA
Holding current IH - 65 500 μA
Latching current VT = 2.2 V IL - 5 - mA
Zero cross inhibit voltage IF = rated IFT VIH - 15 25 V
OUTPUT (continued)
Turn-on time VRM = VDM = VD(RMS) ton - 35 - μs
Turn-off time PF = 1, IT = 300 mA toff - 50 - μs
VD = 0.67 VDRM, Tj = 25 °C dV/dtcr 10 000 - - V/μs
Critical rate of rise of off-state voltage
VD = 0.67 VDRM, Tj = 80 °C dV/dtcr 5000 - - V/μs
VD = 230 VRMS,
dV/dtcrq - 8 - V/μs
Critical rate of rise of voltage at ID = 300 mARMS, Tj = 25 °C
current commutation VD = 230 VRMS,
dV/dtcrq - 7 - V/μs
ID = 300 mARMS, Tj = 85 °C
Critical rate of rise of on-state at VD = 230 VRMS,
dI/dtcrq - 12 - A/ms
current commutation ID = 300 mARMS, Tj = 25 °C
Thermal resistance, junction-to-ambient RthJA - 125 - K/W
COUPLER
Critical rate of rise of coupled
IT = 0 A, VRM = VDM = VD(RMS) dVIO/dt - 10 000 - V/μs
input / output voltage
Common mode coupling capacitance CCM - 0.01 - pF
Capacitance (input to output) f = 1 MHz, VIO = 0 V CIO - 0.8 - pF
VD = 5 V, F - versions IFT - - 1.2 mA
Trigger current
VD = 5 V, H - versions IFT - - 2 mA
Note
• Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are the result of engineering
evaluation. Typical values are for information only and are not part of the testing requirements

Rev. 2.0, 18-Nov-2020 3 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors

SAFETY AND INSULATION RATINGS


PARAMETER TEST CONDITION SYMBOL VALUE UNIT
Climatic classification According to IEC 68 part 1 40 / 100 / 21
Pollution degree According to DIN VDE 0109 2
Comparative tracking index Insulation group IIIa CTI 175
Maximum rated withstanding isolation voltage According to UL1577, t = 1 min VISO 4420 VRMS
Tested withstanding isolation voltage According to UL1577, t = 1 s VISO 5300 VRMS
Maximum transient isolation voltage According to DIN EN 60747-5-5 VIOTM 6000 Vpeak
Maximum repetitive peak isolation voltage According to DIN EN 60747-5-5 VIORM 630 Vpeak
VIO = 500 V, Tamb = 25 °C RIO ≥ 1012 Ω
Isolation resistance
VIO = 500 V, Tamb = 100 °C RIO ≥ 1011 Ω
Output safety power PSO 200 mW
Input safety current ISI 400 mA
Input safety temperature TS 175 °C
Creepage distance DIP-6; SMD-6, option 7; ≥7 mm
Clearance distance SMD-6 option 9 ≥7 mm
Creepage distance ≥8 mm
DIP-6, option 6; SMD-6, option 8
Clearance distance ≥8 mm
Insulation thickness DTI ≥ 0.4 mm
Note
• As per IEC 60747-5-5, § 7.4.3.8.2, this optocoupler is suitable for “safe electrical insulation” only within the safety ratings. Compliance with
the safety ratings shall be ensured by means of protective circuits

POWER FACTOR CONSIDERATIONS


A snubber is not needed to eliminate false operation of the
TRIAC driver because of the high static and commutating 1
Cs (µF) = 0.0032 (µF) x 100.0066 IL (mA)
Cs - Shunt Capacitance (µF)

dV/dt with loads between 1.0 and 0.8 power factors. When
inductive loads with power factors less than 0.8 are being
driven, include a RC snubber or a single capacitor directly 0.1
across the device to damp the peak commutating dV/dt
spike. Normally a commutating dV/dt causes a turning-off
device to stay on due to the stored energy remaining in the
turning-off device. 0.01

But in the case of a zero voltage crossing optotriac, the


Tamb = 25 °C, PF = 0.3,
commutating dV/dt spikes can inhibit one half of the TRIAC IF = 2.0 mA
from turning on. If the spike potential exceeds the inhibit 0.001
voltage of the zero cross detection circuit, half of the TRIAC 0 50 100 150 200 250 300 350 400
will be heldoff and not turn-on. This hold-off condition can iil410_01 IL - Load Current (mARMS)
be eliminated by using a snubber or capacitor placed
directly across the optotriac as shown in figure 1. Note that
Fig. 1 - Shunt Capacitance vs. Load Current
the value of the capacitor increases as a function of the load
current.
The hold-off condition also can be eliminated by providing a
higher level of LED drive current. The higher LED drive
provides a larger photocurrent which causes the
phototransistor to turn-on before the commutating spike
has activated the zero cross network. Figure 2 shows the
relationship of the LED drive for power factors of less than
1.0. The curve shows that if a device requires 1.5 mA for a
resistive load, then 1.8 times 2.7 mA) that amount would be
required to control an inductive load whose power factor is
less than 0.3.

Rev. 2.0, 18-Nov-2020 4 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

2.0 150
IFth normalized to IFth at PF = 1.0,
1.8 Tamb = 25 °C

LED - LED Power (mW)


NIFth - Normalized LED
Trigger Current

1.6 100

1.4

1.2 50

1.0

0.8 0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 -60 -40 -20 0 20 40 60 80 100
iil410_02 PF - Power Factor iil410_05 Tamb - Ambient Temperature (°C)

Fig. 2 - Normalized LED Trigger Current vs. Power Factor Fig. 5 - Maximum LED Power Dissipation

1.4 103
5
ITM - On-State Current (mA)
1.3
VF - Forward Voltage (V)

Tamb = -55 °C
Tj = 25 °C
1.2
100 °C IT = f(VT),
Tamb = 25 °C 102
1.1 Parameter: Tj
5
1.0
101
0.9 Tamb = 85 °C
5
0.8

0.7
100
0.1 1 10 100 0 1 2 3 4
iil410_03 IF - Forward Current (mA) iil410_06 VTM - On-State Voltage (V)

Fig. 3 - Forward Voltage vs. Forward Current Fig. 6 - Typical Output Characteristics

10 000 400
τ
If(pk) - Peak LED Current (mA)

ITRMS = f(VT),
Duty Factor RthJA = 150 K/W
0.005 300 Device switch
1000 0.01 t soldered in PCB
0.02
ITRMS (mA)

or base plate
0.05
0.1 DF = τ/t 200
0.2
100 0.5
100

10 0
10-6 10-5 10-4 10-3 10-2 10-1 10 0 101 0 20 40 60 80 100
iil410_04 t - LED Pulse Duration (s) iil410_07 Tamb - Ambient Temperature (°C)

Fig. 4 - Peak LED Current vs. Duty Factor, τ Fig. 7 - Current Reduction

Rev. 2.0, 18-Nov-2020 5 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors

400 0.6
40 Hz to 60 Hz
0.5 Line operation,
300 Ptot = f (ITRMS)
0.4
ITRMS (mA)

Ptot (W)
200 0.3

0.2
ITRMS = f(TPIN5), RthJ-PIN5 = 16.5 K/W
100 Thermocouple measurement must
be performed potentially separated 0.1
to A1 and A2. Measuring junction
as near as possible at the case.
0 0
50 60 70 80 90 100 0 100 200 300
iil410_08 TPIN5 (°C) iil410_11 ITRMS (mA)

Fig. 8 - Current Reduction Fig. 11 - Power Dissipation 40 Hz to 60 Hz Line Operation

103 12
Tj = 25 °C
tgd = f (IF/IFT 25 °C), VD = 200 V V Tj = 100 °C
f = 40 to 60 Hz, Parameter: Tj 10

VDINH min. (V)


8
fgd (µs)

102
Tj = 25 °C VDINH min = f (IF/IFT25°C),
5 Tj = 100 °C 6 parameter: Tj
Device zero voltage
switch can be triggered
only in hatched are
4 below Tj curves.

101
100 5 101 5 102 100 5 101 5 102
iil410_09 IF/IFT25 °C iil410_12 IF/IFT25 °C

Fig. 9 - Typical Trigger Delay Time Fig. 12 - Typical Static Inhibit Voltage Limit

103

Tj = 25 °C
100 °C 1 6
102
IDINH (µA)

5 2 5
0.1 µF 220 V~

101 3 4
5 IDINH = f (IF /IFT 25 °C),
VD = 600 V, Parameter: Tj

100
0 2 4 6 8 10 12 14 16 18 20 iil410_13
iil410_10 IF/IFT25 °C

Fig. 10 - Typical Inhibit Current Fig. 13 - Apply a Capacitor to the Supply Pins at the Load-Side

Rev. 2.0, 18-Nov-2020 6 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors

33 Ω 500 µH

1 6 1 6

2 5
22 nF 220 V~ 2 5
22 nF 220 V~

3 4
3 4

iil410_14 iil410_15

Fig. 14 - Connect a Series Resistor to the Output and Bridge Fig. 15 - Connect a Choke of Low Winding Cap. in Series,
Both by a Capacitor e.g., a Ringcore Choke, with Higher Load Currents

TECHNICAL INFORMATION
See Application Note for additional information.

PACKAGE DIMENSIONS in millimeters


3 2 1 pin one ID

6.4 ± 0.1
ISO method A

4 5 6 9.78 ± 0.25

8.6 ± 0.1
7.62 ref.

1 min. 1.27 ± 0.05


0.1755 ± 0.0735
0.30 typ.
3.555 ± 0.255

4° typ.
15° max.
0.84 typ. 0.765 ± 0.255
0.485 ± 0.025
0.84 typ.

2.54 typ. 17222

Option 6 Option 7 Option 8 Option 9

7.62 typ. 7.62 typ. 7.62 typ. 10.3 max.


7.62 typ.

3.5 ± 0.3 0.7 min. 0.25 ± 0.1 3.5 ± 0.3 0.1 ± 0.1 3.6 ± 0.3
4.3 ± 0.3
0.1 min.
8 min. 0.6 min. 9.27 min.
2.55 ± 0.25
10.3 max. 12.1 max. 0.6 min. 8 min.
10.16 typ. 20802-40

PACKAGE MARKING (example)

BRT22H

V YWW 68

Fig. 16 - Example of BRT22H-X017


Notes
• “YWW” is the date code marking (Y = year code, WW = week code)
• VDE logo is only marked on option 1 parts
• Tape and reel suffix (T) is not part of the package marking

Rev. 2.0, 18-Nov-2020 7 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BRT21, BRT22, BRT23
www.vishay.com
Vishay Semiconductors
SOLDER PROFILES
Axis Title Axis Title
300 10000 300 10000
5s
Lead temperature Max. 260 °C
250 250 255 °C
235 °C to 245 °C
240 °C
260 °C Second Full line: typical
wave 217 °C
First wave Dotted lines:
Temperature (°C)

Temperature (°C)
200 process limits 1000 200 1000
Max. 30 s

2nd line

2nd line
2nd line

2nd line
ca. 2 K/s

1st line

1st line
ca. 200 K/s
150 150
100 °C to
130 °C Max. 120 s Max. 100 s
100 100 100 100
Max. ramp down 6 °C/s
2 K/s ca. 5 K/s
50 50 Max. ramp up 3 °C/s
Forced cooling

0 10 0 10
0 50 100 150 200 250 0 50 100 150 200 250 300
948626 Time (s) 19841 Time (s)

Fig. 17 - Wave Soldering Double Wave Profile Fig. 18 - Lead (Pb)-free Reflow Solder Profile
According to J-STD-020 for DIP Devices According to J-STD-020 for SMD Devices

HANDLING AND STORAGE CONDITIONS


ESD level: HBM class 2
Floor life: unlimited
Conditions: Tamb < 30 °C, RH < 85 %
Moisture sensitivity level 1, according to J-STD-020

Rev. 2.0, 18-Nov-2020 8 Document Number: 83690


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Vishay
Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
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Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.

Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and
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© 2023 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED

Revision: 01-Jan-2023 1 Document Number: 91000

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