Lecture12 Serial IO
Lecture12 Serial IO
Serial Input/Output,
8251 USART
Topics
Serial Input/Output Interfacing
8251 USART Chip
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Serial Input/Output Interfacing
Serial communication between interface devices requires one wire.
Bits are transferred one at a time.
There are two types of serial transfer:
Synchronous serial transfer
Sender Receiver
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Synchronous and Asynchronous
Serial Transfer
The following methods can use both synchronous and
asynchronous serial transfer.
The transfer configuration is done by using a control command.
They are generally used for communication with a computer.
USART (Universal Synchronous Asynchronous Receiver-Transmitter)
USB (Universal Serial Bus)
data bits to make the sum of all the data bits, including the
checking bit itself.
Parity bit can be either odd (1) or even (0).
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Asynchronous Transfer Rules
for a Frame
When a character is not being sent, the transmisson line
is kept in the logical 1 state.
Character transmission is detected from the start bit (0).
Information bits follow the start bit.
Transmitter calculates the parity bit (0 or 1) and transmits it.
One or two stop bits are sent.
1 1 0 0 0 1 0 1 0 1 1
Data
(8 b ts)
Par ty b t Stop b ts
Start b t
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Example Table for Baud Rates
The followings are some of the commonly used standard
transmission rates (Baud speeds) in serial communication.
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QUESTIONS
1) Calculate how many mili seconds one bit should stay on the line.
(Bit Rate)
2) Calculate how many mili seconds one frame should stay on the line.
(Data Rate)
3) Calculate how many frames can be transferred in one second.
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Example: Calculating Bit Rate and Data Rate
ANSWERS
1) Bit Rate calculation:
Time for one bit is = 1/19200 seconds
= 0.00005 seconds
= 0.00005 * 103 mili seconds
= 0.05 mili seconds
Topics
Serial Input/Output Interfacing
8251 USART Chip
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8251 Universal Synchronous Asynchronous
Receiver Transmitter (USART)
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Intel 8251 Universal Synchronous Asynchronous Receiver
Transmitter (USART) is an interface chip for serial communication.
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Used between microprocessor and peripheral device to transmit
serial data into parallel form and vice versa.
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Takes data serially from peripheral devices (outside devices) and
converts into parallel data. After converting the data into parallel
form, it transmits data to microprocessor (8086 CPU).
●
Receives parallel data from microprocessor and converts it into
serial form. After converting data into serial form, it transmits serial
data to outside device (peripheral).
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8251 USART Pins
8251
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8251 Functional Block Diagram
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Pin Functions
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Data Bus : Bi-directional, tri-state, 8-bit Data Bus.
Pins allow transfer of bytes between the CPU and the 8251.
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RD (Read) : A low on this input allows the CPU to read data or
status bytes from 8251
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WR (Write) : A low on this input allows the CPU to write data
or command word to the 8251.
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CLK (Clock) : The CLK input is used to generate internal device
timing.
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RESET : A high on this input forces the 8251 into an “idle” mode.
The device will remain at “idle” until a new set of control words
is written into the 8251.
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C/D (Control /Data) : The input in conjuction with the WR and RD
inputs, informs the 8251 that the word on the Data Bus is either
a data character control word or status information.
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Pin Functions
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8251 Registers
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The 8251 USART chip contains three registers (each 8 bits):
Data buffer register
Control register
Status register
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Control Register
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The 8251 chip is configured by Control Word Register.
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Control register is divided into two bytes:
The first byte corresponds to Mode Instruction format.
The second byte corresponds to Command Instruction format.
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The content of control word register determines followings.
Synchronous or asynchronous operation.
Baud rate
Number of bits per character
Number of stop bits
Type of parity
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Mode Instruction
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Mode instruction is used for setting the function of 8251.
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Writing of a control word after resetting is recognized as a
“mode instruction.”
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Items set by mode instruction are as follows:
Synchronous / Asynchronous mode selection
(If D0=0 and D1=0, then mode is Synchronous.)
(Otherwise, mode is Asynchronous.)
Stop bit length (Asynchronous mode only)
Character length (number of bits)
Parity bit
Baud rate factor (Asynchronous mode only)
Internal/external synchronization (Synchronous mode only)
Number of synchronous characters (Synchronous mode only)
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Bit Configuration of Mode Instruction
(Asynchronous)
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Bit Configuration of Command
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Modem Control Signals
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DSR (Data Set Ready) : The input signal is used to test modem
conditions such as Data Set Ready.
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DTR (Data Terminal Ready) : The output signal is used to tell
modem that Data Terminal is ready.
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RTS (Request to Send ) : The output signal is asserted to begin
transmission.
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CTS (Clear to Send) : A low on the input enables the 8251 to
transmit serial data if the TxE bit in the command byte is set to 1.
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Transmitter Signals
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TxD (Transmit Data) : The output signal outputs a composite serial
stream of data on the falling edge of TxC.
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TxRDY (Transmitter Ready) : The output signal indicates the CPU
that the transmitter is ready to accept a data character.
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TxE (Transmitter Empty) : The output signal indicates that the
transmitter has no character to transmit.
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TxC (Transmitter Clock) : The clock input controls the rate at which
the character is to be transmitted.
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Receiver Signals
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RxD (Receiver data) : The input receives a composite serial
stream of data on the rising edge of RxC.
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RxRDY (Receiver Ready) : The output indicates that the 8251
contains a character that is ready to be input to the CPU.
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RxC (Receiver Clock) : The clock input controls the rate at which
the character is to be received.
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RX and TX:
Serial device such
as ASCII Terminal
(Display monitor &
Keyboard)
8086
CPU
RX clock and TX clock:
From pulse generator
chip or timer chip
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USART and Serial Device Connections
●
The following diagram shows connections between 8251
USART chip and a serial device such as an ASCII screen.
8251 Serial
USART Device
chip
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Example: Application Program
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Suppose register addresses of 8251 USART are as follows.
Data register address : 00h
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Write a 8086 Assembly program to do followings.
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Set the 8251 USART chip with specifications below.
Mode : Asynchronous
Parity: Even
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Send the characters in a string variable, to the 8251 data port.
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Asynchronous Mode
Bit Configuration
Hex
D7 D6 D5 D4 D3 D2 D1 D0
Value
1 1 1 1 1 1 0 1
Character FDh
2 Stop Even Parity Baud Rate
Length is
Bits Enabled is 1 Kbps
8 Bits
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Command Word
for Transmission
Hex
D7 D6 D5 D4 D3 D2 D1 D0
Value
0 0 0 0 0 0 0 1
01h
EH IR RTS ER SBRK RxE DTR TxEN
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Program
;8251 USART chip port (register) addresses:
DATA_PORT EQU 00h
KONTROL_PORT EQU 02h
.model small
.data
Cumle DB 'Testing' ; String to send
.code
Part1 BASLA PROC
.STARTUP
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