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Week 4 - Digital Logic Design Lab Term2310

This document provides the objectives and tasks for a lab assignment on designing combinational logic circuits. The tasks involve constructing truth tables, deriving Boolean expressions, simplifying expressions using Karnaugh maps or Boolean algebra, and drawing logic diagrams using gates. The first task is to design a 3-input minority circuit and implement it using OR-AND gates and NAND gates. The second task is to design a 4-input majority circuit and implement it using different gate types. The third task is to design a circuit that outputs 1 if the decimal number represented by 4 inputs is prime.

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1221108557
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53 views

Week 4 - Digital Logic Design Lab Term2310

This document provides the objectives and tasks for a lab assignment on designing combinational logic circuits. The tasks involve constructing truth tables, deriving Boolean expressions, simplifying expressions using Karnaugh maps or Boolean algebra, and drawing logic diagrams using gates. The first task is to design a 3-input minority circuit and implement it using OR-AND gates and NAND gates. The second task is to design a 4-input majority circuit and implement it using different gate types. The third task is to design a circuit that outputs 1 if the decimal number represented by 4 inputs is prime.

Uploaded by

1221108557
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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DSN5101 Computer Architecture and Organization

LAB A-04 Design of Combinational Logic Circuits

Objectives

1. To design and implement the combinational logic circuits based on the given problem statements by

a) Forming the Truth Table


b) Obtain the corresponding Boolean expression and simplify using Karnaugh map / Boolean
algebra techniques
c) Drawing the logic diagram with the simplified Boolean expression
d) Verify the truth table by implementing the logic diagram with necessary logic gates
(use circuitverse).

Tasks

Laboratory and report

The following question has to be completed in the laboratory and a report has to be submitted.

1. Design a combinational logic circuit for 3-input minority circuit. Assume that a minority circuit is one which
produces a HIGH (1) when two or more inputs are LOW (0).
i. Construct the truth table.
ii. Obtain a Boolean expression for the above table.
Simplify the Boolean expression into product-of-sums (POS) form and sum-of-products (SOP)
form using Boolean Algebra Techniques / Karnaugh map.
iii. Construct the logic diagram using OR-AND gate network and verify the circuit
experimentally.
iv. Construct the logic diagram using only NAND gates and verify the circuit experimentally.

Report only

Only Report has to be submitted for the following questions:


2. Design a combinational logic circuit for 4-input majority circuit. A majority circuit is one which produces a
HIGH (1) output when three or more inputs are HIGH (1).

i. Construct the truth table and simplify the Boolean expression into SOP and POS forms using
K-map.
ii. Construct the logic diagram using AND-OR gate network with simplified SOP expression.
iii. Construct the logic diagram using OR-AND gate network with simplified POS expression.
iv. Construct the logic diagram using only NAND gates with simplified SOP expression.
v. Construct the logic diagram using only NOR gates with simplified POS expression.

3. A combinational logic circuit has four inputs and one output. The output is 1 if and only if the decimal number
represented by the inputs in binary code is a prime number.

i. Construct the truth table and simplify the Boolean expression into POS form using K-map.
ii. Construct the logic diagram using OR-AND gate network with simplified POS expression
iii. Construct the logic diagram using only NOR gates with simplified POS expression.

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