Philips Chassis 3a Circuit Description
Philips Chassis 3a Circuit Description
Circuit Description
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Description des cicuits Schaltungsbeschreibung Kredsl0bsbeskrivelse Kretsbeskrivelse Kretsbeskrivning Toimintaselostus Descrizione del circuito Description delcircuito
Subject to moditication
(GB) 4822 727 15959 Pubushedby
^ ^ . ^ Service Consumer Electronics
Printed in The Netherlands
° Copyright reserved
Page Page
CS 10 327
Page
O
NOTE:
O THIS CIRCUIT-DESCRIPTION IS NOT SUPPLIED WITH ELECTRICAL DIAGRAMS
USE THE SERVICE MANUAL CHASSIS 3A CHAPTER IV FOR THESE DIAGRAMS.
O
O
O
O CS 10 328
CHAPTER 1 BLOCK DIAGRAM
Chassis 3A consists of a main panel, U1000, which e.The RGB signals coming from the MSD are sent to the
houses several units and modules, a control panel, U I 0 0 8 , picture tube via the RGB amplifiers on the picture tube
and a picture tube panel, U1002. On the basis of this panel (PTP), U1002. The dimensions of the picture
chassis, both monitors and receivers are produced. These tubes applied are 17", 2 1 " , 24", 27"and 33".
t w o verslons have substantially different block diagrams,
which will be discussed separately. 7.The CCT panel (CCT = computer controlled teletext),
UI 007, receives CVBS signals from the SSP and
1.1. Receiver teletext commands via the I^C bus.
A block diagram for the receiver is shown in Fig. 1.1. The teletext signals are processed into RGB signals
and, together with the fast-blanking signal, applied to
1. On the control panel, tuning takes place by means of
the MSD. Via the same way, OSD information is
frequency synthesized tuning (FST). The CDP (control
brought on the screen. The information for the OSD
and display panel, UI 008) houses two
comes from microcomputer 2. The CCT generates
microcomputers.
STTV pulses itself (STTV = synchronization to TV).
Microcomputer 1, IC7831, controls all linear functions
These synchronized pulses are sent to the sync switch.
and tuning. Microcomputer 2, IC7830, takes care of the
It is now possible to generate OSD without a
OSD (on screen display), senses the local keyboard
transmitter with well-defined sync pulses being
and captures the RC5 coded remote control
received.
commands.
The communication between the t w o microcomputers
8.The sync switch chooses between CVBS and STTV and
takes place via the I^C bus. The FC bus also arranges
sends these pulses to the sync processor. This IC
the communication with all the ICs connected t o this
contains the line oscillator and controls the line output
bus. The tuning voltage and the control voltages for
stage.
brightness, contrast and colour saturation are provided
by the C I T A C - I C (CITAC = computer Interface for Frame synchronizing pulses are sent t o the geometry
tuning and analog control). processor. The geometry processor receives, via the
I^C bus, the geometry parameters from microcomputer
A memory IC (on UI 000) stores the information of the
1. Horizontal frequency and horizontal centring are sent
preselected programs and the values of the geometry
to the sync processor, the other parameters (picture
settings. The CDP, U I 0 0 8 , accommqdates the external
height, picture width, etc.) are processed in the
3 and 4 terminal sockets for CVBS and sound (L and
geometry processor. The geometry processor controls
R), (CVBS = colour, video, blanking & synchronization).
the frame output stage and the East-West modulator.
The record select switch, which selects either the TV
A line output stage and a frame output stage control the
signal, or the euroconnector 1 (EXT 1) signal or the
deflection coils. The line output stage provides the main
front (= external 3/4) signal for euroconnector 2 (EXT
voltages (EHT and focus) and a few other supply
2), is also accommodated on the CDP.
voltages.
2. The channel selector, U1017, and the IF unit, U1018, or
9.The power supply Is of the type SOPS (=
combined in a f r o n t - e n d , UI 016, applies video and
self-oscillating power supply) with overvoltage
sound signals (AM or FM) t o the source select panel,
protection that can be activated by 5 different circuits.
U1001.
The s t a n d - b y voltage for the microcomputers is also
provided by the SOPS.
3. The source select panel (SSP), UI 0 0 1 , contains the FM
demodulators for PAL B, G and SECAM B, G signals
and the stereo decoder. For NTSC M signals the FM lO.There are 3 different verslons of chassis 3A, each
demodulation is carried out on the main panel (MCP = having a different type of sound output:
mono carrier panel), UI 000. The low-frequency signals 1 . M atch line:
go t o the source select panel which switches the The sound signals from the PAS are passed on, via the
selected source through to the output amplifiers. The sound output panel (SOP), UI 004, to external
LF signals also go t o EXT 1 and, via the record select loudspeakers or, via series resistors on the mains filter
switch, to EXT 2. At the same time as the sound signals panel (MFP), U1011, to the internal loudspeakers.
the CVBS signal is switched for the chrominance and
luminance channel and for EXT 2. The change-over is 2. Video Housing Project (VHP):
controlled via the I^C bus. The sound signals from the PAS go directly outside via
the SOP. There are no loudspeakers in the set.
4. Depending on the type of set, the input signal for the
sound output amplifier PAS (= power amplifier sound), 3. HIFI:
U I 0 0 3 , is supplied either by the SSP, UI 001, or by the The sound signals from the PAS go t o the built-in
equalizer, U1015. loudspeaker boxes. The full power can now be
The PAS contains an I^C bus-controlled amplifier in presented to these internal loudspeakers. There are no
which all controls take place. The control amplifier has terminal sockets for external loudspeakers.
an output for the headphone amplifiers which are The t w o headphone amplifiers are accommodated on
available on the CDP and an output for the output the CDP.
amplifiers on the PAS.
a. E a c h time a program or channel is selected, the Y Y Y Y Y is the name given to the input, e.g. V C R . T h e
following indications will light up for 3 s ec onds in the program to which the T V is tuned appears on the right,
right-hand top corner of the screen: possibly with the sound mode.
PR XXXXX or CH .. (without a name)
f. Finally, after pressing the search button, the indication
Sound mode sound mode
" S E A R C H " appears at the bottom of the picture. T h e s e
characters are green in system O or 1 and red in the
T h e program ( P R ) is written in one or two digits,
other Systems (see table).
followed by a name of maximum 5 characters (e.g.
A B C 1) that h a s been given to that program. T h e The ascending channel (CH) number appears at
channel (CH) is always indicated by 2 or 3 digits and topright. If the microcomputer carries out a function
has no name. T h e sound select mode : stereo, that lasts a relatively long time, e.g. erasing a P R name
language I or language II (dual I or dual II). in the memory, a magenta band appears in the picture
which becomes longer to indicate that the
microcomputer has understood the command and is
b. When the DISPLAY key + is actuated, the
busy carrying it out.
above-mentioned display functions remain visible on
the screen. If now a linear function is controlled, this
function appears on the screen a s a coloured band. In the table a survey is given of the system numbers
When the green key is actuated, all personal preference and the type of set:
values for the linear controls become visible a s
programmed. TYPE SYSTEMO SYSTEM 1 SYSTEM2 SYSTEM3
c. If the display button is pressed for more than 2 BGLM PAL B,G SECAM L NTSC M
SECAM B,G
seconds, 6 linear functions will appear on the screen. NTSC 4.43
BGLL'I SECAM L PAL B,G PAL!
Function Colour of the bar SECAM L' SECAM B,G
NTSC 4.43
Colour saturation COL magenta
Brightness BRI cyan UHF only PAL!
Treble TRE blue BGLM/DK PAL B,G SECAM L NTSC M SECAM D,K
Bass BAS red SECAM B,G
Balance BAL black stripe NTSC 4.43
PR CH NAME PRCHNAME
01 43 BCDE
C S 10 332
2.1.2 Remote-control A 3-position switch controls the "record select" so that the
T h e control system m a k e s use of the R C 5 - c o d e d selected input (or T V ) is switched through to E X T 2.
remote-control commands. T h e R C 5 code complies with
a Standard bit pattern (Fig. 2.1 and Fig. 2.2). T h e A mono-stereo button is present.
remote-control units used are R C 5 5 4 0 , R C 5 5 4 1 and
RC5545. All receivers have a S Y S T E M key which can switch on the
following 3 systems:
- For switching the set on from s t a n d - b y , it is possible to
SYSTEM
choose between E X T 1 , E X T 2 or the T V mode key or
one of the program keys. T h e linear functions come on European muiti:
in the preferred settings. T h e m o n o - s t e r e o and spatial B,G CCIR: PAL B,G; SECAM B,G O
modes come through a s they were when the set w a s L French Standard ; SECAM L 1
switched off. T h e remaining functions come on a s non M NTSC M 2
crispening and language I.
French muIti:
B,G CCIR: PAL B,G; SECAM B,G O
- Program selection. L,L' French Standard; SECAM L,L' 1
Programs P R O to 9 can be selected directly. By I English Standard; PAL I 2
pressing key - / — , P R 00 to 90 can be chosen.
Pressing key - / — once more returns to a one-digit Mono UK:
program number. I CCIR: PAL I
T h e local keyboard houses a C / P key, a C P + and C P - k e y , P r e s s E N T E R . Now the second cnaracter can be entered.
with which the next or previous program or channel In this way all 5 characters are entered. T h e E N T E R key
number can be selected. If after program 9 the C P + key is must also be pressed after the 5th character, followed by
pressed, or after program O the C P - key, the system the S T O R E E X E C U T E key.
changes over to two-digit information. When keys A and Z are pressed at the same time, the
Source selection: depending on the version there are 2 or name is replaced by *****. T h e name disappears from the
4 external inputs/outputs in addition to the normal T V display and from the transmitter name index when it is
mode. T h e Matchline sets have 4 external terminal stored in the memory through pressing of the S T O R E
sockets (2x euroconnector, 2x 3 C I N C H plugs); the E X E C U T E key. When after S T O R E O P E N , S T O R E
HiFi/VHP sets only have 2 external terminal sockets (2x E X E C U T E is pressed on a program that has not been
euroconnector). designated yet, s p a c e s are entered and the program and
channel are written on the transmitter name index.
START START BITS SYSTEM BITS COMMAND BITS
4 »
SCAN
TIME
NOlSE
r DATA PACKAGE
SUPRESSING
Fig. 2.1
MDAOOlt
T32/727
Fig. 2.2
C S 10 333
8
By selecting a value for adjustment number 12, the Note: When, by changing the value of adjustment number
software of the set is made fit for the possibilities of a 12, the software of the set h a s been made fit for another
given T V s y s t e m . T h e following possibilities are p r e s e n t : T V system, that does not mean that signals in accordance
with this system can be received. Often a hardware
European MuIti BGLM change is needed first; for example for the Hyp option the
set should be equipped with a special hyperband channel
TXT SWISS HYP IF39.5 OPTION selector.
00
X 04
X 08 2.1.5. | 2 C bus in 3A (Fig. 2.4)
X X 12
X 19 The principles of the I^C bus are described in appendix 3.
X X 23 - Microcomputer 2 receives R C 5 signals and keyboard
X X 27 functions and sends them on to microcomputer 1 .
X X X 31 Microcomputer 2 is responsible for the "on screen
X 32 display" function (OSD). Each time a program is
X X 36 selected, microcomputer 2 receives the channel
X X 40 number from microcomputer 1 , converts the digits into
X X X 44 A S C I I codes, fetches the program names from memory
X X 51 1 of IC7900 and sends everything to the teletext
X X X 55 decoder for the O S D function.
X X X 59 When linear functions are requested, the linear
X X X X 63 functions requested from microcomputer 1 are
converted into control characters and A S C I I codes
East European BGLM/DK (teletext) and also sent to the teletext decoder, U I 0 0 7 .
When the transmitter name index is requested, all
16 programs, channels and program names are requested
X 20 serially, converted into A S C I I codes and sent to the
X 24 teletext decoder.
X X 28
X 05 - Microcomputer 1 .
X X 21 When a program selection is made, the channel is
X X 13 fetched from memory 2 of IC7900, converted into the
X X X 29 corresponding frequency and sent to the C I T A C ,
X 48 IC7905. T h e C I T A C - I C , IC7905, will give an
X X 52 acknowledge when the channel has been tuned to and
X X 56 when a transmitter has been found. If not,
X X X X 60 microcomputer 1 switches over to microsearch. T h e 4
X X 37 linear functions brightness, colour saturation, contrast
X X X 53 and H U E are also sent, via the I^C bus, to the C I T A C - I C
X X X 45 and converted into an analog voltage.
X X X X 61 Microcomputer 1 controls the I^C bus.
G S 10 334
PRS 02335
T-26/713
Fig. 2.3
IC7905/SAB3037
Gomputer-controlled teletext.
T h e I^C bus arrivés at a microcomputer IC7750 of the
teletext decoder, U1007. This microcomputer receives
T X T commands a s well a s all A S C I I codes for O S D with
the address. T h e microcomputer of the teletext decoder
( C C T ) can also act a s a master and collect teletext page
numbers stored in memory 1 .
PRS 02334
T-26/723
Fig. 2.4
2.1.6. Microcomputer 2
The microcomputer applied is of the type M A B 8 4 6 1 P and
has the program code W050 (Mask programmed). Part of
the program of microcomputer 2 controls the sensing of
the keyboard.
2M10 1008-3A
w 284;
3853 9 zyxwvutsrqponmlkjihgfedcbaZYXW
9 3854
I R TRANSM IR RECEIVER
I R . SENDER I R EMPFAENGER
TRANSM R l RICEVITORE R I
POWER ON
RESET
RIMESSA
A ZERO
SELF
RESET 11 RESET REQUEST ,
AUTO
RIMESSA
3841
I I M I _—T f12841
i22„ "12830
38_4p X 21
i33p
7 O 1830
-i*' "dol—T 4 'r4MHz
=5 33p
2831
AA h 2840
DATA
I -J AA,
3839 X 2C PROC
-EMl—T
, u , h 2839
l22„
3B37
H* 1001 T
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± .c
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4 » n 2837
!^;2r.
O |»l5]—
;Z1 6ah|2;
PRS 02627
T 26/721
Fig. 2.6
C S 10 335
10
2.1.7. Microcomputer 1 Outputs of microcomputer 1 are:
The microcomputer applied here is of the type IVIAB8461P
and h a s program code W068 (IVIask programmed). Earlier - E X T 3/4 : a low level (OV) at pin 26 - IC7831 means that
verslons have program code W052 and c a n , for service, the inputs of E X T 3 are interconnected. A high level
be replaced by W068. (+5V) at pin 26 - IC7831 means that the inputs of E X T
4 are interconnected.
2.1.7.1. Inputs and outputs (Fig. 2.7) - S T R O B E : an 8-bit code is sent, via the I^C bus, to the
shift register, 107169 on the S S P , U I 001. With the
Every R C 5 command and every keyboard command is strobe pulse from pin 7 - 107831, the 8-bit code is
p a s s e d on by microcomputer 2, via the I^C bus, to loaded into IC7169.
microcomputer 1 .
- C R I S P E N I N G : a low level (OV) at pin 5 - 107831 means
that crispening is on, a high level (+5V) that crispening
When the set is turned on with the mains switch, T S 7 8 4 1 is off.
is cutoff, s o that the collector voltage follows the +5V. If
the 5V is stabilized, a positive pulse appears at the base
of T S 7 8 4 1 (see chapter 3). T S 7 8 4 1 starts to conduct and
Finally, outputs 18 to 22 of microcomputer 1 drive the five
gives a pulse to the power on reset input (POR), pin 17 of
LEDs.
microcomputer 1 . Via D6850 the power supply is started
For microcomputer 1:
in the ON mode. At pin 23 - IC7831 a reset pulse may
appear, which c a u s e s T S 7 8 4 1 to conduct and the program pin 18: low in s t a n d - b y and R G B
to start again, in order to get out of a jammed routine. pin 19: high in position ON, T S 7 8 5 3 is conducting and the
green L E D lights up. Via D6857 this L E D flashes
Other inputs of microcomputer 1 are : upon R C 5 reception.
pin 20: low at crispening
- S T A T U S E X T 1 : if pin 8 of the E X T 1 has a high level pin 2 1 : low at pseudo/spatial
(+12V), the input pin 27 is low. In T V mode and E X T 2 pin 22: low at mono
mode, microcomputer 1 now switches over to E X T 1 . T h e s e outputs are also used for error messages.
- F A S T B L A N K I N G ( F B L ) : if the fast blanking is high
(+5V) at pin 12, microcomputer 1 turns on the R G B L E D
via pin 18.
- +12V S E N S E : voltage divider R3897 and R3898
c h e c k s if the +12 V is present. If it is not present, an
error m e s s a g e wlll be given and the program will stop,
that is, there will be no picture nor sound.
I T I T I T I
TS7835 Y hrTSTSI TS7854 TS7855
l'.
J
'' ^ R3843 j
-
R3862
-
; P7
y R3844 ^
19 20
I^C
3
27 STATUS EXTl
R E S REQ 13
IC7831
RESET 4 MAB8461
WAIT 25
R3877
f-om-
1831
HDl-
:C2860
33p
xC2861
33p
ïT
PRS 02336
26/713
Fig. 2.7
C S 10 336
2.1.7.2. Error m e s s a g e s 2.1.8. Memory IC7900
If a slave gives no acknowledge after having been
2.1.8.1. Slave address
addressed by thie master, the microcomputer w/ill give an
error m e s s a g e . T h e microcomputer keeps on giving the The memory is an E A R O M (Electrically Alterable Read
s a m e address and keeps on waiting for an acknowledge. Only Memory) of 4 K bits or 512 bytes. T h e s u b - a d d r e s s
No other function can be operated. that enters via the I^C bus h a s 8 bits and can only address
256 bytes (2^). This is solved by dividing the memory into
T h e error m e s s a g e is given with the L E D s that flash: 2 pages of 256 bytes, each containing a separate slave
T h e following error m e s s a g e s are possible : address. Pins 1 and 2 of the IC determine the address of
the entire IC so that 4 such I C s can be used. Pins 1 and 2
stand-by On Crispening Mono Spatial are grounded here.
C I T A C IC7905
TDA8420 IC7180
Memory 1 ) The slave addresses are:
nC7900
Memory z
Bit b7 b6 b5 b4 b3 b2 bi bO
TDA8405 IC7125 1 O 1 O A2 Al AO R/W
TDA8432 IC7571
C C T IC7750/U1007 R = R E A D command
Microcomputer 2 W=WRITE command
12V
Microcomputer 1 b7 b6 b5 b4 b3 b2 bi bO ( H E X )
R C 5 input IC7830
|2C B U S Memory 1 write:
1 0 1 0 0 0 1 A2
T h e s e error m e s s a g e s apply for microcomputer 1 version
W068 and microcomputer 2 version W050. In program
Memory 1 read:
version W090 for microcomputer 1 and program version
1 0 1 0 0 0 1 A3
W091 for microcomputer 2 the program has been made
service-friendlier. In these new programs the s a m e errors
Memory 2 write:
are detected. T h e program will not stop anymore but O AO
1 0 1 0 0 0 0
continue normally. However, the error m e s s a g e does
remain visible on the L E D display. In the old version
Memory 2 read:
W 0 6 8 / W 0 5 0 , removing the teletext module, U1007, results 1 0 1 0 0 0 0 1 A1
in an error m e s s a g e and the receiver stops functioning (no
picture, no sound). In the new version W090/W091 an
error m e s s a g e is given and the set keeps on functioning,
of c ours e without teletext and O S D .
In the old version W068/W050, removing the P A S , U I 0 0 3 ,
does not result in an error m e s s a g e but the receiver stops
functioning (no picture/no sound/no L E D display). 2.1.8.2 Contents memory 1 IC7900
In the new version W 0 9 0 / W 0 9 1 , an error m e s s a g e is given
and the set will keep on functioning if, via a short-circuit Structure of memory 1 (Fig. 2.8.)
wire, 3M6 and 6M7 are connected.
Removing the teletext module and/or the P A S may come Memory 1 is divided into 3 groups :
in handy in locating errors in the receiver.
I A d d r e s s e s O to 179 accommodate the 90
preselections. E a c h preselection occupies 2 storage
locations.
The 1 st storage location contains the B C D code for
the channel number, e.g. channel number 47 O 1 O O
Bit (b) b7 b6 b5 b4 b3 b2 bi bO 0 111.
ADDRESS T h e 2nd storage location contains:
0 tens units ctiannel PR 0 H = 1 for hyperband
1 H x 8 s x 0 0 0 S S = system (4 s y s t e m s possible)
1 2
000 = offset Information.
Each channel can have a frequency that deviates
from the nominal frequency of - 3 MHz to + 4 MHz
178 PR 89 for U H F and from - 3 MHz to +3 MHz for V H F . A
179
channel w h o s e frequency is 3 MHz lower than its
182 SB flag 1 nominal frequency is given offset O (000), 2 MHz
183 SP/PS
mono flag 2
lower offset 1 (001) and the nominal frequency gets
II 184 flag 3 offset 3 (011). A channel that is 1 MHz higher than
185 tens units Progr the nominal frequency gets offset 4 (100), 2 MHz
higher offset 5 (101), 3 MHz higher offset 6 (110), 4
196 0 1 0 1 hundreds MHz higher offset 7 (111).
page I s t
197 tens units page TXT
198 tens units program page II A d d r e s s e s 182 to 185 house flag Information.
number Flags 1 and 2 are rewritten every time a bit is
III changed. At s w i t c h - o n , 3 bits are used, namely:
253 20ttl
standby ( S B ) , pseudo ( P S ) / spatial ( S P ) and the
254 TXT mono bit, so that these functions assume the last
255 page States before switch-off. Flag 3 and the program
number number are not rewritten at eVery change, because
the set, after s w i t c h - o n , always begins with program
Fig. 2.8 1, uniess the receiver w a s switched off in s t a n d - b y
mode. Other program numbers are not important.
)
III A d r e s s e s 196 to 255 contain the 20 upgraded teletext Memory 2 is divided into 3 groups:
page numbers that may be linked to a program number.
I A d d r e s s e s O to 14 house the geometry parameters and
This occupies three storage locations:
options. T h e position of the sync switch is stored at
- 2 a d d r e s s e s for page numbers
address 14 and, when the parameters are rewritten,
- 1 a d d r e s s for the program number.
sent back to IC7571.
Note: X is a non-relevant bit.
II A d d r e s s e s 21 to 29 accommodate the personal
preference values of the linear functions.
LOCAL FREQUENCY
PRS 02644
T-26/722
Fig. 2.10
O +1 *2 *3 •3 2 -1 -3 -2 -1 O H WHz
PICTURE
CARRIER
IDENTIFI
CATION
-VIDEO RECOGNITION
[lËD
ra
^^1 — H AFC
—^ CITAC
INTERFACE
8MHz J^
P R S 02645 !• 1 1_
T-26/722
,2 .3 .4 -3 2 -1 O *1 .2 »3 .4 3 -2
Fig. 2.11
ra ra
ra
ra B5
ra 15MH2 r"g7~]
8 5WHZ
B CITAC- IC7535
VIDEO CONTROL
BRIGHTNESS
SATURATION
CONTRAST - DAC
HUE
R3364 ± C2364
Fig. 2.12
PRS 02404
T-26/72I
Fig. 2.13
C S 10 337
12
Channel No Picture carrier MHz Band Channel No Picture carrier MHz Band
C S 10 338
2.2 Operation monitor
Ttie monitor is only suited for reproducing picture and
sound that come from another set. T h i s is usually an
audio-video tuner with peripheral equipment connected to
it (Fig. 2.14).
C S 10 340
TUNER
AV1990 ICD
AV1991 TDA8442
IC 7900
MEM
PCD8572
IC7180
CONTROL IC
MC144I1
IC7571
pC1
IC7830
GEOMETRY P R OC
iDA8432
C7169
SOURCE SELECT
HFF4094
/
—
—olo-|
M/S
> ^ + MONO
EUROCONNECTOR O FRONT
EXTï PRS 02386
T-26/721
SDA - e -
SCl
STROBE — ^
IC7830
.5V - FRONT/SCART
_ 27 MAB8461
T 1 - FAST BLANKING
BC558 é- R387C H3e63
I «127
RC5 IN RC5 OUT
zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
R3831 Vi/
1
D6836
R3889 R3895
- W -
R3886 R3887
-M-
D6932 R3879
— 14
•6933 IC7841 h
R3875
SCAR1
AMV R3876
AUDIO
R3880
VIDEO
MONITOn
R3878 :
P R S 02397
T 26/721
;7843
Fig. 2.20
15
If the E N line is low, 3 times 6 bits are sent out. A data bit 2. Video and sound of an external source connected to
is taken over in the register of the sound control (IC7180) the tuner.
when the clock pulse is high. T h e data for the mute The data contains 15 bytes, viz.:
function, volume left channel (L) and volume right channel 1
(R) is r e a d - i n in succession. 2
6 bits : 64 steps (levels) 3
3zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
X : mute, volume (L), volume ( R ). 4 video and audio settings
T h e L E D s of the L E D display burn when outputs 7 to 10 5
are low. 6-10
11-15 A S C I I codes for E X T name.
The LED indication indicates the following functions:
pin 7 - IC7830 : mono L E D 3. Program survey in O S D mode.
pin 8 - IC7830 : crispening L E D . Crispening is The data contains 8 bytes, viz.:
switched on, via D6930, on the 1 program number ( P R . NO.)
multistandard decoder M S D . 2 channel number (CH. NO.)
pin 9 - IC7830 : ON L E D , flashes upon R C 5 reception. 3 hyperband option and hyperband bit
pin 10 - IC7830 : s t a n d - b y , R G B L E D . 4-8 A S C I I codes for P R . name.
AVM data :
The AVhA data can be subdivided into 3 l<inds:
1. Tuning of the tuner itself.
The data contains 10 bytes, viz.:
STEADV STATE
1 flag O ACKNOWLEDGE "
2 1
IC7830 zyxwvutsrqponmlkjihg
]iC C H E C K
3 2
4 program number ( P R . NO.) STEADY STATE
eOlOLofÉIS bytes
ACKNOWLEDGE"
PRS 02399
T -26/713
Fig. 2.21
C S 10 341
16
2.2.7. Memory IC7900 2.2.9. Power supply for control panel (Fig. 2.23)
The external memory IC7900 is a non-volatile E E P R O M , The control panel always receives its supply voltage from
wrhich accommodates the following: a separate transformer. This transformer is housed on the
mains filter panel. This voltage is also present in stand-by
Address
mode.
00 geometry parameters
A s t a n d - b y transformer has been chosen because, in
11
s t a n d - b y mode, signals coming from the S O P S supply
12 options (00 no teletext (TXT) 32 teletext (TXT))
may disturb the working of the tuner (see chapter 3).
14 synchronization switch ( S T T V , C V B S )
15 flags: b3 : loudspeaker
b4 : s t a n d - b y
b5 : mono
16 volume STAND I
17 balance / V
TRANSFORMATOR p
18 brightness
19 colour saturation
29 contrast
21 HUE
68 upgraded T X T pages
127
Control voltages:
IC7905/TDA8442 IC7355/IC7250
min. max. min. max.
,6 -fr
:m}- TDA4580
9_
VIDEO CONTROL
ICD 3 3925
30-
2273
i22n
Fig. 2.22
C S 10 342
CHAPTERzyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
3. POWER SUPPLY
3 . 1 . Introduction 3.2. Automatic degaussing (Fig. 3 . 1 . and Fig. 3.2.)
The power supply applied In this c h a s s i s is a S O P S . T h e For picture tube dimensions 24", 27" and 3 3 " s e e Fig. 3 . 1 .
S O P S (Self-Oscillating Power Supply) is a self-oscillating The P T C R3653a (+t°) has a small value at s w i t c h - o n and
mains-separated power supply. sends a 5A peak current through the degaussing coils.
The oscillator and the pulse-width control are situated on P T C R3653a (+t°) becomes hotter, its resistance increases
the mains side, the feedback circuit for stabilization and and the current becomes practically 0. T h e N T C R3653b
the control circuit are accommodated on the (-t°) also becomes hot, because it is thermally coupled to
m a i n s - s e p a r a t e d side. Feedback takes place via an the P T C . T h e N T C becomes low-ohmic, so current starts
opto-coupler. to flow through it, keeping it hot. Consequently, the P T C
The S O P S is specified for mains voltages of 220V to also stays hot (and high-ohmic), so that no current flows
240 V ( ± 1 0 % ) . through it anymore.
The frequency during nominal operation is 40 kHz.
Depending on the load, this frequency varies between Capacitor C2653 attenuates the line pulses that arrivé on
20 kHz and 60 kHz, for small and large loads respectively. the degaussing coils through inductive coupling with the
horizontal deflection coils.
3.1.1. Power supply for the receiver
The main supply voltage is 140V. Furthermore, a +27V and
a - 2 7 V voltage are present for the sound output stage.
The +27V is also used a s a starting voltage for sync 10,
IC7531.
3654
The maximum current is limited at 1.5A. If an overload
occurs, the output current becomes smaller and the output
voltage falls quickly. If the output is short-circuited, the
output current is limited to 0.7 A. T h e frequency h a s fallen
to 1.3 kHz, causing the S O P S transformer T 5 6 6 3 to
produce a squeaking sound. T h e output voltage then falls
to about 1.5V.
If the output is unioaded, the power supply stabilizes and PRS,02356
enters the s o - c a l l e d burst mode. In this mode the T-26/723
17
42 184 07
C S 10 343
18
N primary Pin 11 is positive relative to pin 1 and diode D6667 is
Tlie winding ratio N = = 1.8. conducting. Positive pulses also appear at pins 10 and 2,
N secondary negative pulses appear at pin 3.
Pin 1 is not connected to ground, but to - 5 V . T h e ripple of
Tliis means tliat tlie voltage a c r o s s the primary winding is: the - 5 V is available at pins 2 , 1 0 , 1 1 and 3. T h e s e windings
NzyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
X 140V = 1 . 8 x 140V = 250 V. control the pulse-width control.
The mains voltage changes and the 100 Hz ripple appear
T h e voltagezyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
U^^ of T S then is 250V + 280V = 530V. on all these pulses.
T h e peak current through secondary winding 1 6 - 1 8 is During t, -zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQ
X^, T S 7 6 8 7 is not conducting. Pin 18 is positive,
1 . 8 x 2 A = 3.6A. D6696 is conducting and 0 2 6 9 7 is recharged. T h e voltage
(V^^,,) is set at +140V. This voltage is present across
A short moment before the current through secondary capacitor C2697.
winding 1 6 - 1 8 h a s become OA. T h e voltage reverses and,
via a positive feedback winding 8 - 9 of the S O P S
V3
transformer, T S is brought into conduction again. T h e + 100
cycle starts again.
+280
T D6696 V22
•+140
18 I
C2697J
D6711 -27
-+13 VI3
15 I +7
C2712^
D6704
11 -40
Vil
02705^
• io: 20^^'"=T +30
:2i
122 D6707
—27
-30
C2708
V10
-5 V9
-+7 +7.5
71 12
41 876 BT2
13
- ( ! ) -12.5
D6727 V8
ï V2
-10
Fig. 3.4
C S 10 344
All voltages bear a fixed ratio to this V^^, and so are 3.5. Oscillator
constant.
V^^, d e c r e a s e s only in c a s e of an overload and, 3.5.1. Working (Fig. 3.5)
consequently, all secondary voltages also dec r ease during In order to start, T S 7 6 8 7 should be driven into conduction.
ti -
This is done by integrating the mains voltage, via R3656
and R3657, with C2658. After R3686, 22V (D6682) is
Pin 15 becomes 12V positive relative to ground, causing available which feeds base current, via R3682, to T S 7 6 7 4
D6711 to conduct. This supply is used for the control and T S 7 6 8 7 . Pin 5 of winding 7 - 5 of the transformer
circuit in which the opto-coupler h a s been incorporated. becomes negative relative to pin 7. Pin 9 becomes positive
relative to pin 1 , a larger base current flows via D6672,
Pin 19 becomes positive and pin 22 negative, D6704 and R3671 and T S 7 6 7 4 through T S 7 6 8 7 , causing the collector
D6707 are conducting and C2705 and C2708 are voltage to fall until T S 7 6 8 7 is saturated. A linearly
recharged. T h e s e +27V and 27V are used a s symmetrical increasing current flows through winding 7 - 5 .
supplies in the sound output stage. T h e +27V is also used
a s a starting voltage for the sync I C . For the monitor these This current also flows through R3690, C2690 back to pin
voltages are +18V and - 1 8 V . Thyristor T H 6 7 2 7 remains 1 T5663. A negative voltage is built up across R3690 which
cut-off and winding 1 2 - 1 3 stays out of operation. A s pin is smoothed with C2690 and limited at 5.1 V with D6690. At
12 is connected to a fixed D C voltage (+7V), negative a short pulse width (small load) the current is insufficiënt,
pulses of 50V appear a c r o s s winding 1 3 - 1 2 . pin 2 is also positive during this period and an additional
current flows via R3689 and D6689 through R3690 and
Pins 2, 9 and 11 have pin 1 a s a common voltage C2690.
reference point, which h a s a voltage of about - 5 V . Pin 3
has a positive voltage value relative to pin 1 .
5992
SUPPLY-SPEISUNG
ALIMENTAZIONE
PRS 02757
T-26/726
Fig. 3.5
The voltage at pin 11 is highly positive (34V). D6667 is 3.5.3. Switch-on behaviour transistor TS7687 (Fig. 3.6)
conducting and C 2 6 7 5 is charged via R3679, aiming at
When the secondary current h a s become OA, the voltage
34V. A s soon a s the voltage has become 0.6V, T S 7 6 8 5 will
reverses. T h e collector voltage of T S 7 6 8 7 falls, the slope
start to conduct via R 3 6 8 3 and R3684. T S 7 6 8 6 also starts
of this falling edge being determined by C2664, primary
to conduct and connects the base of T S 7 6 7 4 to the - 5 V .
winding 5 - 7 and R3664.
T S 7 6 7 4 and T S 7 6 8 7 cut off.
If this voltage falls below +200V (= voltage at pin 7), the
voltage at pin 10 will become positive and T S 7 6 8 7 will be
T 5 6 6 3 generates a counter-e.m.f.. T h e voltage reverses
turned on. On winding 3 - 4 a pulse is available which is in
and the secondary diodes become conductive. T h e
phase with the collector pulse T S 7 6 8 7 . R3669 and C2669
voltage on secondary winding 1 6 - 1 8 is transformed back
integrate this pulse and drive T S 7 6 7 0 into conduction
to primary winding 7 - 5 , so that pin 5 becomes 250V
during the positive peaks. Via D6671, T S 7 6 8 6 keeps on
positive relative to pin 7. This means that C2664 is
conducting for a while, causing T S 7 6 7 4 and T S 7 6 8 7 to
charged via diode D6664 and the supply voltage to about
stay out of conduction a little longer. The collector voltage
550V. At pins 8 and 11 a negative voltage is available.
T S 7 6 8 7 has meanwhile fallen to 100V, thus considerably
Diode D6667 is not conducting, but D6675 is, causing
reducing the power dissipation during s w i t c h - o n of
C 2 6 7 5 to be charged to - 6 V relative to pin 1 . A linearly
T S 7 6 8 7 . A s a result the operating life of T S 7 6 8 7 is
decreasing current flows through the secondary
lengthened. T h e positive pulses at pin 3 T5663 are
windings.
rectified and smoothed into a D C voltage of 14V across
C 2 6 8 1 . This is +9V relative to ground. This voltage
T h e linearly decreasing current in the secondary winding
supplies T S 7 6 7 4 and, via D6665, the transistor of the
becomes OA. C2664 h a s been charged to 550V and
opto-coupler I C , IC7668.
discharges a c r o s s winding 5 - 7 . Power supply and R3664.
When the voltage on C2664 h a s fallen to about 300V, the
voltage a c r o s s the primary winding has become OV. In c a s e of an overload, or in stand-by, the positive control
However, the coil wants to maintain the current, the of the transformer becomes smaller, causing the +9V to
voltage reverses and pin 5 becomes negative relative to decrease. T h e collector current of T S 7 6 7 4 and the base
pin 7. A s a result, pin 9 becomes positive relative to pin 1 current of T S 7 6 8 7 become smaller.
and T S 7 6 7 4 and T S 7 6 8 7 are driven into conduction again:
the cycle starts again. 3.6. Pulse-width control (Fig. 3.5)
3.6.1. Maximum load (Fig. 3.7)
3.5.2. Self-oscillation without control loops (Fig. 3.5)
A s the pulse-width control is not connected to ground but
If T S 7 6 8 6 is not driven into conduction because of a to - 5 V , all pulses are given relative to the - 5 V .
defect, the collector current of T S 7 6 8 7 will increase to: Part of V^^, that is controllable with R3715 is put on the
base of T S 7 7 1 7 . A stabilized voltage of 6.2V is obtained
on the emitter.
It, of T S 7 6 8 7 = Ic of T S 7 6 7 4
At maximum load, V^^, will be a little too low and T S 7 7 1 7
9V is just not conductive, nor is T S 7 7 1 9 . No current flows
this is 0.45A if T S 7 6 7 4 is saturated. through the diode section and the transistor section of the
20E
opto-coupler.
1^ of T S 7 6 8 7 = 0.45A x 10 = 4.5 A.
During t^-tj T S 7 6 8 7 cuts off and a negative voltage of
T h e transformer will become saturated. A s a result of this
6.6V is available at pin 2. D6675 is conducting and C2675
the primary positive feedback windings, such a s winding
is charged to - 6 V .
1 - 9 , do not carry current anymore. Consequently, the
voltage at pin 9 and also the base current Ij, for T S 7 6 8 7
At tg, T S 7 6 8 7 starts to conduct. T h e voltage reverses and
will start to fall. Transistor T S 7 6 8 7 goes out of saturation
D6675 stops conducting. At pin 11 a positive voltage of
and its collector voltage rises. T h e secondary windings
34V is available. This voltage discharges C2675 at a time
now dissipate their energy. If the secondary current
constant determined by R3679, R3680 and C2675, aiming
becomes zero, the polarity a c r o s s winding 7 - 5 will
at the +34V. This rising voltage drives the base of T S 7 6 8 5 .
change. Consequently, winding 1-9 will feed a base
When this voltage becomes 0.6V, T S 7 6 8 5 and T S 7 6 8 6 are
current to T S 7 6 8 7 again. T h e oscillation process starts
conducting. T S 7 6 8 6 is an emitter follower and connects
again. At normal supply voltage (+280V), the maximum
the base of T S 7 6 7 4 to - 5 V . T S 7 6 7 4 and T S 7 6 8 7 stop
power of T S 7 6 8 7 is much e x c e e d e d and T S 7 6 8 7 will
conducting. T h e period during which the voltage on C2675
become detective if T S 7 6 8 7 is not driven into conduction
increases is maximum. This means that the current
because of a defect.
through T S 7 6 8 7 reaches its maximum value, 3.8A. The
output current is 1.5A D C . T h e collector voltage of IC7668
Service hint (TS) is supplied by the +9V and is derived from the pulses
For faultfinding, the principle of self-oscillation is used. from pin 3. In stand-by or in c a s e of an overload, the
R3684 is removed. This prevents the pulse-width voltage is formed by R3659, R3699 and R 3 6 8 1 . With a
modulator from influencing, via TS7685, the voltage of 34V at pin 1 1 , the zener diode D6668 just comes
self-oscillation of the S O P S . T h e mains voltage is stepped into action. The small current flows through R3683 and
up to about 70V via a m a i n s - s e p a r a t e d variable c a u s e s T S 7 6 8 5 to start conducting a little earlier.
transformer. T h e supply voltage now is about +100V and At the start, C2713 charges slowly. Consequently, the
the circuit with T S 7 6 8 6 and T S 7 6 8 7 will start to oscillate reference voltage and the output voltage, controlled via
without these transistors becoming detective. Now the electronic control circuitry consisting of T S 7 7 1 7 and
voltages of the S O P S transformer can be measured and T S 7 7 1 9 , increase slowly.
faults can be located in the connected circuits.
19
OPTO COUPLER 7668
+9V B7674
TS7687
42 180 B7
Fig. 3.6
Vpin3
TS5663
^02669
1,2V
1 / ! !
TS7670
is conducting
i 1
42 178 B7
X34V
/
y
/
/
y
/
/
/ - 0,6V
A
R3679 C2675
R3680 /
tl t2 tl
to
3.6.3. Unioaded
In Fig. 3.9 a few s t a n d - b y voltage forms are given. T h e
output voltage increases, which c a u s e s the control current
VC2675
to increase a s well. T h e voltage drop of R3683 becomes r—2,5V
great, causing T S 7 6 8 7 to be switched off rapidly. B e c a u s e
of the storage time of T S 7 6 8 7 , the energy that is stored in
the transformer is greater than the consumed power, so
V^jj, continues to increase. T h e control current increases 1
further and T S 7 6 8 5 and T S 7 6 8 6 are continuously held into
conduction. T S 7 6 8 7 cuts off and no more pulses arrivé. /STORAGE TIME
Vbase
The output voltage falls, the control current decreases, TS7685 i K
T S 7 6 8 5 cuts off and the power supply starts a number of ^ 0,5V
cycles all over again by means of starting resistor R3682. 1/
T h i s mode is called "burst mode". T h e burst mode
frequency is approximately 100 Hz.
Fig. 3.10
220V
— 198V
— 262V
41 878 B12
Fig. 3.11
UOVI - + 140
-PAS OV
D6702 D6706
S5698 lOV
-N K-
47V
"1
iD6727
+26V
41 877 812
Fig. 3.12
TS7731 C2735Ï
D673oi D6731
4,07634
I POR
1.4V
4V7
R3730
C2726
zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
1500;j
12 R3733
T5663
IC7831
R3727 - r 4M05 4F05 R3871 ON O
—»>- -I ïkl-
! STAND BY
+7V +7V
D6727i I
R3737
R3740
TS7743
+12V
(^TS7742 R3740 1C7668
I
02734 0 R3195
Hl
R3732 D6742 -••PAS
4V7
Fig. 3.13
CS 10 347
22
CHARTER 4. SOURCE SELECTON
The source selection of the receiver is more extensive When EXT 3 or EXT 4 is selected, microcomputer 1
than that of the monitor. They will both be discussed. supplies a "O" or " 1 " to IC7833, which selects CVBS, L and
R signal from EXT 3 or EXT 4. These signals are called
4.1. Receiver FRONT signals, which can be switched further down on
the S S P panel.
Depending on the version, chassis 3A has 2 or 4 external
provisions for connection. If only 2 external provisions are
available (EXT 1 and EXT 2) (HIFI and VHP), these Microcomputer 1 applies a serial data stream via the I^C
provisions are always euroconnectors and the source bus to IC7169, followed by a strobe pulse. This serial
selection is housed on the S S P . If there are 4 external Information flow contains 7 bits, bit AO and bit A l (status
provisions for connection (matchline) there are 2 bits) of which determine the source selection.
euroconnectors (EXT 1 and EXT 2) and 2 CINCH (EXT 3 AO Al Source
and EXT 4) provisions and the source selection is
accommodated on both the S S P and the CDP. 0 0 EXT 1
In Fig. 4.1 the total block diagram with all provisions are 1 0 FRONT (EXT 3 or EXT 4)
given. 0 1 FRONT-END (TV)
1 1 EXT 2
With the remote-control unit a choice can be made
between TV, EXT 1 and EXT 2. The status bits, bit AO and bit A l , control IC7150, which
With the local keyboard a choice can be made between switches the video signal through to the CCT, the MSD,
TV, EXT 1, EXT 2, EXT 3 and EXT 4. The choice is passed the sync switch IC7532 (on the main panel) and IC7152,
on via the I^C bus to microcomputer 1 which sends the left and right sound signals to the stereo
output amplifier (PAS).
MSD
U1010
C7150
RGB FE
EXT1
FR r
FE
EXT2
-O l SYNCHRONISATION
SWITCH
-O
AO Al
EXT1
BLANKING
FR r TS7165
FE
-O
L
-O
A2 A3
R3169 F B SWITCH
SHIFT
SOURCE S E L
REGISTER
IC7169
TT
R3175
H 180k|— -J- zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
R317Q
T S 7 l 7 0 , . r j ö k ] - f - ^ ,0 E X T l - 8 T
R3177
TS7)72
SSP_U1_001__
CDP UI008
f EXT3
EXT4
^lC1
FXT3
IC7831
EXT4
EXT3
EXT4
C S 10 348
When pin 8 of EXT 1 goes high, TS7172 will start 4.1.3 MONO switch (Fig. 4.1.)
conducting and render pin 27 of microcomputer 1 low. The
If the mono switch of the keyboard is actuated, the
microcomputer switches over to EXT 1 and the status bits
"MONO" bit of the serial code is high. This bit controls
AO and A l both become "O".
IC7166, as a result of which the left and right sound
channel are shorted and reproduction is in mono.
STATUS INTERRUPT : if a status voltage appears at pin
8 of EXT 1, the set will always switch over to EXT 1. Upon
4.1.4 RC5 code (Fig. 4.1)
switching over to TV or another source, the status voltage
of EXT 1 is not read anymore by microcomputer 1. The RC5 code, coming from the RC5 receiver, is sent to
EXT 1 via TS7171 and to EXT 2 via TS7170. Pin 8 of EXT
4.1.1. VCR record selection (Fig. 4.1) 1 is also a status input, so the peripheral determines the
DC voltage level of the RC5 pulses:
The output signals of EXT 1 are always CVBS signals and
sound signals coming from the channel selector / IF STATUS low : RC5 pulses O - 2V
combination (frontend). STATUS high: RC5 pulses 10 - 12V
EXT 2 supplies signals that can be selected with a
3-position switch, 1832, on the CDP. The voltage divider R3176, R3177 and C2177 prevent
The serial code that is applied to IC7169 also contains the TS7172 from conducting when receiving RC5 signals.
status bits A2 and A3. These bits determine the VCR
record selection. 4.1.5 Video input circuits (Fig. 4.2)
The signal from pin 20 of EXT 1 is limited in such a way
A2 A3 Source
that the peak of the sync pulse is 0.6 V below 2.5 V, that
O O EXT 1. is, 1.9V. In this way the signals coming from the other
1 O FRONT (EXT 3 or EXT 4) sources are limited at the same level via D6155, D6156
O 1 FRONT-END 2 and D6157. After an emitter follower, TS7154 for EXT 1,
the signal arrivés at pin 1 of IC7150, the CVBS switch.
FRONT means the signal from EXT 3 or EXT 4 that was
selected last.
FRONT-END 2 is an output signal from the stereo
decoder for sound signals other than FRONT-END 1
(SOURCE SELECTION), e.g. language I and language II. FROM 20 EXT1
C2154
The status bits A2 and A3 drive IC7151, which selects the —ID—
CVBS signal for EXT 2, and IC7153, which selects the L
and R signals for EXT 2. ï I D6157 D6156 | D6155 [
Nofe;
If RGB signals are connected, they should be
synchronized to the video signal (TV mode) or a CVBS
signal should be connected to the video input with sync
pulses (EXT 1 mode).
Fig. 4.3
23
4.1.7 Sound signalszyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
(Fig. 4.4) 4.2. Monitor (Fig. 4.6)
Tlie left sound signal of EXT 1 is AC coupled to IC7152. The monitor has two external inputs EXT 1
Because of R3940 the signal is symmetrical relative to (euroconnector) and EXT 2 (CINCH).
ground. IC7152 is supplied with a positive (+5V) and a Selection takes place with the source select switch (on the
negative (-8V) supply, so the negative part of the signal is control display panel). The microcomputer on the display
not distorted. R3943, C2943 is an integrator that filters out passes the CDP position on to the shift register. The shift
high frequencies, above the audible range. register drives via bits AO and A1 the switch ICs, which
EXT 2 and FE signals are also AC coupled, FRONT signals pass on CVBS signals and sound signals (L and R) from
are always symmetrical relative to ground and are EXT 1 or EXT 2.
interconnected directly.
AO Al
O O EXT 1
1 O EXT 2
1^ C2940 R3943
IC7152
In position EXT 1, pin 12 goes high via another bit in the
from E X T 1 - 6 — O
K
II
innn
T"
shift register. If the FB switch is switched on, the blanking
P R S 02341 line is high and the MSD is switched over to the RGB input.
T-26/713
The same thing happens when the peripheral applies a
blanking voltage to pin 16 of EXT 1. In both cases TS7839
and TS7840 are conducting, causing pin 13 of the
Fig. 4.4
microcomputer to go high. As a result the RGB LED is
burning.
In position FRONT, the blanking line is grounded via the
4.1.8 Sound output amplifiers (Fig. 4.5) source selection, making automatic blanking impossible.
The left sound signal for EXT 1 is branched off for the
switch and goes via an amplifier stage (A = 1) to pin 3 EXT Notes:
1. IC7168 has a positive and a negative supply voltage and 1. If RGB signals are connected, a CVBS signal should be
contains 4 operational amplifiers for L and R signals of connected as well to synchronize the RGB signal.
EXT 1 and EXT 2. IC7167 has 2 similar operational 2. If the fast blanking switch is switched on, no CVBS
amplifiers and forms a buffer between source selection signal will be transmitted. The blanking signal switches
and the PAS. the RGB signals through.
The mono bit at pin 14 of IC7169 shorts the left and right
sound channels in IC7166.
S R3956
I
Pns.02342
T-26/ri3
Fig. 4.5
107 150
CVBS
EXT1
IC7152
14
12
»5 -5
AO — ^
SHIFT > MSD
Al
REG
s™4o(^M3i> 3166
OroN-^ 16
(RGB)
rSsiBs EXTl
,3 ï
f MC
PRS.02642
T-26/722
Fig. 4.6
CS 10 349
24
CHARTER 5. CHANNEL SELECTOR, IF UNIT
CHANNEL SELECTOR
Several verslons are possible in chassis 3A. Each version KANAL WAEHLER
SELETTORE CANALE
has lts ow/n combination of channel selector and IF unit.
The following verslons are possible:
- muiti European;
for reception of signals according to the standards:
. PAL B,G
. SECAM B, G, L
.NTSC M
- muIti France;
for reception of signals according to the standards:
. PAL B, G, I
. SECAM B, G, L, L'
- mono UK;
fcPAëdeption of signals according to the Standard:
32 4MHz IC 105
TDA2148
AM
FM
38 9WHZ 38 9MHz
1 ï
SAW
FILTER VIDEO
y 4 5MHz 5 5MHz
" 1
34 4MHz
IC180
TDA2577
SYNC
-ï-
4
HOR
OSCILL
P R S 02224
T 26/711
Fig. 5.2
SOUND SOUND
FILTER
r
I
PRS 02223
T-26/711
Fig. 5.4
LF.AMPL,+DET.+AGC.+AFC
ZF VERST,+DEM.+AVR,+AFA
CHANNEL SELECTOR ^ AMPL.FI,+RIVEL+CAG.+AFC
KANAL WAEHLER
SELETTORE CANALE
A
2016 2025
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330 M'
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PRS 02210
T32 709 Fig. 5.5
CS 10 351
26
CHAPTER 6. LU M IN AN C E AN D C H R O M IN AN C E
CIRCUITS
This chapter is the same for receiver and monitor. d. SECAM: The colour carrier signal has a frequency of
4.406 MHz (f^) during one line and 4.25 MHz (f^) during
6 . 1 . Block dia gra m (Fig. 6.1) the other.
The luminance and chrominance circuits are situated on
the MSD, U I 0 1 0 . The CVBS signal coming from the The Identification circuit In IC7250 recognizes these
switched-on source on the SSP is fed via an input signals and renders one of the 4 output pins high. In this
amplifier to IC7250. The "Ident" circuit in IC7150 identifies way the input filter is changed over and, with NTSC 3.58,
the colour system and changes over the input filter. For another crystal is turned on.
NTSC 3.58 (NTSC M) another crystal Is switched on. A Servicing hint: by applying 12V to one of these four pins,
demodulator in IC7250 demodulates the signals and has the switches are put in the deslred positlons. This can be
- ( R - Y ) and - ( B - Y ) signals as output. These signals are used to facilltate fault-finding. Since pin 23 Is connected
sent together with the Y-signal to IC7310, the C T I - I C (CTI to ground, IC7250, upon reception of SECAM signals,
= Color Transient Improvement). Here, the colour works on line identification. This means that the colour
transitions are made more distinct. carrier signals on the back porch are also used for driving
For the Y signal a 990 ns delay line has been incorporated. the SECAM switch in IC7250. As soon as pin 23 is
The C T I - I C has 2 outputs for the Y signal, one of which Is connected to 12V, IC7250 works on frame identification for
delayed 180 ns more than the other. Both signals go to the SECAM. The SECAM switch is actuated by the
crispening circuit which is switched on or off by identification signal which Is present during frame
microcomputer 1. FInally, there Is the video control IC, suppression. As soon as pin 23 is connected to +6V,
IC7355, which converts colour difference signals into RGB IC7250, upon reception of SECAM signals, works on line
signals. There are also separate RGB Inputs for EXT 1 and and frame identification. The circuit made up of S5284 and
for TXT signals. Brightness, contrast and colour saturation C2284 Is adjusted to 4.25 MHz for SECAM identification,
control as well as cutoff stablllzation also take place in the the demodulated voltage at C2281 then becomes
video control IC, IC7355. maximum. In case of NTSC, the demodulated voltage
becomes avallable at C2281. The identification circuit
6.2. Input circuit (Fig. 6.2) changes over the necessary circuits Inside the IC.
The applied CVBS signal is modulated according to the 6 .3 .1 . P AL chromina nce pa th (Fig. 6.4.)
PAL, NTSC or SECAM Standard.' Three cases may be
distinguished: The chrominance signal avallable at pin 15-IC7250 is
ampllfied in IC7250. C2280 is a decoupling for the DC
- PAL and NTSC 4.43 negative feedback. The gain Is controlled by the colour
Here, TS7251 is driven into conduction, C2250 and AGC; C2257 and C2258 are the detector capacitors. The
R3250 form a h i g h - p a s s filter. S5254 and C2254 form chrominance signal goes to an amplifier which drives the
a suction circuit at 2.5 MHz, so only the chrominance delay line and goes directly to the matrix. The phase of the
signal Is sent to IC7250. The parallel circuit S5259 and delayed signal is controlled with S5286 and S5287. With
C2259 forms a high-pass filter tuned to 5 MHz. R3278, the amplitude Is made equal to that of the
nondelayed signal. The sum of the direct signal and the
- SECAM delayed signal glves the B - Y component. The difference
Here, TS7253 Is driven into conduction and TS7251 Is between the direct signal and the delayed signal gives the
cut off. The input circuit is made up of C2250, R3253 R-Y component which is positive for a +(R-Y) line and
and C2253. The highest frequencies are attenuated, negative for a - ( R - Y ) line.
which results in an inverted bell-shape curve. The burst signal is separated from the chrominance signal
by the burst demodulator and Is compared by the phase
- NTSC 3.58 comparator with the phase of the +(R-Y) reference signal.
Here, only TS7256 is conducting. As a result, D7255 The phase comparator readjusts the PAL oscillator. This
and D7256 are also conducting, causing C2260 to be in 8.86 MHz oscillator is a crystal oscillator. The time
parallel with C2259 and S5259. C2255 Is constant, the lock-ln speed, is adjusted with
short-circuited. The parallel circuit S5259, C2259 and R3276-C3276 and R3275-C3275. By connecting pin 17 to
C2260 has been tuned to a lower frequency. ground, the oscillator is not readjusted and C2267 can be
used to adjust the free-running. The deslred system (e.g.
5.3. S yste m ide ntifica tion with IC7250 (Fig. 6.3) PAL) is selected by applying 12V to pin 28. After a
d i v i d e r - b y - t w o there are 2 signals, with a phase
IC7250 automatically turns on one of the following four difference of 90°, which are used as R-Y and B - Y
colour systems: NTSC 4.43; NTSC 3.58; PAL or SECAM. reference signals for the demodulators. Every line, the
The systems are recognized by the colour carrier R-Y reference signal is shifted 180° in phase by the PAL
information on the back porch of the CVBS signal, namely: flip-flop. The output signal of this FF (fllp-flop) Is
compared with the modulated burst and corrected, if
a. NTSC 4.43 MHz : The colour carrier has a frequency of necessary, so that the reference signal Is shifted 0° at a
4.43 MHz and the burst signal always has the same +(R-Y) line and 180° at a - ( R - Y ) line.
phase and lies on the - ( B - Y ) axis. The 2 sync demodulators apply a - ( R - Y ) and a - ( B - Y )
signal to the output.
b. NTSC 3.58 MHz : The colour carrier signal has a
frequency of 3.58 MHz and the burst signal always has
the same phase and lies on the - ( B - Y ) axIs.
CS 10 352
IC7250
TT
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VIDEO CONTROL
IC7310
TDA4565
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SECAM
IDENTIFICATION
Fig. 6.2 IDENTIFICAZIONE PRS 0218!
T07;708
IC7250 1
PAL
TDA4555 C2283 C2284
SECAM
1 II • II 1
—< -
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IDENTIFICATION S5284
SYSTEMS 0V/5 5V
IDENT
!-orn IC7531
SYMC PROC
PRS 02261
T 26/723
Fig. 6.4
6.3.2. NTSC chrominance path (Fig. 6.5) carrier wave, the other line the B - Y signal is transmitted
and FM modulated on a 4.25 MHz carrier wave.
With N T S C 3.58 MHz ( N T S C M), T S 7 2 6 7 is driven into
With an R - Y line, the B - Y signal of the preceding line
conduction. Crystal 1267 is turned on and the oscillator is
appears at the S E C A M c r o s s switch. This switch sends
adjusted to 2 x 3.58 = 7.16 MHz with C 2 2 6 7 .
the direct R - Y signal a s a delayed signal to the R - Y
With P A L and N T S C 4.43, T S 7 2 6 5 is controlled, the
demodulator. T h e next line, the direct B - Y signal goes to
oscillator is adjusted to 8.86 MHz with C2265.
the B - Y demodulator and the delayed R - Y signal to the
T h e oscillator is synchronized to the burst signal, which
R - Y demodulator. T h e S E C A M switch is driven with a
first p a s s e s through the H U E control. T h e H U E control of flip-flop at line frequency. If the flip-flop starts wrongly, it
the control system s e n d s , via the C I T A C - I C , a control will be corrected by the identification circuit. T h e reference
voltage to pin 17 with which phase errors can be signal for the 2 FM synchronous demodulators is shifted
corrected. T h e oscillator pulses divided by 2 go to the 2 90° in phase relativa to the input signal on the carrier wave
(PAL) demodulators as reference signals. The frequency. This 90° phase shift is adjusted with S5294 for
chrominance signal goes directly to the demodulators, the the R - Y signal and with S5295 for the B - Y signal.
delayed signal is not used and the matrix circuit does not The de-emphasis circuit attenuates the highest
work. frequencies. T h e s e frequencies are transmitted more
strongly in the amplifier (pre-emphasis). The 2 signals
6.3.3. S E C A M chrominance path (Fig. 6.6) ( R - Y ) and - ( B - Y ) appear at the output.
In accordance with the S E C A M Standard, one line the R - Y
signal is transmitted and FM modulated on a 4.406 MHz
27
T.D.
J,12
1
R-Y DEM ) b -(R-Y)
OSCIL ^2
12V
T j K1267
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7 16 S R3267
C1267
TS7267
\
PAL NTSC 3 5
—ca from IC7250-26
NTSC4 43
P R S 02263
r-26/7l2
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Fig. 6.5
C2275
IC
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IC7250
TDA4555 LI
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PRS 02293
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Fig. 6.6
C S 10 353
28
6.4. Colour transient improvement (CTI) (Fig. 6.7) 6.5. Crispening (Fig. 6.10)
In c h a s s i s 3A the C T I is accommodated in IC7310 After the luminance delay in IC7310, 2 signals are
(TDA4565). This IC contains two identical signal paths for available: the Y - s i g n a l and the Y - 1 8 0 ns signal. This is the
the R - Y and the B - Y signal and furthermore a delay line same signal, however with a delay of 180 ns. T h e Y - s i g n a l
for the Y - s i g n a l . T h e signals are drawn in Fig. 6.8. is amplified and differentiated in such a way that the
The colour difference signal appears at a differentiator, C 1 highest frequencies, or steepest edges, are left over.
and R 1 , where only the highest frequencies, that is, the T h e s e pulses excite a 3.4 MHz resonant circuit which
steepest transitions, are let through. T h e signal is limited, c a u s e s a decay. This decay is added to the Y - s i g n a l . T h e
but remains high a s long a s the rising lasts. T S 1 p a s s e s delay time of the Y - s i g n a l in the differentiator and the
the positive pulses on via D l and the inverted negative resonant circuit is 180 ns.
pulses via D2, so that, after the adder circuit, a positive The Y - s i g n a l is amplified by T S 7 3 3 7 and T S 7 3 3 9 (Fig.
pulse is obtained both during rising and falling edges. 6.11). T h e gain is fixed at 11x by R3339 and R3338. If the
T h e s e pulses plus the B - Y pulses arrivé at the pulse crispening is turned off, 5V will appear at the base of
shaper which compares the signals with a reference T S 7 3 4 6 and 4.3V at the emitter of TS7337. B e c a u s e of
voltage. If the differentiated pulses are sufficiently great, R3335 and R3336, the base of T S 7 3 3 7 stands at 2.3V. A s
the output will be made low. a result, T S 7 3 3 7 cuts off and no signal comes through.
In a condition of rest (no steep transitions) T S 2 is When crispening is on, T S 7 3 4 6 is cut off. Now T S 7 3 3 7
conducting. T h e incoming signal is passed on, via T S 2 , to starts to conduct and drives T S 7 3 3 9 on. T h e Y - s i g n a l is
the output; the signal also goes to a storage stage. passed on, 11 x amplified, to the differentiator. T h e signal
In c a s e of a steep transition, the output of the pulse is differentiated with C2340 and R 3 3 4 1 .
shaper will go low, T S 2 will cut off and T S 3 will start T S 7 3 4 2 has a large gain for the high frequencies (R3340
conducting. smaller than XC2340 + R3334) and inverts the signal.
The last stored signal is applied to the output by T S 3 . After C2341 and S5341 is an extra suppression for the 4.43
the edge, T S 2 starts conducting again and T S 3 is cut off. MHz to suppress the remaining chroma interference
The B Y signal, together with the R - Y signal, is pattern. D6342 and D6343 prevent small interference
simultaneously changed over and just a s long. signals (smaller than 0.6V) from exciting the resonant
B e s i d e s the chrominance path, this IC contains a separate circuit. T h e resonant circuit formed by C2343 and S5344
luminance path (Fig. 6.9). After a voltage divider, the signal is excited by the differentiated pulses and rings once with
is A C coupled to pin 17 IC7310. S5326 and C2326 filter the a frequency of 3.4 MHz. R3343, R3344 and R3345
4.43 MHz signal out. With N T S C 3.58, T S 7 3 2 7 is driven attenuate the circuit further to prevent further ringing. With
into conduction and C2327 is added, causing the circuit to R3349 the base voltage of T S 7 3 4 5 is adjusted and so also
be tuned to 3.58 MHz. In IC7310 are 11 gyrator delay cells the emitter voltage. With this voltage the amplitude of the
of 90 ns each. ringing phenomena is controlled, which is added to the
A gyrator cell is a circuit whose current lags 90° relative to delayed Y - s i g n a l .
the voltage. It acts a s a coil. Together with a small
capacitor a phase shift is realized. This phase shift is
dependent on the frequency. T h e bandwidth of this
(apparent) coil and capacitor has been chosen such that
all frequencies are delayed by 90 ns, so that the maximum
delay is 990 ns. Depending on the voltage at pin 15 a
number of cells are switched off:
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PRS 02338
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Fig. 6.10
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T-26/712
Fig. 6.8
Fig. 6.11
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7355
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VIDEO CONTROL
CONTROLLO VIDEO r
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CUT-OFF RGB
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Fig. 6.12 EXT1 IC7531
6.6. Video control IC (IC7355, TDA4580) {Fig. 6.12) The operational amplifiers B and C add the R or B signal
to the - Y signal. This signal is inverted, forming - ( R - Y )
T h e video control IC receives 3 input signals:
and - ( B - Y ) .
The 3 signals coming from E X T 1 or from the crispening
a. M S D internal (applied by the crispening circuit):
circuit all p a s s through a controllable amplifier. T h e colour
Y - s i g n a l , - ( R - Y ) and - ( B - Y ) signals
saturation control voltage controls the gain of the colour
b. E X T 1 : R, G and B signals + R G B blanking
difference signals, and with the contrast control voltage
c. T X T : R, G and B signals + T X T blanking
(controls the amplitude) the Y - s i g n a l and the colour
With all these signals, except the T X T signals, colour difference signals are controlled. The brightness control
saturation, brightness and contrast can be controlled. With controls the back porch level of the Y - s i g n a l .
TXT signals only brightness can be controlled. A matrix circuit first produces the G - Y signal and then
Furthermore, a beam current limiter and a cutoff stabilizer adds the Y - signal to the colour difference signals, thus
are present. T h e output signals are R G B signals which forming the R G B signals ( G - Y = - 0 . 5 1 ( R - Y ) - 0.19
drive the R G B output amplifiers on U I 002. (B-Y)).
If the voltage at pin 11 of IC7355 (Fig. 6.13) is low (smaller A 2nd switch is controlled with the T X T blanking (fast
than 0.4 V), the Y , - ( R - Y ) and - ( B - Y ) signals are passed blanking) and switches the T X T signals through if pin 28 of
on to the control amplifiers. A high voltage (greater than IC7355 is high (greater than 0.9V). T h e T X T signals are
0.9 V) at pin 11 switches the R G B signals coming from retained at the same DC voltage level a s the R G B signals
E X T 1 through to the control amplifiers. T h e s e R G B of the matrix. T h e T X T signals have the same brightness
signals are converted into Y , - ( R Y ) and - ( B - Y ) signals in and so they are controlled along with the brightness
the following way: an operational amplifier receives the control.
R G B signals at its input. T h e R signal appears at R 1 ,
which h a s been chosen such that the gain for R = 0.3 x. Via the cutoff stabilizer, which will be discussed later on,
In this way, R 2 and R 3 provide a gain of 0.59x and 0.1 l x the R G B signals come out.
for G and B respectively. Upon reception of N T S C signals, a positive voltage
appears at pin 8 - IC7355, thus increasing the gain of
R4 R4 R4
R-Y.
R1 = R2 = R3 =
The ratio between R - Y and B - Y with N T S C differs from
0.3 0.59 0.11
that with P A L .
The output signal is:
- 0 . 3 R - 0.59 G - 0.11 B = - Y signal.
After an inverter the Y signal is formed.
29
TXT
®3 # G R
IC7355
I
TDA4580
BEAM
CURRENT
LIMITER
C2358
-w-
II—
C2356
II—
RGB
C2357 AMPLIFIER
—II— U1002
26 trom
RGB BLANKING
>-<— U1002
C2375
II—
22n
EXT1 <
C2375
C2375
II— xt
PRS02344
T-26/713
Fig. 6.13
Fig. 6.14
C S 10 355
30
6.8. Stabilization of cutoff points 6 (Fig. 6.15) voltage for green is stored in C2371 and that for blue in
C2372. 0 6 4 6 2 s e e s to it that, in c a s e of great beam
During frame flyback, the picture is s u p p r e s s e d . A small
currents, the voltage at pin 2 6 - I C 7 3 5 5 does not become
leakage current is flowing continuously. It flows through
greater than 12.7V. Also in c a s e of flash-over the large
R3479, R3480 and R 3 4 8 1 . T h e voltage measured a c r o s s
current flows away through D6462.
these 3 resistors arrivés at pin 26 of IC7355. During the
lOth to 13th line, a switch is closed by a pulse generator
Note
and this voltage is stored in C2375. This is the reference
voltage for the 3 cutoff stabilizers. During the 20th line the In reality, the 3 lines at which the beam current is
pulse generator adds a pulse to the R signal, during the measured are not always lines 20, 21 and 22, but the first
21 st line to the G signal and during the 22nd line to the B 3 lines after the vertical blanking part of the burst key
signal. T h e s e pulses produce a small beam current. At the pulse.
same beam current, the red, green and blue phosphor
dots produce different brightnesses. In order to cut off the 6.9. Beam current limitation (Fig. 6.16)
picture tube in the right way, the green beam current only
In c a s e of black picture (beam current = OA), pin 7 T S 5 6 2 0
flows through R 3 4 8 1 , the red beam current through R3480
stands at 23V. This is c a u s e d by the voltage divider
and R3481 and the blue beam current through R3479,
R3620, R3621 and the focussing current which also flows
R3480 and R 3 4 8 1 . Furthermore, the measured voltage is
through R 3 6 2 1 . At high brightness, the voltage at pin 7
stabilized at 0.5V, so that the cutoff current becomes
falls below the contrast voltage. D6383 will start to
equal to:
conduct and the contrast voltage will fall, causing the
0.5 V beam current to decrease a s well. T h e beam current of
G = nA. green flows through R 3 4 8 1 , that of red through R3480 and
= 15zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
33K R3481 and that of blue through R3479, R3480 and R 3 4 8 1 .
The voltage at the cathode of D6492 is fixed at 6 V by
0.5V R3491 and R3492. A s soon a s the beam current is
R =zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
=^2p.A sufficiently great, D6481, D6480 and D6492 will start to
43K conduct and the entire beam current will flow through
R3492. D6490 is usually conducting. A s soon a s the
0.5V voltage across R3492 becomes equal to 10.6V, T S 7 4 8 9 ,
B = = 7.7 nA D6381 and T S 7 3 8 2 will start to conduct and contrast will
65K be reduced.
D6642 s e e s to it that the voltage does not become greater
S o the pulse that enters at pin 26 IC7355 contains, besides than 12.6V and protects the circuit against high-voltage
the leakage current Information, 3 positive beam current f l a s h - o v e r . In c a s e of great luminance steps, the
pulses, namely during the 20th line for R, during the 21 st g1-cathode capacitances of the picture tube discharge
line for G and during the 22nd line for B. T h e pulse and an extra voltage peak is produced. This voltage peak
generator closes a switch and during the 20th line this c a u s e s D6491 to cutoff for a moment until R3490 has
signal (R signal in this line) arrivés at the inverting input of recharged the base-emitter capacitance of T S 7 4 8 9 and
the comparator. C2490.
T h e comparator compares the pulse with a voltage that is
0.5V higher than the leakage current voltage. T h e
comparator supplies a voltage, which is stored in C2370
for the next frame. This is a D C voltage for the R signal. It
comes out at pin 1 and is sent, via the R amplifier, to the
picture tube. If the cutoff voltage for red is too high, the
beam current for red will increase and consequently also
the pulse during line 20. During line 2 1 , the green amplifier
Is controlled and duhng line 22 the blue amplifier. T h e DC
IC7355
20 "'LINE
1600
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1 13 20 21 22 " Ü N E
T BEAMCURRFNT
BEAMCURRENT
~X. GREEN
P R S 02295
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Fig. 6.15
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Fig. 7.1
7.1.1. Sound demodulators (Fig. 7.2) to DC negative feedback with R3092 (4.5 MHz/6MHz),
R3105 (5.74 MHz) and R3109 (5.5 MHz). Capacitors
In receivers that are fit for the systems PAL B,G, SECAM
C2094, C2107 and C2111 decouple the input amplifiers of
B,G,L and NTSC M, the FM/AM demodulated sound
the demodulators for higher frequencies.
signals coming from the IF section are:
Only in PAL I sets, only half of IC7120 is used. The ceramic
In case of PAL B,G and SECAM B,G: filter 1108 is a 6 MHz filter and the reference circuit S5115,
5.5 and/or 5.74 MHz. These signals are modulated on the C2115 and R3115 is also adjusted to 6 MHz. The
SSP. transmitter identification circuit in the IF section gives a
In case of NTSC M : high level if there is no picture and the collector of TS7130
4.5 MHz. This signal is demodulated on the main panel then is low. This voltage goes to pin 5 of IC7120 in sets
U1000. with only PAL I reception, where the output is disabled. In
In case of SECAM L, L' : muIti sets, IC7125 is disabled. Consequently, there will be
The AM demodulation takes place in the IF section no sound if no picture is received.
(UI 018).
7.1.2. Stereo decoder (Fig. 7.3)
In PAL I sets, the IF sound signal is 6 MHz. It is
From IC7120 two low-frequency signals come to IC7125.
demodulated on the SSP UI001 in a section of IC7120,
The identification circuit recognizes stereo or 2-language
amplified by transistors TS7100 and TS7101 and applied
transmission and sends these data to an I^C bus register
to IC7125.
that is read and further processed for OSD by
microcomputer 1. Microcomputer 1 supplies Information
The FM signal goes via a high-pass filter (C2091 and on the choice betweem language I and language II, mono
R3091) and a 4.5 or 6 MHz ceramic filter to IC7090. The or stereo, via the I^C bus, to the matrix circuit. These
reference circuit is tuned to 4.5 or 6 MHz. The LF output signals come together at the sound source select switch
signal is amplified w/ith TS7096 and TS7097, the gain is in IC7125. Here, two more low-frequency signals come in,
fixed by R3099 and R3098 at about 1.6x. R3096, C2097 namely the demodulated AM signal (SECAM L,L') and the
constitute the de-emphasis circuit. demodulated FM signal 4.5 MHz or 6 MHz of UI 000, muIti
The output signal called muiti FM, is the LF signal coming FM. Via the PC bus, the Information on the television
from 4.5 MHz IF (M Standard) or from 6 MHz IF (I system received is written in a register and the select
Standard) and goes to IC7125 on the SSP. switch is set in the right position.
IC7120 contains 2 FM synchronous demodulators. One From the I^C register, 2 bits are brought outside IC7125 for
demodulator is tuned to 5.5 MHz/6MHz, the other switching over the IF, namely:
demodulator to 5.74 MHz. The IF input signal comes in via
a high-pass filter, 1104 or 1108 respectively. pin 11 for SECAM L and SECAM L'
S5105 and C2105 have been accommodated in the 5.74 pin 12 for Band I in SECAM L'.
MHz path, because the 5.5 MHz is insufficiently The select switch supplies 2x2 output signals. For EXT 1
suppressed by the ceramic filter. this is always the output signal of the internal channel
selector. For EXT 2 or the PAS a choice can be made from
The two low-frequency output signals, from which the several possibilities (EXT 1, EXT 3, EXT 4 or internal
remaining noise is filtered by means of C2117 and C2112, channel selector).
are AC coupled to IC7125. All input circuits are subjected
M U LT I FM
S5095
T T
zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
U1018 9 zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
C2091
H3095
—II—
U1016-24 )91/4 5MHI/6MHZ T fOEH
—w—
I .. - M - R3098
H eSOEh-
- # t O D C2097
5 ±22n
I
SSP S5114
C2112
330P
910p
C2104 1104/5 74MHz R3114
•nëöÊi-
'S5105 C2105
S910p
I ' C2113
4 —l ö —
ï i C2106
- H l—
7,6
-M-
'C7120 TDA2555
P AL I O N LY
-M-
T C2110 7,2
C2111 i4,
T 4 5 IC7120 P AL I O N LY
T
0-
( 1 NO PICTURE
U1016-29
. J Fig. 7.2
PRS 02357
I 26/713
4* I D E N T I F I C AT I O N
C2121 1
FRONTED 1
SOUND S E LE C T
M AT R I X
SWITCH
FRONTED 2
- 2 2 t-
I / I I
% BUS REGISTER
I PRS 02352
, T-26/724
Fig. 7.3
TO IF PART OF THE C T V.
CS 10 357
32
7.1.3. Identification circuit (Fig. 7.4) 7.1.5.1. Status register
The low-frequency signal coming from 5.74 MHz also For this register the slave address is: 1000 0101 85 (HEX)
contains the identification signal at 54.69 kHz. The signal "READ"
goes via a highpass filter C2121, R3121 to an amplifier
which has been tuned to 54.69 kHz with S5132, C2132. The contents of the status register consist of the following
After an AM detection, a signal of 117.5 Hz is formed in 8 bits:
case of stereo transmissions and of 274.1 Hz in case of a
b7 b6 b5 b4 b3 b2 b1 bO
two-language transmission. This signal goes to 2 tuned
POR STEREO
amplifiers, which only supply a signal at 117.5 Hz,
DUAL 0 0 0 0 1
amplifier A, or 274.1 Hz, amplifier B. This is rectified and
smoothed via C2128 or C2119, so that a "1" or a "O" is
Bit 7 is the power on reset bit. This bit is " 1 " after
obtained, which goes to an I^C register.
switch-on of the power supply but becomes "O" after the
The tuned amplifier works as follows: the input signal is
first valid read function of microcomputer 1. Bits 6 and 5
formed with a voltage divider, R3142 and R3143, so that a
are used for actuating the switches (Fig. 7.6).
very small signal is applied, via C2143, to the inverting
b6 (stereo) becomes "1" if the identification circuit defects
input of operational amplifier B. The negative feedback
a stereo transmission.
consists of R3141, C2142, C2143 and R3143. A first circuit
consists of C2142 and R3143 (R3143 smaller than b5 (dual) becomes "1" if the identification circuit defects a
impedance capacitor C2142 at 274.1 Hz) so that the dual-language transmission.
current (1,) leads 90° relative to V^^^, (Fig. 7.5). bO indicates the read action.
A second circuit consists of R3141, C2143 and R3143.
R3143 is negligible in this circuit and the impedance of 7.1.5.2. Output control register
capacitor C2143 is many times smaller than R3141. The For this register the slave address is: 1000 0100 84 (HEX)
current Ij in this circuit is determined by R3141 and is in "WRITE"
phase with V^^,. This Ig will generate a voltage across The subaddress for this register is : 0000 0000 00 (HEX).
C2143 that lags 90° relative to Vout. In this register, microcomputer 1 writes what signals are
The voltage across C2143 is shifted 180° relative to the sent to what outputs (see § 7.1.2.).
voltage across R3143. For the resonance frequency these
voltages are equally great, so no signal fromzyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
y^^^ is
available at ooint A. The negative feedback is O, the gain Source Select Record Select Sub address
is theoretically infinitely great.
620 K 14 K9 MUTE1) 00
Mono R+L R+L R+L R+L 10
For 274.1 Hz this becomes: =
Stereo R L R L 2A
14 K9 O K36
T1=Language (1) Til Tl Tl Tl 12
For all other frequencies the signal is subjected to T2=Language (II) Til Tl TM Til IE
SECAM L, L' AM
negative feedback and the gain is small. 2) AM AM AM 70
Operational amplifier A is tuned to 117.5 Hz and has its PAL 1 MFM 3) MFM MFM MFM 7F
maximum gain at this frequency. NTSC M MFM 3) MFM MFM MFM 7F
CS 10 358
IC7125
T D A8 4 0 5
SDA
O
I^C BUS zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
>-
C2121
R > zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
IIzyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
-J-
-w-
26
C2128 C2129
lOOn ilO O n
Jc2132
Ja gQ p'
C2140
—II—
PRS 02349
T-26/723
Fig. 7.4
1 i 1
V fl3 | 4 3
1 2 VOUT
' VC2143
PRS 02348
T-26/712
Fig. 7.5
IC7125 / T D A8 4 0 5
AM P LI F I E R D E M AT R I X
LANGUAGE zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
I o, 0 2 1 16 R3124 R3126 R3127 lp,
2R , C2113 R3122
zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
LANGUAGE JL-i^ ID-B^ Q k J ] -
Fig. 7.6
Pin 12 - IC7125 drives the picture and sound circuits in the In the IF section, pin 11-IC7125 drives the + or - AGC and
IF section and pin 12 is high in case of PAL B,G; SECAM the 180° phase shift in case of positive modulation.
B,G and SECAM L' Band I. Consequently, pin 11-IC7125 goes high at SECAM L and
SC21 SC20 SECAM L'
0 0 pin 12-IC7125 low (OV) SC11 SC10
0 1 pin 12-IC7125 high (+12V) 0 0 pin 12-IC7125 low (OV)
1 0 pin 12-IC7125 not defined 0 1 pin 11-IC7125 high (+12V)
1 1 pin 12-IC7125 not defined 1 0 pin 11-IC7125 not defined
1 1 pin 11-IC7125 not defined
7.1.6. Control amplifier IC7180 (Fig. 7.7) 7.1.6.6. Volume and tone controls
The signals coming from pin 19 and pin 20 IC7125 go to The volume of the L and R channels are separately
IC7152, the source select IC. The selected source is controlled, so balance can also be controlled with it.
switched through to IC7180 on the PAS, UI 003. The Volume can be adjusted from +16 dB to -46 dB. The
signals coming from pin 21 and pin 22 IC7125 go to EXT crossover point of bass control is determined with C2189
1 and the record select IC7135, which sends the signals to for L and with C2188 for R. The adjustment range is from
EXT2on the SSP, UI001. -12 dB to +15 dB. The crossover point of the treble
control is determined by C2195 (L) and C2194 (R). These
7.1.6.1. Input select switch controls are carried out by microcomputer 1 which sends
its commands via the I^C bus to IC7180. Microcomputer 1
Input 1 pin 26 pin 28-IC7180 receives its RC5 command via microcomputer 2.
Microcomputer 2 also passes the local keyboard
mono mono mono commands on to microcomputer 1, so that these
stereo L R commands are also sent via I^C to IC7180.
dual 1st language 2nd language For the HiFI receiver the frequencies round 63Hz, 250 Hz,
1kHz, 4kHz and 16kHz can be amplified extra by means of
A second input voltage can be applied to pins 1 and 3. The an equalizer, UI 015. The gain is adjustable with slide
input select switch can be actuated via the I^C bus and potentiometers at the front of the HIFI receiver.
selects input 1 or 2. In chassis 3A the input select switch The equalizer, UI015, is situated in the signal path from
is always available at input 1 and input 2 is not used. the source select switch IC7125 on the SSP, UI 001, to the
control amplifier IC7180 on the PAS, UI003.
7.1.6.2. Headphone language selection
There are two selection possibilities, one for the 7.1.6.7. I^C bus control of IC7180
loudspeakers and one for the headphone signals, which The slave address of the input register of IC7180 is 1000
are separately controllable via I^C. 000 MAD R/W MAD = digital ground.
In position mono or stereo, SKI and SK2 are closed. In MAD: is "O" if pin 16 is connected to ground and " 1 " if pin
case of LANGUAGE I, SKI and SK3 are closed and in 16 is connected to +12V. In chassis 3A, pin 16
case of LANGUAGE II, SK2 and SK3. The change-over to IC7180 is connected to ground. In IC7180 only
LANGUAGE I or LANGUAGE II takes place in this control writing can take place, so the slave address = 80
amplifier and is dependent upon the loudspeakers and the (HEX).
headphone signals.
LS=Loudspeaker
7 .1.6 .3. Headphone volume control HP=Headphone
D=information "0 "or"1 "
The gain is controllable between O dB and -62 dB, so the Function Sub Address Data (HEX)
output signal can be amplified l x at the most.
Volume LS Lett (L) 00 1 1DDDDD D
Volume LS Right (R) 01 1 1DDDDD D
7.1.6.4. Pseudo stereo (Fig. 7.8) Bass 02 1 111DDD D
Treble 03 1 111DDD D
In case of pseudo, the right signal is switched through and Switch functions LS 08 1 1 MU EFL STL ML1 MLO IS
the left signal is shifted in phase so that, at low Volume HP Left (L) 04 1 1DD DDD D
frequencies, the listener hears the left signal a little later Volume HP Right (R) 05 1 1DDDDD D
than the right signal. As a result, it seems as if these Switch functions HP OC 1 1 1 1 EXS MH1 MHO 1
frequencies come from
the right. At high frequencies, the L signal leads the R The volume for the loudspeakers or headphones is
signal, so the sound apparently comes from the left. At controlled with 6 bits. As b6 and b7 = 1, the data for
very low and very high frequencies both channels are in volume is:
phase. The turnover frequency is fixed at 800 Hz with max. = FF
C2190 and C2191. For this frequency the phase shift is min. = EO
180°. mute = CO
7.1.6.5. Spatial stereo (Fig. 7.9) Bass and treble are controlled with 4 bits, the data is:
max. = FF
Part of the left signal -L/X is added to the right signal. min. = FO
The vectorial addition of L and -L/X yields the L' signal
which apparently comes from a loudspeaker that is further The switching possibilities of IC7180 are classified as
down on the left. In this way the R-signal is seemingly follows:
shifted to the right by adding part of the right signal -R/X * Input Select (IS)
to the left signal. IS =0" INPUT of pin 26 and pin 28 IC7180
X is the amount of signal that is mixed; this is frequency IS =^'1" INPUT of pin 1 and pin 3. This possibility is not used
dependent and is determined by C2192 and C2193. in the 3A design.
33
C2193
3n9 i33n ±5n6 ±5n6
I C 7 1 8 0 / T D A8 4 2 0
MODE SELECTION
LOUDSPEAKER
C 2 I8 4
fS K3
OT
SED
I
VOL
HP
'S K 2
PRS 02302
T33/713
Fig. 7.7
APPARENTLY zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIH
FROM L L
PRS 02311
T -2 6 /7 1 2
* Selection for loudspeakers (LS) and headphones (HP) Depending on the desired position, microcomputer 1 will
choose via the I^C bus from the following possibilities: *
MLO ML1 MHO MH1 Pseudo/spatial
stereo 1 1 1 1 Spatial 1 1
Ist language 1 0 1 0 Stereo 1 0
2nd language O 1 0 1 Pseudo 0 1
EXS
This function is not used in chassis 3A.
CS 10 359
34
7zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
.1 .7. Output amplifiers TDA 1514 (Fig. 7.10) 3. At switch-off:
Immediately after switch-off, at the smallest
7.1 .7.1. Adjustment and gain
decrease of the 140V, the current disappears
IC7200 is powered with + and - 27V. These voltages through the opto-coupler of the main supply.
come via R3200 and R3201 at the power output TS7194 will stop conducting and TS7185 will start
stage of IC7200. The differential amplifier and conducting. As a result, TS7186 and TS7187 will
voltage amplifier in IC7200 are powered with the also start to conduct and the mute circuit will come
bootstrap voltage which is supplied via R3184 and into action to avoid the switch-off plop. The mute
R3202. At maximum power this voltage will not circuit connects the 2 mute inputs via R3188 and
decrease because of the current through the power R3189 to the negative supply voltage.
output stage.
7.1.7.3. DC protection (Fig. 7.12)
DC adjustment:
The non-inverting input is connected to ground via A voltage division of +27V and -27V by means of R3196
R3203, the inverting input and the output are also at and R3197 normally yields OV. D6196 and D6197 are not
ground potential, so no coupling capacitor is needed conducting, so TS7224 and TS7225 are not conducting
to the loudspeaker. either. If the voltage division causes a voltage greater than
4.5V, D6196 will conduct, D6197 will stabilize and TS7224
The gain is fixed at 19x by R3207 and R3205. will conduct also. A -4.5V voltage causes D6196 to
R3210, C2210 form the so-called Boucherot filter to stabilize and D6197 and TS7225 to conduct. In both cases,
avoid oscillations. TS7226 is conducting and the overvoltage protection is
C2204, C2221, C2222 and C2223 decrease the turned on by driving thyristor TH6698 into conduction. If
radiation of the set. both voltages are short-circuited with one another, the
The output signal is intended for extra loudspeakers circuit does not work. However, D6200 is conducting and
of 22W. The set houses 2 small 4W loudspeakers causes TS7226 to conduct, as a result of which the
with a series resistor of 15 Ohms. overvoltage protection is turned on again. If the output
Via a voltage division by means of R3225 and voltage of one of the output stages supplies an average
R3226, the signal goes to the so-called variable voltage greater than 0.6V or lower than -0.6V, TS7224 or
level output. TS7225 will start to conduct and turn on the overvoltage
protection. C2225, R3221 and R3222 see to it that only an
average voltage is reacted to.
7.1.7.2. Anti-plop and soar protection (Fig. 7.11)
The sound output amplifiers for the left and right channel 7.1.8. Headphone amplifiers (Fig. 7.13)
are identical. The positive supply voltage is applied to pin Here, only one amplifier is drawn, namely IC7231. The
3 - IC7200. If the voltage at pin 3 - IC7200 becomes lower second amplifier consists of IC7230.
than +7V, IC7200 is turned off. Pin 3 - IC7200 can be The headphone amplifiers are powered from the +27V
turned off in the following three ways: across D6710, so that 22V is left.
1. By the SOAR protection in IC7200 (SOAR = Save Pin 6 is the mass of the differential amplifier, pin 4 the
Operating Area). mass of the output stage. Pin 4 is connected to the
In IC7200 a SOAR protection has been applied, pin headphone plug.
2 will be rendered low if:
- the supply voltage becomes greater than 40V Capacitor C2239 smoothes the supply voltage.
- the output current becomes greater than 4A
- the output power becomes greater than 30W per output The signal is applied to the non-inverting input and the
transistor. internal negative feedback provides a gain of 70x.
Since pin 2 is connected to pin 3, the mute circuit is The output signal goes to the headphone plug via C2241
controlled. and R3235.
CS 10 360
lc2.
lOOOp
R3190 C2203
L O—r3k?]—01—T—
IC7200/TDA 151 -O EXTERNAL
LOUDSPEAKER
IC7180-18 1M IR3203
i-VS
IC2201 PRS,02355
^2200M T-26/713
Fig. 7.10
R3189 zyxwvutsrqponmlkjihgfedcbaZYXWVUT
ïn— zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFED
- T ë k Bl — O 107210
IJ: 2 v » —I t—
I C2209 R3208
—01 1 1 0 0 E | - ^ -VS
7194 Ö6 1
MUTE SOAR
IC7200
TDA 1514
ï PRS 02354
T-26/713
Fig. 7.11
3V3 3V3
hR 3 1 9 6
IC2225
PRS.02266
T33/712
R3230
Fig. 7.12 .27 -CJ11>
1 .:2230
I220|j
r ^ 1 ,
' IC7231 / TDA2611
C2231 1
Ca H Ik
1 11 T C2241 R3235
33Cn 02233
^1 n '9
I 1
—
FROM
IC7230
, 6 4 8 TDA2611
:2239
33M
PRS.02272
T33/711
Fig. 7.13
Fig. 7.14
CHARTER 8 S Y N C CIRCUIT
IJ 1
zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONM
i—' HOR>
STTV
from C C T W\0 EAST
SYNC
PROCESSOR WEST
M '000
PRAME DEFLECTION
P R S 02756
T- 13/726
Fig. 8.1
YES
C V B S --SYNC.
C V B S --SYNC.
S T T V - SYNC.
CVBS-SYNC.
YES
STTV-SYNC. S T T V - SYNC.
YES
C V B S - SYNC.
Fig. 8.2
8 zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
.3. Sync IC, IC7531 (TDA2579)
8.3.1. Sync separator {Fig. 8.4) - If the incoming signal has a good s i g n a l - t o - n o i s e ratio,
The C V B S signal enters, via a l o w - p a s s filter with 3 d B the voltage at pin 18 becomes 10V. A great time
crossover point at about 2 MHz (R3532, C2532), at pin constant is switched on and the lock-in range lies near
5 - I C 7 5 3 1 . In block A, the black level and the top sync level the sync pulse.
are detected and stored in C 2 5 4 0 and C2539, respectively.
With this the reference level is determined at which the Note:
sync pulses are separated from the rest of the C V B S During frame flyback, all 3 internal resistors are connected
signal. A noise detector blocks the sync separator if the in parallel for V C R reproduction. In this way, a very small
noise level is greater than 0.7V. time constant is switched on during flyback. This applies
to all program numbers, so each program number is also
8.3.2. Horizontal synchronizatlon and oscillator (Fig. 8.4) suitable for V C R reproduction.
C S 10 362
SYNCHRONISATION & GEOMETRY CONTROL
TO GROM TO TO
PROC 10-107571 2-IC757
11-IC7571
PRS 02547
Fig. 8.4 T-04 723
OV- NO PICTURE
7.6V= 60HZ
12V= 50H2 HOR HOR
CENT FREQ.
E-W CONTROL
FRAME CONTROL
Fig. 8.5
In Fig. 8.6 a survey s h o w s how the parameters are A s soon a s this address is received, the status register
controlled. appears at the data bus. T h e status register is an 8-bit
T h e controlled signal goes to the non-inverting output of register made up of:
an operational amplifier. T h e output of this amplifier (pin
b7 b6 b5 b4 b3 b2 b1 bO
20) controls the frame output stage. Via a feedback to the POR H.LOCKN. H.Cent. 50/60HZ 0 0 0 0
inverting input of the operational amplifier (pin 21), the
frame output stage is controlled. POR: power on reset:
At start-up or at each voltage interruption this bit is " 1 " .
8.4.2. E a s t - W e s t control After a valid read function this bit becomes "O".
A parabola is formed of the frame s a w - t o o t h . This
H.LOCK N. and 50/60 Hz:
parabola is controlled with 5 parameters :
Binary presentation of the voltage that is available at pin
- picture width
11 of IC7571.
- E - W correction
50/60 Hz Is the Information concerning the frame
- E - W corner correction
frequency. H.LOCK N. is high if the horizontal oscillator
- trapezium correction
Is not synchronized.
- horizontal beam current correction.
11-IC7531 H.LOCK N. 50/60 Hz
In Fig. 8.7 a survey is given of how the parameters control
this parabola. T h e parabola is amplified via an output
stage and c o m e s out at pin 1 9 - I C 7 5 7 1 . OV (no Vision) 1 0
Function sub a d d r e s s b7 b6 b5 b4 b3 b2 bi bO
LINEARITY E-W
. PARABOLA
S-CORRECTION
V-SHIFT TRAPEZIUM
V-EHT H-EHT
COMPENSATION COMPENSATION
9.1. Block diagram (Fig. 9.1) voltage amplifier, which inverts the signal, and the
current amplifier.
- T h e frame output amplifier functions a s an operational
amplifier.
T h e flyback generator in IC7552 s e e s to it that the supply
voltage for the output stage is increased during the
- T h e differential amplifier is situated in I C 7 5 7 1 , the
flyback.
geometry processor. T h e geometry processor receives
at its inverting input a s a w - t o o t h pulse that is
- A protection circuit s e e s to it that, if there is no vertical
controlled according to the geometry parameters. At
deflection, pin 7 becomes 2.5V. This is sent together
the non-inverting input c o m e s a reference signal from
with the sandcastle pulse to the M S D panel, U I 010,
the deflection current measured a c r o s s R 3 5 6 1 , R3562
where the entire vision is blanked. This protection is
and R3563.
activated if the temperature in the IC becomes too high,
or if the IC c o m e s outside its specifications.
Theoretically the voltages at both inputs are the s a m e .
During the s c a n this is practically the c a s e . During flyback,
9.2. DC adjustment
the counter - emf of the deflection coil s e e s to it that the
deflection current cannot follow the input voltage. T h e The non-inverting input is adjusted to 2.2V, controllable
differential amplifier then supplies a minimum voltage. T h e with the vertical centring. T h e inverting input is also at
voltage at pin 20 is not inverted relative to pin 2 1 . T h e 2.2V. T h e output voltage is determined by R3560 and
inverter of the operational amplifier is situated in the R3558.
voltage amplifier.
3K9 + 750E
- T h e output signal from the differential amplifier c o m e s V„,, = 2 V x = 13.2V
in at pin 1 and j ) i n 3 of IC7552. IC7552 h o u s e s the 750E
C S 10 363
38
9.3.zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
A C feedback During the s c a n , the frame output stage is powered by the
+26V via D6553 and C2555 is charged to 13V.
T h e non-inverting input of the differential amplifier is At the end of the s c a n , a large current is flowing through
controlled with a s a w - t o o t h by the geometry control. T h e the deflection coil and T S 5 . At the beginning of the flyback,
resultant s a w - t o o t h current, which flows through the T S 5 is rapidly cut off via a disabling circuit. T h e deflection
deflection coil, the parabolic capacitor C2654 and the coil generates a counter - emf, because of the fact that
resistors R 3 5 6 1 , R3562 and R3563, c a u s e s a s a w - t o o t h the current in the coil cannot change infinitely fast. This
voltage a c r o s s these resistors. T h e saw-tooth voltage is current flows to the +26V via D 1 , C2555 and D2. D6555
applied, via the circuit consisting of R3560, R3559 and cuts off and C2555 is charged further. The voltage at pin
C2559, a s feedback voltage to the inverting input of the 6 - I C 7 5 5 2 is the sum of the +26V and the charge of C2555
differential amplifier. B e c a u s e of the great loop voltage (40V). If the voltage at pin 5 - IC7552 exceeds 26.7V, T S 6
gain, the inverting input should have the same signal a s will start to conduct, causing T S 7 and T S 8 to start to
the non-inverting input. With this the deflection current is conduct a s well.
determined
T h e current now flows via T S 8 , C2555 through T S 4 to the
T h e operational amplifier controls the gain until the deflection coil. The voltage at pin 6 - IC7552 is now equal
s a w - t o o t h at the inverting input is equal to that at the to abt. 40V (sum of the voltage at pin 8 - IC7552 and the
non-inverting input. This c a u s e s a s a w - t o o t h current of charge of C2555).
2A through R 3 5 6 1 , R3562 and R3563. This deflection
At the end of flyback, the voltage at pin 5 - I C 7 5 5 2 falls and
current charges a parabolic voltage a c r o s s C2654 and,
when it falls below the 26.7V, T S 6 will cut off, followed by
a c r o s s the deflection coil, a block pulse and a s a w - t o o t h
T S 7 and T S 8 . T h e frame output stage is powered again via
pulse are formed, c a u s e d by the ohmic resistance of the
D6553, and C2555 is recharged again.
deflection coil. At the output the w e l l - k n o w n composite
frame pulse is generated.
9.5. Protection system
When the frame output stage does not supply a pulse,
9.4. Flyback generator (Fig. 9.2) there is no flyback either. In IC7552, a protection h a s been
T h e frame output stage requires a voltage of about 26V incorporated. When there is no flyback, pin 7 - IC7552 will
during frame s c a n . This voltage is fed to 6 - I C 7 5 5 2 via supply a high voltage. This voltage is sent to the
D6553. During frame flyback, however, a supply voltage of chrominance I C , IC7250, at the M S D , U1010, causing the
about 50V is needed. This voltage will be supplied by the vision to be blanked.
flyback circuit.
Fig. 9.1
•26«
PaS02439
T-26/714
Fig. 9.2
C S 10 364
C H A P T E R 10 LINE OUTPUT S T A G E AND E A S T - W E S T
MODULATOR
T h i s chapter is the s a m e for receiver and monitor.
10.1. Principle of the line output stage again, which yields the s a m e A l / A t a s during t,.
At the moment that the current wants to change direction,
For the desired deflection of the electron beams, a
T S takes the current over again, because it receives a
s a w - t o o t h current is needed through the deflection coil L
positive control voltage again at t^, which is prior to this
(in first approach). In an idealized diagram this can be
moment. T o make sure that T S starts to conduct on time,
represented a s follows, Fig. 1 0 . 1 .
to should always be before t, (in the hatched part of Fig.
10.2).
Via the primary winding of line transformer T 5 6 2 0 and
deflection coil L, C 2 is charged to 140V (Fig. 10.1). This
The scan sends a line onto the screen. During the flyback,
charge stays practically constant, because C 2 has a great
the electron beam returns to the beginning of the next line.
value. The deflection angle of the electron beam is about linearly
T h e control for transistor T S c om es from the sync I C , proportional to the deflection current. At a constant
I C 7 5 3 1 , pin 1 1 . angular velocity a (Fig. 10.3), the electron beam will move
During t^-tg, the input voltage is positive (Fig. 10.2). more quickly at the edges of the practically flat picture
A s a result, transistor T S is in saturation and its collector screen than in the centre. T o make the electron beam
voltage is zero. Consequently, L is in parallel with C 2 , so write at a constant velocity all the same, the deflection
a constant voltage of 140 V is present a c r o s s both of current is deflected at beginning and end of the picture
them. tube. This yields a kind of S - s h a p e in the deflection
A s a result, a s a w - t o o t h current starts to flow through L current and is therefore called S-correction.
and T S . At tg, the input voltage becomes negative and In order to obtain the S-correction, C 2 cannot be chosen
disables T S . T h e current that flowed through L, flows infinitely great. A s a result, the voltage across C 2 is not
further through C l , thus transferring energy from L to C l . constant either (Fig. 10.4). At the beginning and end of the
T h e current through L d e c r e a s e s cosinusoidally, and the s c a n , the voltage is smaller than 140V. In the middle of the
voltage a c r o s s C l increases sinusoidally. s c a n , the voltage is greater than 140V. Consequently, the
At a given moment, all energy has been transferred from current through the deflection coil h a s a smaller A l / A t on
L to C l and the energy recovery begins during tg - t^. C l the right and on the left of the screen, and a greater one
now feeds current back to L, so the voltage a c r o s s C l in the middle. A s a result, the speed at which the electron
d e c r e a s e s cosinusoidally and the current through L has a beam moves a c r o s s the screen is constant.
s i n e - s h a p e d curve.
If, now, all energy from C l were transferred again to L, the
A L O T (Line Output Transformer) is used a s a choke. It is
voltage a c r o s s C l would want to become negative.
needed to compensate good the losses in the deflection
However, diode D now starts to conduct at t^, causing L to
system. With the L O T , several auxlliary voltages are
be in parallel with C 2 again. T h e voltage across L is 140V
obtained a s well.
5620
+ 140V
+ 140V
42 068 BI 2
Fig. 10.1
I 42 070 BI 2
Fig. 10.2
Ax Ay Ax
42 065 Al2
Fig. 10.3
39
42 0 6 6 Al 2
Fig. 10.5
CS 10 365
40
In this figure, T5620 is the LOT with primary winding This paraboiic voltage is derived in the geometry
15-17 as choke. S5612 is the linearity coil and R3614 and processor IC7571 and an East-West modulator Is
R3615 prevent S5612 from ringing with its own parasitic controlled via transistor TS7598, see 10.3.2.
capacity. The winding 1 - 14 of T5620 and the bridging At a varying beam current (= brightness), the frame
wires 9645 to 9648 are used for the adaption for the amplitude will vary. The reason for this is that the high
different picture tube sizes. For picture tubes with 110° tension varies if the beam current changes. More power is
deflection (24" : A59EAK00X03 ,27": A66EAK00X03 and asked from the LOT, causing the EHT to decrease. This in
33": A78EBK01X01) the bridging wires 9645 and 9646 are turn causes a changing deflection of the electron beam.
present, so that 180V becomes available across the For this reason, the line deflection is corrected by means
deflection circuit (140V across C2612 + 30V at pin 4 T5620 of a control voltage that is derived from the beam current
+ 10V across winding 1 - 14). Information (beam current correction).
For picture tubes with 90° deflection (17": A41EAM00X03
and 21": A51EAL00X03) a smaller deflection current is Furthermore, the frame amplitude must be made variable
needed, so that the direction of current through winding 1 because of the tolerances in the deflection circuit. A
- 14 T5620 is reversed by replacing the bridging wires solution for this is the East-West modulator. This Is in fact
9645 and 9646 by 9647 and 9648. In this way, 160V an extra resonance circuit equal to the deflection current.
becomes available across the deflection circuit. TS7618 is
the line output transistor which, via control circuit TS7631, 10.3.2. East-West modulator (Fig. 10.9)
TS7630 and T5632, receives a square-wave signal from
sync processor IC7531. The aim of the control circuit is to Both circuits are tuned to the same frequency (so they
supply a sufficiently great base current for the line output have the same flyback time). The intention is that the
transistor TS7618. To prevent the voltage across the supply voltage across the deflection circuit (V^j) should be
primary winding of T5632 from ringing when TS7630 is cut modulated with a paraboiic voltage. The voltage at pin B
off, the circuit C2633, R3633 and C2632 has been applied. must remain constant, otherwise the auxiliary voltages
The primary winding of T5632 is highly damped by this. from the LOT would also be modulated with this paraboiic
voltage.
By varying the supply voltage across the modulator, the
10.3. Principle of the East-West modulator supply voltage across the deflection circuit will vary with
10.3.1. East-West correction the same, though opposite, value. For, there should be a
A picture tube in principle has the following geometrie voltage equilibrium across the coils.
distortion, Fig. 10.7. This is called pin-cushion distortion. In that case, the total supply voltage across the entire
circuit will be constant. The modulator is controlled at pin
A. This control looks as shown in Fig. 10.10.
The distortion of the top and the bottom of the picture is
corrected by means of the picture tube and the deflection
coil construction (North-South correction). The geometry control contains the following five controls:
The new types of 90° flat-square picture tubes do not amplitude; East-West correction; East-West corner
need EastWest correction anymore (raster correction free correction, trapezium correction; beam current correction.
See 8.4.2.
picture tubes). The 110° picture tubes do need East-West
correction.
The East-West correction implies that the amplitude of the
line deflection current is frame-frequency-modulated in a
paraboiic way, Fig. 10.8.
27'•+24-
AT4042/92
+24- 360n
470n
330n
. C2612 zyxwvutsrqponmlkjihgfedcbaZYXWVU
27--t-24- 910R
2 r + 1 7 " 1k8
9. l|2tL
FROM 11-IC7531
PRS. 02548
T-04 723
Fig. 10.6
C S 10 366
Fig. 10.7
64/jS
rrttTF
JUUULO
20ms
42 064 Al 2
Fig. 10.8
10.4. Generation of extra high tension EHT, Focussing b. The contrast control, on the MSD in IC7355, to reduce
voltage and V^j voltage (Fig. 10.11) the contrast if the beam current becomes too great.
The high tension is obtained by rectifying the AC voltages
In the high-tension cable two resistors have been
across the high-tension windings and adding them up
according to the diode-split method. The pulse voltage incorporated with the following objective:
across winding a - b is rectified by diode D l , as a result
of which the so-called intermediate-layer capacity Cl will a. Avoiding a complete short-circuit of the line
be charged to a DC voltage that is equal to the peak transformer in case of a flash-over in the picture tube.
voltage across winding a - b. The pulse voltage across b. Avoiding radiation of the line frequency or harmonies
winding c - d is rectified by means of diode D2, so that a thereof, which cause interference in the long- and
DC voltage equal to the peak voltage across winding c-d medium-wave reception of radio receivers.
becomes available across C2. The pulse voltage across One of these resistors is an NTC, to stabilize the EHT: if
winding e - f is rectified by D3, thus charging C3 to the the average beam current increases, the NTC becomes
peak voltage across winding e - f. In this way a DC hot. Consequently, the resistance value will become
voltage of about 25 kV is generated across the smaller, causing the EHT to become greater and thus
series-connected capacitors C l , C2 and C3, which is stabilized.
used as anode voltage of the picture tube.
The DC voltage, which is formed after rectification of the The heater voltage of the picture tube is supplied by
pulses across winding a-b (abt. 6.25 kV), is used for winding 8 10 of T5620. The series-connected coils S5637,
focussing. The focussing voltage is adjusted with R1474. S5465 and S5466 act as a matching element for the heater
With R3474 the Vgg voltage at pin 7 of the picture tube is current.
adjusted.
10.5. Derived supply voltages
The beam current information present across R3621 is
passed on to: These voltages are obtained after rectification of line
a. The East-West generator to avoid picture width pulses by means of the circuit shown in Fig. 10.12.
variations as a result of beam current variations.
> DEFLECTION V,
> MODULATOR
42 062 Al 2
Fig. 1 0 - 9
T5520
42 086 B12
Fig. 10*11
41
•
GEOMETRY CONTROL
42 063 A12
T5620 S5465
10 X
PICTURE TUBE
R3241
FILAMENT
S5637 S5466
R3638
-Oh D6638
•200V
R3639
-OH
-M-
C2638
'3^3
15
140VI
18
D6642
—M 7V SOPS
5zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
Yklll? S5642
•CCT
Fig. 1 0 ' 1 2
CHARTER 11 T E L E T E X T D E C O D E R
T h e teletext decoder is identical for receiver and monitor.
For a detailed description of the C C T decoder, reference
is made to the description : Circuit Description Computer
Controlled Teletext.
C S 10 367
42
CHARTER 12 RICTURE IN RICTURE (RIR)
8 LINES
4 LINES
PRS 02763
T-26/726
LINES V,H~SYNC
22 - BLANKING
23" - ACTIVE VIDEO
-ACQUIRED VIDEO
240
-I-
24
3 ::
-4 4-
12 12 48 2 ; psec
a) 50Hz
LINES V,H-SYNC
17 - BLANKING
1: -ACTIVE VIDEO
-ACQUIRED VIDEO
240
12 48 ;2 ; psec
PRS 02765
b) 60Hz T -26/726
Fig. 12.2
46
2. RGB,, = R G B , , . PIP,, 12.5.1. Block diagram (Fig. 12.11)
= P I P , , + RGB,,, The selected CVBS signal, from the IPP, is fed to 3 circuits
on the PIP box:
This means that RGB is active if an RGB signal comes a. a low-pass filter, where the Y signal of the CVBS signal
BL BL1 is separated.
from EXT 1 or if there is a PIP signal. b. a multi-standard decoder which generales the U ( B - Y )
BL and V ( R - Y ) signals.
c. a sync circuit which generates a horizontal and a
3. T X T , , = TXT,, . (PIP,, . P4) vertical acquisition pulse.
C S 10 372
SAND
dzök}-
t6145
hBA317 >1 -
1 A l
P R S 02747
T-26/726
Fig. 12.8
12104
S zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
470(1
PRS 02748
T-26/726
Fig. 12.9
5621
12»,
FROW 2K32 3821
M26
"1
FROM IK34
W28 ^> Has}- I2|j
Byv27
150 3824
PRS 0210!
112 ;717
Fig. 12.10
The truth table looks as follows:
The period time of the Sg signal is about 0.4 ns. The period
time of the signal is approx. 1.6 ^ s . This means a
sample frequency of 2.5 MHz and 625 kHz respectively.
—4— Irom 23,33 U1300
* Every 2nd U (U') and 2nd V (V) sample is not used for 7276
outputs are bit ADO to bit AD5. The sample frequency -O—O—
ADCL (Analog-Digital "CLock") is 5.33 MHz. Only 5 bits ADC
are used on the thick-film unit. The digitized multiplexed
signal is fed to the thick-film unit. 2280
unit will be described, followed by each individual block. C5», Xi i ï PRS 02749
T-26/726
because the least significant bit falls out. The contents of (g)
SHIFT
zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
I— I REGISTER k-l
i L i
ffom EPIPCO
CONTROL zyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
1. .^'^P. .'^.'5^!b^. J
REG OUTPUT
BUFFER
FLIPFLOP • to MULTIPLEXER
ttom CPIPCO
PRS.02770
T-26/726
Fig. 12.22
to/lrom H A M
COLOUR
SELECTION
PRS 02767
Fig. 12.23 T--26/726
Block F provides the right timing to the EPIPCO IC. The 8-bit internal data bus and the 3 x 5-bit DACs (for Y, U
control block (G) is controlled by the VF3 signal. This is a and V). The "display" data path provides the frame around
line- frequency signal generated in the EPIPCO IC. It is the PIP. The acquisition control block, block (D), controls
now used to determine the coëfficiënt K, indicates when the analog multiplexer, the EDVF, contains even/odd
adding should take place and can give a complete reset. frame Information, the write address in the RAM and the
I^C recelver clock signal. The address multiplexer, block
12.5.7.3. EPIPCO IC (Fig. 12.23) ^ (E), is controlled by the acquisition control block and
controls the independently generated read and write
In this figure the functional main blocks of the IC are actions.
drawn. The acquisition data path (block A), is the interface
The display control block (F) supplies the RAM control
between the 5-bit data input signal and the 8-bit data bus.
signals, a PIP fast blanking signal, a control signal for the
This "adaption" takes place by means of a line memory.
address multiplexer and generates the read address. The
This is necessary because the organization of the
entire process takes place via the pC recelver which is
memories is not based on 5 bits but on 8 bits (10k8). The
controlled from microcomputer 2, IC7830.
"display" data path provldes the adaption between the
CS 10 375
List with abbreviations
AC alternating current
AGC automatic gain control
AM amplitude modulation
ASCII American Standard code of Information
interchange
AVM audio video monitor
AV tuner audio video tuner
CCT computer controlled teletext
CDP control and display panel
CITAC computer interface for tuning and analog
control
CTI colour transient improvement
CVBS colour video blanking & synchronization
DBK display burst key
DC direct current
EAROM electrically alterable read only memory
EEPROM electrically erasable programmable read only
memory
EMF eiectrical magnetic force
FBL fast blanking
FF flip-flop
FM frequency modulation
FST frequency synthesized tuning
HD horizontal display pulse
HF high frequency
HiFi high fidelity
|2C bus inter IC bus
ICD interface for colour decoding
IF intermediate frequency
IPP interface and power supply panel
IR infrared
IS input select
LED light emitting diode
LF \N frequency
\ozyxwvutsrqponmlkjihgfedcbaZYXWVUTSRQPONMLKJIHGFEDCBA
LOT line output transformer
LS loudspeaker
MCP monocarrier panel
MFP mains filter panel
MSD multi-standard decoder
NTSC national television system committee
OSD on screen display
PAL phase alternation line
PAM power amplifier monitor
PAS power amplifier sound
PIP picture in picture
POR power on reset
PTP picture tube panel
QSS quasi split sound
SECAM sequentiel a memoire
SW switch
SOAR safety operating area
SOP sound output panel
SOPS self-oscillating power supply
BC beam current
SSP source selection panel
STTV synchronization to television
TXT teletext
VD vertical display pulse
VHP video housing project