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Unit IV CAL 817 Operating System

Unit 4 of the operating systems course covers memory management and virtual memory. Key topics include logical vs physical addresses, address binding at compile, load, and execution time, memory management units, dynamic loading and linking, swapping, contiguous allocation, fragmentation, paging, page tables, and memory protection using protection bits. The unit also discusses shared and private memory pages.

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0% found this document useful (0 votes)
14 views

Unit IV CAL 817 Operating System

Unit 4 of the operating systems course covers memory management and virtual memory. Key topics include logical vs physical addresses, address binding at compile, load, and execution time, memory management units, dynamic loading and linking, swapping, contiguous allocation, fragmentation, paging, page tables, and memory protection using protection bits. The unit also discusses shared and private memory pages.

Uploaded by

RAZEB PATHAN
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Unit IV

Subject: Operating System


Subject Code : CAL817

Department of Computer Application

Dr. Amit Sharma


Associate Professor
School of Computer Application
CSL-628Operating System
4 credits (3-1-0)
Unit-1:

Introduction to the Operating System (OS), Types of OS: Batch System, Time Sharing
System, Real Time System. Multi Programming,Distributed System, Functions and Services
of OS.

Unit-2:

Process Management: Process Concept, Process State, Process Control Block, Process
Scheduling, CPU Scheduling - CPU Scheduling,Scheduling Criteria, Scheduling Algorithms,
Preemptive & Non Preemptive Scheduling.

Unit-3:

Deadlocks-System model, Characterization, Deadlock Prevention, Deadlock Avoidance and


Detection, Recovery from deadlock.

Unit-4:

Memory Management: Logical Address, Physical Address Contiguous Allocation, External


and Internal Fragmentation

Virtual Memory: Demand paging, page replacement, allocation of frames, thrasing.

Unit-5:

Information Management: File Concept, Access Methods, Directory Structure. Device


Management: Disk Structure, Disk SchedulingAlgorithms.

Text books:

1. Silbershatz and Galvin," Operating System Concept", Addition We seley,

Reference books:

1. Tannenbaum,"Operating System Concept", Addition Weseley, 2002.


Unit-4:

Memory Management: Logical Address, Physical Address Contiguous Allocation, External


and Internal Fragmentation

Virtual Memory: Demand paging, page replacement, allocation of frames, thrasing.

Memory Management

Program must be brought (from disk) into memory and placed within a process for it to be run Main
memory and registers are only storage CPU can access directly

 Register access in one CPU clock (or less)


 Main memory can take many cycles
 Cache sits between main memory and CPU registers
 Protection of memory required to ensure correct operation
 A pair of base and limit registers define the logical address space

Logical vs Physical Address Space


 The concept of a logical address space that is bound to a separate physical address
space is central to proper memory management

o Logical address — generated by the CPU; also referred to as virtual address

o Physical address — address seen by the memory unit


 Logical and physical addresses are the same in compile-time and load-time address-
binding schemes; logical (virtual) and physical addresses differ in execution-time
address-binding scheme

Address Binding

 Address binding of instructions and data to memory addresses can happen at three
different stages

o Compile time: If memory location known a priori, absolute code can be generated;
must recompile code if starting location changes

o Load time: Must generate relocatable code if memory location is not known at
compile time

o Execution time: Binding delayed until run time if the process can be moved
during its execution from one memory segment to another. Need hardware
support for address maps (e.g., base and limit registers)

Memory Management Unit


 Hardware device that maps virtual to physical address

 In MMU scheme, the value in the relocation register is added to every address
generated by a user process at the time it is sent to memory

 The user program deals with logical addresses; it never sees the real physical addresses

Dynamic Loading

 Routine is not loaded until it is called


 Better memory-space utilization; unused routine is never loaded
 Useful when large amounts of code are needed to handle infrequently occurring cases

 No special support from the operating system is required implemented through program design

Dynamic Linking

 Linking postponed until execution time

 Small piece of code, stub, used to locate the appropriate memory-resident library routine

 Stub replaces itself with the address of the routine, and executes the routine

 Operating system needed to check if routine is in processes' memory address

 Dynamic linking is particularly useful for libraries

 System also known as shared libraries

Swapping

 A process can be swapped temporarily out of memory to a backing store, and then brought
back into memory for continued execution

 Backing store — fast disk large enough to accommodate copies of all memory images for all
users; must provide direct access to these memory images

 Roll out, roll in — swapping variant used for priority-based scheduling algorithms;
lower-priority process is swapped out so higher-priority process can be loaded and executed

 Major part of swap time is transfer time; total transfer time is directly proportional to the
amount of memory swapped

 Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and
Windows)

 System maintains a ready queue of ready-to-run processes which have memory images on disk
Contiguous Allocation

 Main memory usually into two partitions:

o Resident operating system, usually held in low memory with interrupt vector

o User processes then held in high memory

 Relocation registers used to protect user processes from each other, and from changing
operating-system code and data

o Base register contains value of smallest physical address

o Limit register contains range of logical addresses — each logical address must be less
than the limit register

o MMU maps logical address dynamically

 Multiple-partition allocation

o Hole — block of available memory; holes of various size are scattered throughout
memory

o When a process arrives, it is allocated memory from a hole large enough to


accommodate it

o Operating system maintains information about:

a) allocated partitions

b) free partitions (hole)


Dynamic Storage Allocation Problem
 First-fit: Allocate the first hole that is big enough

 Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless
ordered by size

o Produces the smallest leftover hole

 Worst-fit: Allocate the largest hole; must also search entire list

o Produces the largest leftover hole

Fragmentation

 External Fragmentation — total memory space exists to satisfy a request, but it is not
contiguous

 Internal Fragmentation — allocated memory may be slightly larger than


requested memory; this size difference is memory internal to a partition, but not being
used

 Reduce external fragmentation by compaction

o Shuffle memory contents to place all free memory together in one large block

o Compaction is possible only if relocation is dynamic, and is done at


execution time

o I/O problem

 Latch job in memory while it is involved in I/O

 Do I/O only into OS buffers

Paging

 Logical address space of a process can be noncontiguous; process is allocated physical


memory whenever the latter is available

 Divide physical memory into fixed-sized blocks called frames (size is power of 2, between
512 bytes and 8,192 bytes)

 Divide logical memory into blocks of same size called pages


 Keep track of all free frames
 To run a program of size n pages, need to find n free frames and load program
 Set up a page table to translate logical to physical addresses

 Internal fragmentation

 Address generated by CPU is divided into:

o Page number (p) — used as an index into a page table which contains base address
of each page in physical memory

o Page offset (d) — combined with base address to define the physical memory
address that is sent to the memory unit

Implementation of Page table

 Page table is kept in main memory

 Page table base register (PTBR) points to the page table

 Page table length register (PRLR) indicates size of the page table
 In this scheme every data/instruction access requires two memory accesses. One for the
page table and one for the data/instruction.
 The two memory access problem can be solved by the use of a special fast-lookup hardware cache
called associative memory or translation look-aside buffers (TLBs)

 Some TLBs store address-space identifiers (ASIDs) in each TLB entry —uniquely identifies each
process to provide address-space protection for that process

Paging with TLB

Memory Protection

 Memory protection implemented by associating protection bit with each frame

 Valid-invalid bit attached to each entry in the page table:

o "valid" indicates that the associated page is in the process' logical address space, and is thus a legal
page

o "invalid" indicates that the page is not in the process' logical address space

Shared Pages

 Shared code
o One copy of read-only (reentrant) code shared among processes (i.e., text editors,
compilers, window systems).

o Shared code must appear in same location in the logical address space of all
processes

 Private code and data

o Each process keeps a separate copy of the code and data

o The pages for the private code and data can appear anywhere in the logical
address space
Structure of Page table

Hierarchical Paging

 Break up the logical address space into multiple page tables A simple technique is a
two-level page table.

Hashed Page Tables

 The virtual page number is hashed into a page table


o This page table contains a chain of elements hashing to the same location Virtual page numbers are compared
in this chain searching for a match
o If a match is found, the corresponding physical frame is extracted

Inverted Page Tables

 One entry for each real page of memory

 Entry consists of the virtual address of the page stored in that real memory location, with
information about the process that owns that page

 Decreases memory needed to store each page table, but increases time needed to search the table when
a page reference occurs

 Use hash table to limit the search to one — or at most a few — page-table entries
Segmentation
 Memory-management scheme that supports user view of memory
 A program is a collection of segments
o A segment is a logical unit such as: main program, procedure, function,
method, object, local variables, global variables, common block, stack,
symbol table, arrays
 Logical address consists of a two tuple: 
<segment-number, offset>,

 Segment table — maps two-dimensional physical addresses; each table entry


has:
o base — contains the starting physical address where the segments reside in
memory
o limit — specifies the length of the segment
 Segment-table base register (STBR) points to the segment table's location in
memory
 Segment-table length register (STLR) indicates number of segments used by a
program;
• segment number s is legal if s < STLR
 Protection
o With each entry in segment table associate:
 validation bit = 0 illegal segment
 read/write/execute privileges
 Protection bits associated with segments; code sharing occurs at segment level
 Since segments vary in length, memory allocation is a dynamic storage -
allocation problem
 A segmentation example is shown in the following diagram

Virtual Memory Management


 Virtual memory — separation of user logical memory from physical memory.

o Only part of the program needs to be in memory for execution

o Logical address space can therefore be much larger than physical


address space

o Allows address spaces to be shared by several processes

o Allows for more efficient process creation

 Virtual memory can be implemented via:


o Demand paging
o Demand segmentation
Demand Paging

 Bring a page into memory only when it is needed

o Less I/O needed

o Less memory needed

o Faster response

o More users

 Page is needed = reference to it

o invalid reference = abort

o not-in-memory = bring to memory

 Lazy swapper — never swaps a page into memory unless page will be needed

o Swapper that deals with pages is a pager

 With each page table entry a valid—invalid bit is associated (v


in-memory, i not-in-memory)

 Initially valid—invalid bit is set to i on all entries

 During address translation, if valid—invalid bit in page table entry is I page


fault

Page Fault

If there is a reference to a page, first reference to that page will trap to operating
system: page fault

1. Operating system looks at another table to decide: 1

Invalid reference = abort

1 Just not in memory


2. Get empty frame
3. Swap page into frame
4. Reset tables
5. Set validation bit = v
6. Restart the instruction that caused the page fault
Page Replacement
 Prevent over-allocation of memory by modifying page-fault service routine to
include page replacement

 Use modify (dirty) bit to reduce overhead of page transfers — only modified pages
are written to disk

 Page replacement completes separation between logical memory and physical


memory — large virtual memory can be provided on a smaller physical memory

 Find the location of the desired page on disk


 Find a free frame:
 If there is a free frame, use it
 If there is no free frame, use a page replacement algorithm to select a victim
frame

 Bring the desired page into the (newly) free frame; update the page and frame
tables

 Restart the process


Page Replacement algorithm

FIFO (First-in-First-Out)

 A FIFO replacement algorithm associates with each page the time when that page was
brought into memory.

 When a page must be replaced, the oldest page is chosen.


 Belady's Anomaly: more frames more page faults ( for some page-replacement
algorithms, the page-fault rate may increase as the number of allocated frames
increases.)

 Ex-
OPTIMAL PAGE REPLACEMENT
 Replace page that will not be used for longest period of time
 Ex-

LRU (LEAST RECENTLY USED)


 LRU replacement associates with each page the time of that page's last use.
 When a page must be replaced, LRU chooses the page that has not been used for
the longest period of time.

Allocation of Frames
 Each process needs minimum number of pages
 Two major allocation schemes
o fixed allocation
o priority allocation
 Equal allocation — For example, if there are 100 frames and 5 processes, give
each process 20 frames.

 Proportional allocation — Allocate according to the size of process


si = size of process pi
S =Es i

m= totalnumber of frames
ai = allocation for pi = xm
-

Global vs Local Allocation


 Global replacement — process selects a replacement frame from the set of all
frames; one process can take a frame from another
 Local replacement — each process selects from only its own set of allocated
frames

Thrashing
 If a process does not have "enough" pages, the page-fault rate is very high. This
leads to:
o low CPU utilization
o operating system thinks that it needs to increase the degree of
multiprogramming
o another process added to the system
 Thrashing a process is busy swapping pages in and out

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