5 4 3 2 1

ZAUI ICE lake series Platform Block Diagram (DIS/UMA ) 01

D DDR4 24000/2666/3200 MT/s ICL U4+2 GPU VRAM D

DDR N17S-G0/G2/G5 GDDR5 x32*2pcs

PCIE 1~4 P23
DDR4-Memory Down DDR4-SoDIMM PCI-e

CH. B P18 CH. A P17

27MHz
P19-22
SATA
SATA0 SATA1A SATA2/SATA1B
Re-Driver SATA - ODD SSD DDI HDMI
SATA - HDD SN75LVCP601RTJR (Reserve) SATA/PCIe-SSD P27
P32 P32 P32 P33
HDMI 1.4 4K2K
PTN3366BS (Reserve) P27
PCIE 9~12
PCI-e
USB 3.0
PCIE 5 PCIE 6 USB3 3 USB3 2 USB3 1 eDP LCD Panel
2 Lane for 4K2K
LAN POA M/B Type-C MUX UB3/MB Port2 UB3/MB Port1 eDP P25
RTL8111HSH-CG (Reserve)
Wifi / BT PI2EQX632EXUBE
25MHz P28 P31 P33 P29 P29 P24 P24
USB7 USB2 4 USB2 2 USB2 3 USB2 1 Battery
RJ45 USB 2.0 P13
C P28
USB2 6 USB2 5 USB8 USB2 9 C

Processor : Daul Core

32.768kHz
CR Power : 15 (Watt)
CCD Touch Screen (Reserve)
D/B USB 2.0
P25 P25 P35 P35
MCP 1526pins
38.4MHz 38.4MHz
DMIC LED D/B Head Phone Size : 50 X 25 (mm) U42 Reserve
P25 P35 P35
Integrated PCH

Vinafix.com
Daughter Board
ESPI Interface

Audio Codec HDA

ALC255-CG
TPM FAN P30
Speaker NPCT750AAAYX
P26 Co-Lay 2566 P26
(Reserve) P31
Embedded Controller Keyboard BLP30
I2C Touch Pad P31
IT5571 Keyboard P30
G-sensor P31
Hall Sensor P35
B B
SPI SPI ROM P34
P10
BOM option
IV@ : UMA
EV@ : DIS Power solution
TPC@ : Type-C function
TPC_N@ :No Type-C function
TSI@ : Touch screen I2C PCB 8L STACK UP
Batery Charger +VCCIN_AUX +VGPU_CORE
TPM@ : Trusted Platform Module BQ24780SRUYRP37 RT9610CGQW P42 RT8813DGQW P46
PBA@ : Finger Print on touch pad LAYER 1 : TOP
KBL@ : Keyboard back light LAYER 2 : SGND
GS@ : G-Sensor function +3VPCU/+5VPCU +VCCIN_and +1.35V_GFX LAYER 3 : IN1
GS_N@ : No G-Sensor function RT6258CGQUF P38 RT9610CGQW P43 G5335QT2U P47 LAYER 4 : SVCC
SSD@ : Solid State Disk LAYER 5 : IN2
ODD@ : Optical Disc Drive
EMC@ : eMMC function +3V/+5V +VCCSA +1V8_AON LAYER 6 : IN3
RAM@ : On Board Memory JW7110DFNC P38 RT9610CGQW P43 JW7110DFNC P48 LAYER 7 : SGND
SP@ : Power & VGA LAYER 8 : BOT
HDD_R@ : Hard Disc Redriver +1V_S5 +1.8V_S5 +1.03_GFX
HDD_N@ : NO Hard Disc Redriver G5335QT2U P39 JW5213DFND P44 G9336ADJTP1U P48
CNV@ : Intel WIFI
CNV_N@ :NO Intel WIFI
HDMI_R@ : HDMI Redirver +1.2VSUS +1.5V Thermal protection
A HDMI_N@ : No HDMI Redirver RT8231BGQW JW5222RSOTBP44 TMP708AIDBVR P44 A

Debug@ : for Debug Card G9661MF11U P40

255@ : Codec 255
256@ : Codec 256
FOR15_17@ : Panel 15 or 17 inch
FOR14@ : Panel 14 inch
Quanta Computer Inc.
PROJECT : ZAUI
Size Document Number Rev
3A
Block Diagram
Date: Monday, November 04, 2019 Sheet 1 of 47
5 4 3 2 1
 5 4 3 2 1

02
D D

U24A

INT_EDP_TXN0 Y5 BB5
25 INT_EDP_TXN0 INT_EDP_TXP0 DDIA_TXN_0 TCP0_TX_N0
Y3 BB6
25 INT_EDP_TXP0 INT_EDP_TXN1 DDIA_TXP_0 TCP0_TX_P0
Y1 AV6
25 INT_EDP_TXN1 INT_EDP_TXP1 DDIA_TXN_1 TCP0_TX_N1
Y2 AV5
25 INT_EDP_TXP1 DDIA_TXP_1 TCP0_TX_P1
INT_EDP_TXN2 V2 BH2
25 INT_EDP_TXN2 INT_EDP_TXP2 DDIA_TXN_2 TCP0_TXRX_N0
V1 BH1
eDP 25
25
INT_EDP_TXP2
INT_EDP_TXN3
INT_EDP_TXN3
INT_EDP_TXP3
V3
V5
DDIA_TXP_2
DDIA_TXN_3
TCP0_TXRX_P0
TCP0_TXRX_N1
BF1
BF2
25 INT_EDP_TXP3 DDIA_TXP_3 TCP0_TXRX_P1
INT_EDP_AUXN W4 AY5
25 INT_EDP_AUXN INT_EDP_AUXP DDIA_AUX_N TCP0_AUX_N
W3 AY6
25 INT_EDP_AUXP DDIA_AUX_P TCP0_AUX_P
IN_D2# AE3
27 IN_D2# IN_D2 DDIB_TXN_0
AE5 AR5
27 IN_D2 DDIB_TXP_0 TCP1_TX_N0
IN_D1# AE2 AR6
27 IN_D1# IN_D1 DDIB_TXN_1 TCP1_TX_P0
AE1 AL5
HDMI 27
27
IN_D1
IN_D0#
IN_D0#
IN_D0
AC5
AC3
DDIB_TXP_1
DDIB_TXN_2
TCP1_TX_N1
TCP1_TX_P1
AL3
BD2
27 IN_D0 IN_CLK# DDIB_TXP_2 TCP1_TXRX_N0
AC1 BD1
27 IN_CLK# DDIB_TXN_3 TCP1_TXRX_P0
IN_CLK AC2 BB1
27 IN_CLK DDIB_TXP_3 TCP1_TXRX_N1 BB2
AD3 TCP1_TXRX_P1
AD4 DDIB_AUX_N AN3
DDIB_AUX_P TCP1_AUX_N AN5
DP15 TCP1_AUX_P
DJ17 GPP_E22/DDPA_CTRLCLK/PCIE_LNK_DOW N
C GPP_E23/DDPA_CTRLDATA/BK4/SBK4 BF6 C
DL40 TCP2_TX_N0 BF5
27 SDVO_CLK GPP_H16/DDPB_CTRLCLK TCP2_TX_P0
DP42 BJ5
27 SDVO_DATA GPP_H17/DDPB_CTRLDATA TCP2_TX_N1 BJ6
DL17 TCP2_TX_P1 BL1
DK17 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD TCP2_TXRX_N0 BL2
10 GPP_E19 GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD TCP2_TXRX_P0 BM2
DN17 TCP2_TXRX_N1 BM1
DP17 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP2_TXRX_P1
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD BG6
RAM_ID0 DK34 TCP2_AUX_N BG5
15 RAM_ID0 GPP_D9/ISH_SPI_CS_N/DDP3_CTRLCLK/GSPI2_CS0_N/TBT_LSX2_TXD TCP2_AUX_P
RAM_ID1 DL34

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15 RAM_ID1 GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/GSPI2_CLK/TBT_LSX2_RXD
RAM_ID2 DN33 BP6
15 RAM_ID2 RAM_ID3 DL33 GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/GSPI2_MISO/TBT_LSX3_TXD TCP3_TX_N0 BP5
15 RAM_ID3 GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/GSPI2_MOSI/TBT_LSX3_RXD TCP3_TX_P0 BV5
ULT_EDP_HPD DW 11 TCP3_TX_N1 BV6
25 ULT_EDP_HPD GPP_E14/DPPE_HPDA/DISP_MISCA TCP3_TX_P1
HDMI_HPD_CON CV42 BR1
27 HDMI_HPD_CON GPP_A18/DDSP_HPDB/DISP_MISCB TCP3_TXRX_N0
@ TP26 TBTA_HPD CV39 BR2
@ TP28 TBTB_HPD CY43 GPP_A19/DDSP_HPD1/DISP_MISC1 TCP3_TXRX_P0 BT2
USB_OC1# CR41 GPP_A20/DDSP_HPD2/DISP_MISC2 TCP3_TXRX_N1 BT1
24 USB_OC1# GPP_A14/USB_OC1_N/DDSP_HPD3/DISP_MISC3 TCP3_TXRX_P1
USB_OC2# CT41
35 USB_OC2# GPP_A15/USB_OC2_N/DDSP_HPD4/DISP_MISC4
DV14 BT6
GPP_E17 TCP3_AUX_N BT5
PCH_DISP_ON DN21 TCP3_AUX_P
0.1u/16V_2
0.1u/16V_2

25 PCH_DISP_ON PCH_LVDS_BLON EDP_VDDEN TCRCOMP_DN

DL19 AY1 R617 150_1%_2
25 PCH_LVDS_BLON EDP_BKLTEN TC_RCOMP_N
PCH_DPST_PWM DU19 AY2 TCRCOMP_DP
25 PCH_DPST_PWM DSI_DE_TE_2 EDP_BKLTCTL TC_RCOMP_P
J3
DG : 330 nF or 100k @ DISP_UTILS D2
RSVD_1
GPP_A17/DISP_MISCC
CT38
CV43
TP64 DP_RCOMP DISP_UTILS GPP_A21
C329
C344

B R2 CV41 B
DISP_RCOMP GPP_A22
1 0f 19

R593 R610
100K_1%_2 ICL-U 1.2G QPWA
150_1%_2
CPU@

+3V_S5

R678 10K_5%_2 USB_OC1#

R276 10K_5%_2 USB_OC2# +3V

R327
*10K_1%_2

ULT_EDP_HPD

R343
100K_5%_4

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
+3V_S5 6,8,10,11,13,14,15,16,28,29,30,33,34,37,40,41 ICL-U 1/14 (DDI/TBT/eDP)
Date: Monday, November 04, 2019 Sheet 2 of 47
5 4 3 2 1
 5 4 3 2 1

03
17 M_A_DQSN[7:0]
17 M_A_DQSP[7:0]

ICELAKE Processor DDR4

3,18 M_B_DQSN[7:0]
3,18 M_B_DQSP[7:0]
17 M_A_DQ[63:0]
3,18 M_B_DQ[63:0]
3,18 M_B_DQ[63:0]

DDR CHANNEL A/B DDR CHANNEL C/D

U24B U24C
D LPDDR4 DDR4 NIL LPDDR4 DDR4 NIL D
M_A_DQ0 CA48 BL48 M_B_DQ0 AK48 Y48
M_A_DQ1 DDRA_DQ0_0/DDR0_DQ0_0 DDRA_CLK_N/DDR0_CLK_N_0 M_A_CLKN0 17 M_B_DQ1 DDRC_DQ0_0/DDR1_DQ0_0 DDRC_CLK_N/DDR1_CLK_N_0 M_B_CLKN0 18
CA47 BL47 AK45 Y47
M_A_DQ2 DDRA_DQ0_1/DDR0_DQ0_1 DDRA_CLK_P/DDR0_CLK_P_0 M_A_CLKP0 17 M_B_DQ2 DDRC_DQ0_1/DDR1_DQ0_1 DDRC_CLK_P/DDR1_CLK_P_0 M_B_CLKP0 18
CA49 BF42 AK49 M43
M_A_DQ3 DDRA_DQ0_2/DDR0_DQ0_2 DDRB_CLK_N/DDR0_CLK_N_1 M_A_CLKN1 17 M_B_DQ3 DDRC_DQ0_2/DDR1_DQ0_2 DDRD_CLK_N/DDR1_CLK_N_1
BV49 BF43 AG47 M42
M_A_DQ4 DDRA_DQ0_3/DDR0_DQ0_3 DDRB_CLK_P/DDR0_CLK_P_1 M_A_CLKP1 17 M_B_DQ4 DDRC_DQ0_3/DDR1_DQ0_3 DDRD_CLK_P/DDR1_CLK_P_1
CA45 AK47
M_A_DQ5 BV47 DDRA_DQ0_4/DDR0_DQ0_4 BG49 M_B_DQ5 AG45 DDRC_DQ0_4/DDR1_DQ0_4 U45
M_A_DQ6 BV45 DDRA_DQ0_5/DDR0_DQ0_5 DDRA_CKE0/DDR0_CKE0 BJ47 M_A_CKE0 17 M_B_DQ6 AG48 DDRC_DQ0_5/DDR1_DQ0_5 DDRC_CKE0/DDR1_CKE0 V46 M_B_CKE0 18
M_A_DQ7 BV48 DDRA_DQ0_6/DDR0_DQ0_6 DDRA_CKE1/NC BF38 M_B_DQ7 AG49 DDRC_DQ0_6/DDR1_DQ0_6 DDRC_CKE1/NC M41
M_A_DQ8 CC42 DDRA_DQ0_7/DDR0_DQ0_7 DDRB_CKE0/NC BF41 M_B_DQ8 AJ38 DDRC_DQ0_7/DDR1_DQ0_7 DDRD_CKE0/NC P43
M_A_DQ9 CC39 DDRA_DQ1_0/DDR0_DQ1_0 DDRB_CKE1/DDR0_CKE1 M_A_CKE1 17 M_B_DQ9 AL39 DDRC_DQ1_0/DDR1_DQ1_0 DDRD_CKE1/DDR1_CKE1
M_A_DQ10 CC43 DDRA_DQ1_1/DDR0_DQ1_1 BM38 M_B_DQ10 AJ39 DDRC_DQ1_1/DDR1_DQ1_1 V42
M_A_DQ11 CE38 DDRA_DQ1_2/DDR0_DQ1_2 DDRA_CS_0/DDR0_CS_N_0 BM42 M_A_CS#0 17 M_B_DQ11 AL43 DDRC_DQ1_2/DDR1_DQ1_2 DDRC_CS_0/DDR1_CS_N_0 V39 M_B_CS#0 18
M_A_DQ12 CC38 DDRA_DQ1_3/DDR0_DQ1_3 DDRA_CS_1/NC BP42 M_B_DQ12 AL38 DDRC_DQ1_3/DDR1_DQ1_3 DDRC_CS_1/NC Y39
M_A_DQ13 CE39 DDRA_DQ1_4/DDR0_DQ1_4 DDRB_CS_0/NC BG42 M_B_DQ13 AJ42 DDRC_DQ1_4/DDR1_DQ1_4 DDRD_CS_0/NC T39
M_A_DQ14 CE42 DDRA_DQ1_5/DDR0_DQ1_5 DDRB_CS_1/DDR0_CS_N_1 M_A_CS#1 17 M_B_DQ14 AL42 DDRC_DQ1_5/DDR1_DQ1_5 DDRD_CS_1/DDR1_CS_N_1
M_A_DQ15 CE43 DDRA_DQ1_6/DDR0_DQ1_6 BM43 M_B_DQ15 AJ43 DDRC_DQ1_6/DDR1_DQ1_6 T38
M_A_DQ16 DDRA_DQ1_7/DDR0_DQ1_7 DDRB_CA4/DDR0_BA0 M_A_BS#0 17 M_B_DQ16 DDRC_DQ1_7/DDR1_DQ1_7 DDRD_CA4/DDR1_BA0 M_B_BS#0 18
BT48 BG39 AB49 T42
DDRA_DQ2_0/DDR0_DQ2_0 NC/DDR0_BA1 M_A_BS#1 17 DDRC_DQ2_0/DDR1_DQ2_0 NC/DDR1_BA1 M_B_BS#1 18
M_A_DQ17 BT47 M_B_DQ17 AB48
M_A_DQ18 BT49 DDRA_DQ2_1/DDR0_DQ2_1 BB49 M_B_DQ18 AE49 DDRC_DQ2_1/DDR1_DQ2_1 R45
M_A_DQ19 DDRA_DQ2_2/DDR0_DQ2_2 DDRA_CA5/DDR0_BG0 M_A_BG#0 17 M_B_DQ19 DDRC_DQ2_2/DDR1_DQ2_2 DDRC_CA5/DDR1_BG0 M_B_BG#0 18
BN49 BD47 AE47 N47
DDRA_DQ2_3/DDR0_DQ2_3 NC/DDR0_BG1 M_A_BG#1 17 DDRC_DQ2_3/DDR1_DQ2_3 NC/DDR1_BG1 M_B_BG#1 18
M_A_DQ20 BT45 M_B_DQ20 AE48
M_A_DQ21 BN47 DDRA_DQ2_4/DDR0_DQ2_4 BB48 M_A_A0 M_B_DQ21 AB47 DDRC_DQ2_4/DDR1_DQ2_4 P42 M_B_A0
DDRA_DQ2_5/DDR0_DQ2_5 NC/DDR0_MA0 M_A_A0 17 DDRC_DQ2_5/DDR1_DQ2_5 NC/DDR1_MA0 M_B_A0 18
M_A_DQ22 BN45 BL49 M_A_A1 M_B_DQ22 AB45 Y49 M_B_A1
M_A_DQ23 DDRA_DQ2_6/DDR0_DQ2_6 NC/DDR0_MA1 M_A_A2 M_A_A1 17 M_B_DQ23 DDRC_DQ2_6/DDR1_DQ2_6 NC/DDR1_MA1 M_B_A2 M_B_A1 18
BN48 BG38 AE45 U48
M_A_DQ24 DDRA_DQ2_7/DDR0_DQ2_7 DDRB_CA5/DDR0_MA2 M_A_A3 M_A_A2 17 M_B_DQ24 DDRC_DQ2_7/DDR1_DQ2_7 DDRD_CA5/DDR1_MA2 M_B_A3 M_B_A2 18
BV42 BL45 AD38 Y45
M_A_DQ25 DDRA_DQ3_0/DDR0_DQ3_0 NC/DDR0_MA3 M_A_A4 M_A_A3 17 M_B_DQ25 DDRC_DQ3_0/DDR1_DQ3_0 NC/DDR1_MA3 M_B_A4 M_B_A3 18
BV39 BJ46 AD39 U47
M_A_DQ26 DDRA_DQ3_1/DDR0_DQ3_1 NC/DDR0_MA4 M_A_A5 M_A_A4 17 M_B_DQ26 DDRC_DQ3_1/DDR1_DQ3_1 NC/DDR1_MA4 M_B_A5 M_B_A4 18
BV43 BG48 AE39 R49
M_A_DQ27 DDRA_DQ3_2/DDR0_DQ3_2 DDRA_CA0/DDR0_MA5 M_A_A6 M_A_A5 17 M_B_DQ27 DDRC_DQ3_2/DDR1_DQ3_2 DDRC_CA0/DDR1_MA5 M_B_A6 M_B_A5 18
BW 38 BE45 AE43 U49
M_A_DQ28 DDRA_DQ3_3/DDR0_DQ3_3 DDRA_CA2/DDR0_MA6 M_A_A7 M_A_A6 17 M_B_DQ28 DDRC_DQ3_3/DDR1_DQ3_3 DDRC_CA2/DDR1_MA6 M_B_A7 M_B_A6 18
BV38 BG45 AE38 M47
M_A_DQ29 DDRA_DQ3_4/DDR0_DQ3_4 DDRA_CA4/DDR0_MA7 M_A_A8 M_A_A7 17 M_B_DQ29 DDRC_DQ3_4/DDR1_DQ3_4 DDRC_CA4/DDR1_MA7 M_B_A8 M_B_A7 18
C BW 39 BG47 AD43 M45 C
M_A_DQ30 DDRA_DQ3_5/DDR0_DQ3_5 DDRA_CA3/DDR0_MA8 M_A_A9 M_A_A8 17 M_B_DQ30 DDRC_DQ3_5/DDR1_DQ3_5 DDRC_CA3/DDR1_MA8 M_B_A9 M_B_A8 18
BW 42 BE47 AD42 R47
M_A_DQ31 DDRA_DQ3_6/DDR0_DQ3_6 DDRA_CA1/DDR0_MA9 M_A_A10 M_A_A9 17 M_B_DQ31 DDRC_DQ3_6/DDR1_DQ3_6 DDRC_CA1/DDR1_MA9 M_B_A10 M_B_A9 18
BW 43 BJ38 AE42 P39
DDRA_DQ3_7/DDR0_DQ3_7 NC/DDR0_MA10 M_A_A10 17 DDRC_DQ3_7/DDR1_DQ3_7 NC/DDR1_MA10 M_B_A10 18
M_A_DQ32 AY48 BB47 M_A_A11 M_B_DQ32 J48 N46 M_B_A11
M_A_DQ33 DDRB_DQ0_0/DDR0_DQ4_0 NC/DDR0_MA11 M_A_A12 M_A_A11 17 M_B_DQ33 DDRD_DQ0_0/DDR1_DQ4_0 NC/DDR1_MA11 M_B_A12 M_B_A11 18
AY47 BE48 J45 R48
M_A_DQ34 DDRB_DQ0_1/DDR0_DQ4_1 NC/DDR0_MA12 M_A_A13 M_A_A12 17 M_B_DQ34 DDRD_DQ0_1/DDR1_DQ4_1 NC/DDR1_MA12 M_B_A13 M_B_A12 18
AY49 BM39 J49 Y41
DDRB_DQ0_2/DDR0_DQ4_2 DDRB_CA0/DDR0_MA13 M_A_A13 17 DDRD_DQ0_2/DDR1_DQ4_2 DDRD_CA0/DDR1_MA13 M_B_A13 18
M_A_DQ35 AU45 BG43 M_B_DQ35 G47 V41
M_A_DQ36 AY45 DDRB_DQ0_3/DDR0_DQ4_3 DDRB_CA2/DDR0_MA14W E_N BJ42 M_A_WE# 17 M_B_DQ36 J47 DDRD_DQ0_3/DDR1_DQ4_3 DDRD_CA2/DDR1_MA14W E_N Y42 M_B_WE# 18
M_A_DQ37 AU47 DDRB_DQ0_4/DDR0_DQ4_4 DDRB_CA1/DDR0_MA15CAS_N BM41 M_A_CAS# 17 M_B_DQ37 G45 DDRD_DQ0_4/DDR1_DQ4_4 DDRD_CA1/DDR1_MA15CAS_N V47 M_B_CAS# 18
M_A_DQ38 DDRB_DQ0_5/DDR0_DQ4_5 DDRB_CA3/DDR0_MA16RAS_N M_A_RAS# 17 M_B_DQ38 DDRD_DQ0_5/DDR1_DQ4_5 DDRD_CA3/DDR1_MA16RAS_N M_B_RAS# 18
AU48 G48
M_A_DQ39 AU49 DDRB_DQ0_6/DDR0_DQ4_6 BJ39 M_B_DQ39 E48 DDRD_DQ0_6/DDR1_DQ4_6 V43
M_A_DQ40 DDRB_DQ0_7/DDR0_DQ4_7 NC/DDR0_ODT_0 M_A_DIM0_ODT0 17 M_B_DQ40 DDRD_DQ0_7/DDR1_DQ4_7 NC/DDR1_ODT_0 M_B_DIM0_ODT0 18
AY42 BB45 J38 V38

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M_A_DQ41 AY38 DDRB_DQ1_0/DDR0_DQ5_0 NC/DDR0_ODT_1 M_A_DIM0_ODT1 17 M_B_DQ41 G39 DDRD_DQ1_0/DDR1_DQ5_0 NC/DDR1_ODT_1
M_A_DQ42 AY43 DDRB_DQ1_1/DDR0_DQ5_1 BY47 M_A_DQSN0 M_B_DQ42 G38 DDRD_DQ1_1/DDR1_DQ5_1 AH46 M_B_DQSN0
M_A_DQ43 DDRB_DQ1_2/DDR0_DQ5_2 DDRA_DQSN_0/DDR0_DQSN_0 M_A_DQSP0 M_B_DQ43 DDRD_DQ1_2/DDR1_DQ5_2 DDRC_DQSN_0/DDR1_DQSN_0 M_B_DQSP0 M_B_DQSN0 3,18
BB39 BY46 G42 AH47
M_A_DQ44 AY39 DDRB_DQ1_3/DDR0_DQ5_3 DDRA_DQSP_0/DDR0_DQSP_0 CC41 M_A_DQSN1 M_B_DQ44 J39 DDRD_DQ1_3/DDR1_DQ5_3 DDRC_DQSP_0/DDR1_DQSP_0 AJ41 M_B_DQSN1 M_B_DQSP0 3,18
M_A_DQ45 BB38 DDRB_DQ1_4/DDR0_DQ5_4 DDRA_DQSN_1/DDR0_DQSN_1 CE41 M_A_DQSP1 M_B_DQ45 J42 DDRD_DQ1_4/DDR1_DQ5_4 DDRC_DQSN_1/DDR1_DQSN_1 AL41 M_B_DQSP1 M_B_DQSN1 3,18
M_A_DQ46 BB42 DDRB_DQ1_5/DDR0_DQ5_5 DDRA_DQSP_1/DDR0_DQSP_1 BR47 M_A_DQSN2 M_B_DQ46 G43 DDRD_DQ1_5/DDR1_DQ5_5 DDRC_DQSP_1/DDR1_DQSP_1 AC47 M_B_DQSN2 M_B_DQSP1 3,18
M_A_DQ47 DDRB_DQ1_6/DDR0_DQ5_6 DDRA_DQSN_2/DDR0_DQSN_2 M_A_DQSP2 M_B_DQ47 DDRD_DQ1_6/DDR1_DQ5_6 DDRC_DQSN_2/DDR1_DQSN_2 M_B_DQSP2 M_B_DQSN2 3,18
BB43 BR46 J43 AC46
M_A_DQ48 AR48 DDRB_DQ1_7/DDR0_DQ5_7 DDRA_DQSP_2/DDR0_DQSP_2 BV41 M_A_DQSN3 M_B_DQ48 B43 DDRD_DQ1_7/DDR1_DQ5_7 DDRC_DQSP_2/DDR1_DQSP_2 AE41 M_B_DQSN3 M_B_DQSP2 3,18
M_A_DQ49 AR47 DDRB_DQ2_0/DDR0_DQ6_0 DDRA_DQSN_3/DDR0_DQSN_3 BW 41 M_A_DQSP3 M_B_DQ49 D43 DDRD_DQ2_0/DDR1_DQ6_0 DDRC_DQSN_3/DDR1_DQSN_3 AD41 M_B_DQSP3 M_B_DQSN3 3,18
M_A_DQ50 DDRB_DQ2_1/DDR0_DQ6_1 DDRA_DQSP_3/DDR0_DQSP_3 M_A_DQSN4 M_B_DQ50 DDRD_DQ2_1/DDR1_DQ6_1 DDRC_DQSP_3/DDR1_DQSP_3 M_B_DQSN4 M_B_DQSP3 3,18
AR49 AV46 A43 H47
M_A_DQ51 AM45 DDRB_DQ2_2/DDR0_DQ6_2 DDRB_DQSN_0/DDR0_DQSN_4 AV47 M_A_DQSP4 M_B_DQ51 C40 DDRD_DQ2_2/DDR1_DQ6_2 DDRD_DQSN_0/DDR1_DQSN_4 H46 M_B_DQSP4 M_B_DQSN4 3,18
M_A_DQ52 DDRB_DQ2_3/DDR0_DQ6_3 DDRB_DQSP_0/DDR0_DQSP_4 M_A_DQSN5 M_B_DQ52 DDRD_DQ2_3/DDR1_DQ6_3 DDRD_DQSP_0/DDR1_DQSP_4 M_B_DQSN5 M_B_DQSP4 3,18
AR45 AY41 C43 G41
M_A_DQ53 DDRB_DQ2_4/DDR0_DQ6_4 DDRB_DQSN_1/DDR0_DQSN_5 M_A_DQSP5 M_B_DQ53 DDRD_DQ2_4/DDR1_DQ6_4 DDRD_DQSN_1/DDR1_DQSN_5 M_B_DQSP5 M_B_DQSN5 3,18
AM47 BB41 D40 J41
M_A_DQ54 AM48 DDRB_DQ2_5/DDR0_DQ6_5 DDRB_DQSP_1/DDR0_DQSP_5 AN46 M_A_DQSN6 M_B_DQ54 B40 DDRD_DQ2_5/DDR1_DQ6_5 DDRD_DQSP_1/DDR1_DQSP_5 C42 M_B_DQSN6 M_B_DQSP5 3,18
M_A_DQ55 DDRB_DQ2_6/DDR0_DQ6_6 DDRB_DQSN_2/DDR0_DQSN_6 M_A_DQSP6 M_B_DQ55 DDRD_DQ2_6/DDR1_DQ6_6 DDRD_DQSN_2/DDR1_DQSN_6 M_B_DQSP6 M_B_DQSN6 3,18
AM49 AN47 A40 D42
M_A_DQ56 AT42 DDRB_DQ2_7/DDR0_DQ6_7 DDRB_DQSP_2/DDR0_DQSP_6 AR41 M_A_DQSN7 M_B_DQ56 B35 DDRD_DQ2_7/DDR1_DQ6_7 DDRD_DQSP_2/DDR1_DQSP_6 D36 M_B_DQSN7 M_B_DQSP6 3,18
M_A_DQ57 DDRB_DQ3_0/DDR0_DQ7_0 DDRB_DQSN_3/DDR0_DQSN_7 M_A_DQSP7 M_B_DQ57 DDRD_DQ3_0/DDR1_DQ7_0 DDRD_DQSN_3/DDR1_DQSN_7 M_B_DQSP7 M_B_DQSN7 3,18
AT39 AT41 D35 C36
M_A_DQ58 AR43 DDRB_DQ3_1/DDR0_DQ7_1 DDRB_DQSP_3/DDR0_DQSP_7 M_B_DQ58 A35 DDRD_DQ3_1/DDR1_DQ7_1 DDRD_DQSP_3/DDR1_DQSP_7 M_B_DQSP7 3,18
B M_A_DQ59 AT38 DDRB_DQ3_2/DDR0_DQ7_2 BF39 M_A_PARITY M_B_DQ59 D38 DDRD_DQ3_2/DDR1_DQ7_2 P38 M_B_PARITY B
DDRB_DQ3_3/DDR0_DQ7_3 NC/DDR0_PAR M_A_PARITY 17 DDRD_DQ3_3/DDR1_DQ7_3 NC/DDR1_PAR M_B_PARITY 18
M_A_DQ60 AR38 BE49 M_B_DQ60 C35 M48
M_A_DQ61 DDRB_DQ3_4/DDR0_DQ7_4 NC/DDR0_ACT_N M_A_ALERT# M_A_ACT# 17 M_B_DQ61 DDRD_DQ3_4/DDR1_DQ7_4 NC/DDR1_ACT_N M_B_ALERT# M_B_ACT# 18
AR39 BD46 C38 M49
M_A_DQ62 AR42 DDRB_DQ3_5/DDR0_DQ7_5 NC/DDR0_ALERT_N M_A_ALERT# 17 For CH:A M_B_DQ62 B38 DDRD_DQ3_5/DDR1_DQ7_5 NC/DDR1_ALERT_N M_B_ALERT# 18
M_A_DQ63 AT43 DDRB_DQ3_6/DDR0_DQ7_6 M38 M_B_DQ63 A38 DDRD_DQ3_6/DDR1_DQ7_6 3 of 19
DDRB_DQ3_7/DDR0_DQ7_7 RSVD_73 C44 SM_VREF DDRD_DQ3_7/DDR1_DQ7_7
DDR_RCOMP0 DDR0_VREF_CA SMDDR_VREF_DQ1_M3 SM_VREF 17
R576 100_1%_2 D47 B45
DDR_RCOMP1 DDR_RCOMP_0 DDR1_VREF_CA DDR_VTT_CTRL SMDDR_VREF_DQ1_M3 18
R575 100_1%_2 E46 M39 ICL-U 1.2G QPWA
DDR_RCOMP2 C47 DDR_RCOMP_1 DDR_VTT_CTL DK47 DDR_DRAMRST#_R TP59
R577 100_1%_2 CPU@
DDR_RCOMP_2 2 of 19 DRAM_RESET_N

ICL-U 1.2G QPWA

CPU@

+1.2VSUS

R278
470_1%_2

DDR_DRAMRST#_R R282 0_5%_2

A
DDR4_DRAMRST# 17,18 A

@
C353
*0.1u/10V_2

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
+3V_S5 2,6,8,10,11,13,14,15,16,28,29,30,33,34,37,40,41
3A
+1.2VSUS 5,16,17,18,38,44 ICL-U 2/14 (LPDDR4 I/F)
Date: Monday, November 04, 2019 Sheet 3 of 47
5 4 3 2 1
 5 4 3 2 1

04
D D

+VCCST

H_CATERR# R591 49.9_1%_2

PM_THRMTRIP# R584 1K_1%_2

+VCCSTG_TERM
U24D

H_CATERR# J4 P3 XDP_TCK @ H_PROCHOT# R582 1K_1%_2

EC_PECI CATERR_N PROC_TCK XDP_TDI_CPU TP69
CD5 K5 @
34 EC_PECI H_PROCHOT# PROCHOT#_CPU PECI PROC_TDI XDP_TDO_CPU TP66
R583 499_1%_2 C3 K3 @
14,34,36,39 H_PROCHOT# PM_THRMTRIP# E3 PROCHOT_N PROC_TDO P4 XDP_TMS_CPU TP67 PCH_TMS
@ R607 @ *51_1%_2
THRMTRIP_N PROC_TMS XDP_TRST# TP70 PCH_TDO
N1 @ R597 100_1%_2
PROC_TRST_N TP68
R230 49.9_1%_2 CPU_POPI_RCOMP CJ41 PCH_TDI R594 @ *51_1%_2
R296 49.9_1%_2 PCH_OPI_RCOMP DU3 PROC_POPIRCOMP N5 PCH_TRST# R602 0_5%_2 XDP_TRST#
A14 PCH_OPIRCOMP PCH_TRST_N R5 PCH_TCK
RSVD_25 PCH_TCK TP15 @
B14 K1 PCH_TDI R592 0_5%_2 XDP_TDI_CPU CPU_PREQ# R129 @ *51_1%_2
C725 RSVD_26 PCH_TDI K2 PCH_TDO R598 0_5%_2 XDP_TDO_CPU
DBG_PMODE DL15 PCH_TDO N3 PCH_TMS R608 0_5%_2 XDP_TMS_CPU XDP_TDO_CPU R599 100_1%_2
*0.1u/10V_2 DBG_PMODE PCH_TMS N2 PCH_JTAGX R604 0_5%_2 XDP_TCK
DV11 PCH_JTAGX
C DT11 GPP_E3/CPU_GP0 P6 CPU_PRDY# @ C
CR38 GPP_E7/CPU_GP1 PROC_PRDY_N M6 CPU_PREQ# TP14
6 DGPU_PW_CTRL# @
TBT_FORCE_PWR CR39 GPP_B3/CPU_GP2 PROC_PREQ_N TP12
@
TP25 GPP_B4/CPU_GP3
GPP_E6 DT12
GPP_H2 DJ38 GPP_E6
DL38 GPP_H2/CNV_BT_I2S_SDO
GPP_H19/TIME_SYNC04 of 19
XDP_TCK R603 51_1%_2
ICL-U 1.2G QPWA
CPU@
PCH_TRST# R600 @ *51_1%_2

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PCH_TCK R128 @ *51_1%_2

Strap pin
DBG_PMODE
10 DBG_PMODE GPP_E6
10 GPP_E6 GPP_H2
THERMTRIP# (50ohm) 10 GPP_H2
Trace Length: 1.1~12 inches +VCCST
3

2 Q12
13,39 IMVP_PWRGD
DMG301NU-7
B B
1

R187 *100K_1%_4

R188 R196
1K/F_4 1K/F_4
2

Q11

3 1 PM_THRMTRIP#
34,37,41 SYS_SHDN#
METR3904-G

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A A

Quanta Computer Inc.

PROJECT : ZAUI
+VCCSTG_TERM 5
Size Document Number Rev
+VCCST 5,13,16,36,39
3A
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44 ICL-U 3/14 (CPU MISC/JTA)
Date: Monday, November 04, 2019 Sheet 4 of 47
5 4 3 2 1
 5 4 3 2 1

05
+VCCIN +VCCIN 9.66A
U24L VCCIN: 70A
+1.2VSUS +1.2VSUS
A19 CJ35 U24M
AC12 VCCIN_1 VCCIN_52 CK10
D V13 VCCIN_2 VCCIN_53 J32 C232 1U/6.3V_4 C185 47U/6.3V_6 AA37 BP39 D
W 12 VCCIN_3 VCCIN_54 CL34 AG36 VDDQ_1 VDDQ_31 BR37
Y13 VCCIN_4 VCCIN_55 CL35 C202 1U/6.3V_4 C229 47U/6.3V_6 AJ36 VDDQ_2 VDDQ_32 BT38
K29 VCCIN_5 VCCIN_56 CN34 C330 C596 C575 C267 C266 C274 AL36 VDDQ_3 VDDQ_33 AC35
K31 VCCIN_6 VCCIN_57 CN35 C207 1U/6.3V_4 C279 47U/6.3V_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AL49 VDDQ_4 VDDQ_34 BU37
B19 VCCIN_7 VCCIN_58 CP33 AN36 VDDQ_5 VDDQ_35 BU49
B23 VCCIN_8 VCCIN_59 CR34 C233 1U/6.3V_4 C296 47U/6.3V_6 AP37 VDDQ_6 VDDQ_36 CA39
B27 VCCIN_9 VCCIN_60 A29 AR36 VDDQ_7 VDDQ_37 CB49
B29 VCCIN_10 VCCIN_61 CR35 C179 47U/6.3V_6 AR37 VDDQ_8 VDDQ_38 L38
BN10 VCCIN_11 VCCIN_62 CT33 C553 C552 C236 C247 C262 AT36 VDDQ_9 VDDQ_39 L49
BP11 VCCIN_12 VCCIN_63 CT34 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 AT49 VDDQ_10 VDDQ_40 N36
BP9 VCCIN_13 VCCIN_64 CT35 AA49 VDDQ_11 VDDQ_41 T49
BR10 VCCIN_14 VCCIN_65 CU33 C218 *15P/25V_2 C271 22U/6.3V_6 AV36 VDDQ_12 VDDQ_42 AC37
BT11 VCCIN_15 VCCIN_66 D19 AW 37 VDDQ_13 VDDQ_43 AD35
A21 VCCIN_16 VCCIN_67 D21 C300 *15P/25V_2 C177 22U/6.3V_6 AY36 VDDQ_14 VDDQ_44 AD36
BT9 VCCIN_17 VCCIN_68 D23 BA37 VDDQ_15 VDDQ_45 AE36
BU10 VCCIN_18 VCCIN_69 D24 C298 *15P/25V_2 C292 22U/6.3V_6 BA49 VDDQ_16 VDDQ_46 AF49
VCCIN_19 VCCIN_70 VDDQ_17 VDDQ_47 need check RSVD or NOT
BV36 D27 C223 C231 C241 BB36
BV9 VCCIN_20 VCCIN_71 AA12 C301 *15P/25V_2 C290 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 BD36 VDDQ_18 C33
VCCIN_21 VCCIN_72 VDDQ_19 RSVD_77 +VCCIN_AUX_OUT
BW 10 D29 BE37
BW 36 VCCIN_22 VCCIN_73 F19 C234 *15P/25V_2 C307 22U/6.3V_6 BF36 VDDQ_20 A33
VCCIN_23 VCCIN_74 VDDQ_21 RSVD_2 +VCCPRG0
BW 9 F21 BF37 B33 +VCCPRG1
BY10 VCCIN_24 VCCIN_75 F23 C306 *15P/25V_2 C230 22U/6.3V_6 AB36 VDDQ_22 RSVD_3
C19 VCCIN_25 VCCIN_76 F24 BF49 VDDQ_23 BG9 VCC1P8A R219 0_5%_6
C23 VCCIN_26 VCCIN_77 F27 C221 22U/6.3V_6 @ @ BG36 VDDQ_24 VCC1P8A_1 BJ9 C282 10U/6.3V_6
+1.8V_DEEP_SUS VCC1P8A: 0.7A
A23 VCCIN_27 VCCIN_78 F29 C354 C584 BJ36 VDDQ_25 VCC1P8A_2 BM9
C27 VCCIN_28 VCCIN_79 G1 C286 22U/6.3V_6 *1U/6.3V_4 *1U/6.3V_4 BL37 VDDQ_26 VCC1P8A_3 BW 1 @ C278 *1U/6.3V_4 PV
C29 VCCIN_29 VCCIN_80 G19 BM49 VDDQ_27 VCC1P8A_4 BW 2 +VCCFPGM +VCCSTG_OUT_FUSE
CA36 VCCIN_30 VCCIN_81 G23 BN37 VDDQ_28 VCC1P8A_5
CA9 VCCIN_31 VCCIN_82 AB1 BP38 VDDQ_29 R35 R178 0_5%_6
C CB10 VCCIN_32 VCCIN_83 G27 VDDQ_30 VCCSTG_OUT_3 V34 C
CC11 VCCIN_33 VCCIN_84 G29 +VCCST: 0.75A +VCCST
C591 1U/6.3V_4 CB1 VCCSTG_OUT_4 T34
CC36 VCCIN_34 VCCIN_85 H19 C556 10u/6.3V_4 C592 1U/6.3V_4 VCCST VCCSTG_OUT_5 U35 C215
CC9 VCCIN_35 VCCIN_86 H23 MV BY1 VCCSTG_OUT_6 AB34 1U/6.3V_4
CD10 VCCIN_36 VCCIN_87 H27 C557 10u/6.3V_4 +VCCSTG: 0.15A +VCCSTG
C588 1U/6.3V_4 VCCSTG VCCSTG_OUT_7 W 35
CE11 VCCIN_37 VCCIN_88 H29 C589 1U/6.3V_4 RSVD_74 AA35
A24 VCCIN_38 VCCIN_89 J18 RSVD_75 Y34 R626 *Short_0402 +VCC1.05_OUT_SFR
CE34 VCCIN_39 VCCIN_90 J20 Add F33 RSVD_76 PV VCCPLL: 0.09A
CE35 VCCIN_40 VCCIN_91 J22
+VCCSTG_OUT_FUSE
G33 VCCSTG_OUT_1 MV C598 1U/6.3V_4
CF10 VCCIN_41 VCCIN_92 J23 VCCSTG_OUT_2 CD2 +VCC1.05_OUT_SFR_R C595 1U/6.3V_4
CF33 VCCIN_42 VCCIN_93 AB13
+VCCSTG_TERM R596 0_5%_6 +VCCSTG_OUT_LGC E5 VCCPLL_1 VCCPLL_OC: 0.16A
CG11 VCCIN_43 VCCIN_94 J26 VCCSTG_OUT_LGC CG38 +VCCPLL_OC follow VDDQ

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VCCIN_44 VCCIN_95 VCCPLL_OC_1 +VCCPLL_OC
CG34 J28 CG41
CG35 VCCIN_45 VCCIN_96 K17 VCCPLL_OC_2 CG42 C317 1U/6.3V_4
DDR4=1.2V
CH10 VCCIN_46 VCCIN_97 K19 VCCPLL_OC_3 CG49 @ C316 *1U/6.3V_4 LPDDR4=1.1V
J30 VCCIN_47 VCCIN_98 K21 VCCPLL_OC_4
CJ11 VCCIN_48 VCCIN_99 K23 13 of 19 AD7
VCCIN_49 VCCIN_100 VCCIO_OUT +VCCIO_OUT
A27 K24
CJ34 VCCIN_50 VCCIN_101 K27
VCCIN_51 VCCIN_102 M1 ICL-U 1.2G QPWA
VCCIN_103 U1 CPU@ +VCCPLL_OC
CPU_VIDALERT# H1 VCCIN_104 +1.2VSUS
CPU_SVID_CLK H2 VIDALERT F17 VCCSENSE
CPU_SVID_DAT VIDSCK VCCIN_SENSE VCCSENSE 39
H3 G17 VSSSENSE R214 0_5%_6
VIDSOUT 12 ofVSSIN_SENSE
19 VSSSENSE 39
ICL-U 1.2G QPWA R215 0_5%_8
CPU@ for layout

+1.2V_VCCPLL_OC
B +VCCST B
R221 *0_5%_6
+VCCIN 39
+1.2VSUS 3,16,17,18,38,44

+VCCIO_OUT 8
+VCC1.05_OUT_SFR 14
R588 R585
+VCC1.05_OUT_FET 10,14,16
56_1%_2 100_1%_2
Ra +VCCST 4,13,16,36,39
CPU_VIDALERT# +VCCSTG 16
R587 0_5%_2
VR_SVID_ALERT# 39
CPU_SVID_CLK +VCCSTG_TERM 4
R590 0_5%_2
CPU_SVID_DAT VR_SVID_CLK 39
R586 0_5%_2
VR_SVID_DATA 39 +1.8V_DEEP_SUS 10,14,33

+1.2V_VCCPLL_OC 16
ALERT#需需需CLK & DAT之之
Ra Neen check value

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 4/14 (VCCIN/VDDQ)
Date: Monday, November 04, 2019 Sheet 5 of 47
5 4 3 2 1
 5 4 3 2 1

06
D D

PD 75K WLAN side

need Check with BIOS

U24F

DGPU_HOLD_RST# CH48 DV33 +3V

19 DGPU_HOLD_RST# GPP_B16/GSPI0_CLK GPP_D13/ISH_UART0_RXD
GPP_B18 CF48 DW 33
10 GPP_B18 DGPU_PWR_EN CF47 GPP_B18/GSPI0_MOSI GPP_D14/ISH_UART0_TXD DT33
20,44 DGPU_PWR_EN GPP_B17/GSPI0_MISO GPP_D15/ISH_UART0_RTS_N/GSPI2_CS1_N/IMGCLKOUT5
CH49 DU33
ACZ_SPKR CH47 GPP_B15/GSPI0_CS0_N GPP_D16/ISH_UART0_CTS_N/CNV_W CEN UART2_RXD R758 *49.9K_1%_2
10,26 ACZ_SPKR GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1_N DK22 UART2_TXD R757 *49.9K_1%_2
GC6_FB_EN_Q CL47 GPP_C12/UART1_RXD/ISH_UART1_RXD DW 24
20,22 GC6_FB_EN_Q GPP_B20/GSPI1_CLK GPP_C13/UART1_TXD/ISH_UART1_TXD
CK47 DV24
CK46 GPP_B22/GSPI1_MOSI GPP_C14/UART1_RTS_N/ISH_UART1_RTS_N DU24
22 GPU_EVENT# DGPU_PWROK GPP_B21/GSPI1_MISO GPP_C15/UART1_CTS_N/ISH_UART1_CTS_N
CH45
19,22 DGPU_PWROK GPP_B23 GPP_B19/GSPI1_CS0_N
CL48 CN43
10 GPP_B23 GPP_B23/SML1ALERT_N/PCHHOT_N/GSPI1_CS1_N GPP_B5/ISH_I2C0_SDA CN42
DP21 GPP_B6/ISH_I2C0_SCL
31 ACCEL_INTA GPP_C8/UART0_RXD
DK21 CN41
32 ODD_PRSNT# GPP_C9/UART0_TXD GPP_B7/ISH_I2C1_SDA
DL21 CL43
30 TPD_INT# GPP_C10/UART0_RTS_N GPP_B8/ISH_I2C1_SCL
DJ22
GPP_C11/UART0_CTS_N CL41
@ TP90 UART2_RXD DT22 GPP_B9/I2C5_SDA/ISH_I2C2_SDA CJ39
@ TP86 UART2_TXD DW 22 GPP_C20/UART2_RXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL DU36
DV22 GPP_C21/UART2_TXD GPP_D0/ISH_GP0 DV36 GPP_B18 R657 *10K_5%_2 PV
C DU22 GPP_C22/UART2_RTS_N GPP_D1/ISH_GP1 DW 36 C
GPP_C23/UART2_CTS_N GPP_D2/ISH_GP2 DT36
TP_I2C_DATA DT24 GPP_D3/ISH_GP3 DU34
30 TP_I2C_DATA TP_I2C_CLK GPP_C16/I2C0_SDA GPP_D17/ISH_GP4
DT23 DW 34
30 TP_I2C_CLK GPP_C17/I2C0_SCL GPP_D18/ISH_GP5 DT14 PCH_TypeC_UPFb#
GPP_E15/ISH_GP6 PCH_TypeC_UPFb# 29
DW 23 DU14 R764 *0_5%_4 SIO_EXT_SCI#
GPP_C18/I2C1_SDA GPP_E16/ISH_GP7 SIO_EXT_SCI# 34
DU23
GPP_C19/I2C1_SCL
DG : neet 33 ohm DU41
DV41 GPP_H4/I2C2_SDA
GPP_H5/I2C2_SCL
DW 41

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DT41 GPP_H6/I2C3_SDA
+3V GPP_H7/I2C3_SCL
DT40
DW 40 GPP_H8/I2C4_SDA/CNV_MFUART2_RXD
ACCEL_INTA R733 10K_5%_2 GPP_H9/I2C4_SCL/CNV_MFUART2_TXD 6 of 19
ICL-U 1.2G QPWA
CPU@
ODD_PRSNT# R306 10K_5%_4

+3V
high UMA Only
GPU Control PU/PD
+3V_S5 DGPU_PW_CTRL#
GPU power is control by PCH
low GPIO (Discrete, SG or Optimize)
TPD_INT# R378 10K_1%_2 R244 *EV@10K_5%_4 DGPU_PWR_EN R245 EV@100K_5%_4

+3V R261 EV@10K_5%_4 GC6_FB_EN_Q R262 *EV@10K_5%_4

B B
4 DGPU_PW_CTRL#
1A-1 20131015 For GC6 NV DG GC6_FB_EN PD.
+3V_S5 R388 EV@100K_1%_4 DGPU_PW_CTRL# R409 IV@1K/F_4
DGPU_PWROK R658 *EV@10K_1%_2
Type C change
DGPU_PWROK PD on GPU side
PCH_TypeC_UPFb# R767 *20K_1%_2

+3V

DGPU_PW_CTRL# VGA H/W Setup

+3V Signal Menu R659 10K_5%_2DGPU_HOLD_RST#

UMA Only 1 UMA Hidden UMA boot

R765
SIO_EXT_SCI#
SG/Optimise 0 GPU Hidden GPU boot
*20K_1%_2

+3V 2,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 5/14 (I2C/ISH)
Date: Monday, November 04, 2019 Sheet 6 of 47
5 4 3 2 1
 5 4 3 2 1

A11
A46
U24O

VSS_1 VSS_75
AF45
AF47
BT3
BT39
U24P

VSS_149 VSS_223
CR37
CR45
DJ33
DJ36
U24Q
VSS_297 VSS_362
F11
F31
07
BA45 VSS_2 VSS_76 AG1 BT41 VSS_150 VSS_224 CR49 DJ42 VSS_298 VSS_363 F45
BA47 VSS_3 VSS_77 AG11 BT42 VSS_151 VSS_225 CT37 DK3 VSS_299 VSS_364 F47
BB11 VSS_4 VSS_78 AG3 BT43 VSS_152 VSS_226 CT39 DK4 VSS_300 VSS_365 F8
D BB3 VSS_5 VSS_79 AG38 BT7 VSS_153 VSS_227 CT42 DK49 VSS_301 VSS_366 G21 D
BB7 VSS_6 VSS_80 AG39 BU45 VSS_154 VSS_228 CT9 DK6 VSS_302 VSS_367 G24
BC37 VSS_7 VSS_81 AG41 BU47 VSS_155 VSS_229 CU45 DK8 VSS_303 VSS_368 G3
BD3 VSS_8 VSS_82 A31 BV1 VSS_156 VSS_230 CU47 DL10 VSS_304 VSS_369 G31
BD38 VSS_9 VSS_83 AG42 BV11 VSS_157 VSS_231 CU49 DL13 VSS_305 VSS_370 G36
BD39 VSS_10 VSS_84 AG43 BV2 VSS_158 VSS_232 CV3 DL44 VSS_306 VSS_371 G49
BD41 VSS_11 VSS_85 AG5 BV3 VSS_159 VSS_233 CV34 DL47 VSS_307 VSS_372 G5
A48 VSS_12 VSS_86 AG9 BV7 VSS_160 VSS_234 CV35 DM47 VSS_308 VSS_373 H17
BD42 VSS_13 VSS_87 AH2 BW 3 VSS_161 VSS_235 CV5 DN15 VSS_309 VSS_374 H21
BD43 VSS_14 VSS_88 AH37 BW 37 VSS_162 VSS_236 CV9 DN19 VSS_310 VSS_375 H24
BD45 VSS_15 VSS_89 AH45 BW 5 VSS_163 VSS_237 CY41 DN24 VSS_311 VSS_376 H31
BD49 VSS_16 VSS_90 AH49 BW 6 VSS_164 VSS_238 CY45 DN31 VSS_312 VSS_377 H33
BD5 VSS_17 VSS_91 AJ2 BW 7 VSS_165 VSS_239 CY49 DN36 VSS_313 VSS_378 H36
BD6 VSS_18 VSS_92 AJ3 BY37 VSS_166 VSS_240 CY9 DN42 VSS_314 VSS_379 H45
BD7 VSS_19 VSS_93 A34 BY45 VSS_167 VSS_241 D13 DP45 VSS_315 VSS_380 H49
BE1 VSS_20 VSS_94 AK37 BY49 VSS_168 VSS_242 D17 DR49 VSS_316 VSS_381 J10
BE2 VSS_21 VSS_95 AL2 C11 VSS_169 VSS_243 D31 DT1 VSS_317 VSS_382 J13
BF3 VSS_22 VSS_96 AL45 C13 VSS_170 VSS_244 D44 DT10 VSS_318 VSS_383 J16
A49 VSS_23 VSS_97 AL47 C14 VSS_171 VSS_245 D49 DT15 VSS_319 VSS_384 J36
BF45 VSS_24 VSS_98 AL6 C17 VSS_172 VSS_246 DA10 DT20 VSS_320 VSS_385 J6
BF47 VSS_25 VSS_99 AM2 C21 VSS_173 VSS_247 DA33 DT27 VSS_321 VSS_386 K11
BF7 VSS_26 VSS_100 AM37 C24 VSS_174 VSS_248 DA9 DT3 VSS_322 VSS_387 K33
BG3 VSS_27 VSS_101 AN2 C31 VSS_175 VSS_249 DB32 DT32 VSS_323 VSS_388 K8
BG41 VSS_28 VSS_102 AN38 C34 VSS_176 VSS_250 DB35 DT37 VSS_324 VSS_389 L36
BG7 VSS_29 VSS_103 AN39 C39 VSS_177 VSS_251 DB38 DT42 VSS_325 VSS_390 L39
BH37 VSS_30 VSS_104 A36 C48 VSS_178 VSS_252 DB45 DT49 VSS_326 VSS_391 L41
BJ1 VSS_31 VSS_105 AN41 C49 VSS_179 VSS_253 DB47 DT6 VSS_327 VSS_392 L42
BJ2 VSS_32 VSS_106 AN42 C6 VSS_180 VSS_254 DB49 DT7 VSS_328 VSS_393 L43
BJ3 VSS_33 VSS_107 AN43 CA3 VSS_181 VSS_255 DC3 DT8 VSS_329 VSS_394 L45
AA45 VSS_34 VSS_108 AN45 CA38 VSS_182 VSS_256 DC49 DU1 VSS_330 VSS_395 L47
C BJ41 VSS_35 VSS_109 AN49 CA41 VSS_183 VSS_257 DC5 DU10 VSS_331 VSS_396 M10 C
BJ43 VSS_36 VSS_110 AN6 CA42 VSS_184 VSS_258 DC6 DU15 VSS_332 VSS_397 M3
BJ45 VSS_37 VSS_111 AR1 CA43 VSS_185 VSS_259 DD37 DU2 VSS_333 VSS_398 M36
BJ49 VSS_38 VSS_112 AR11 CA7 VSS_186 VSS_260 DD42 DU20 VSS_334 VSS_399 M5
BJ7 VSS_39 VSS_113 AR2 CB37 VSS_187 VSS_261 DE10 DU27 VSS_335 VSS_400 N45
BM11 VSS_40 VSS_114 AR3 CB45 VSS_188 VSS_262 DE13 DU32 VSS_336 VSS_401 N49
BM3 VSS_41 VSS_115 A39 CB47 VSS_189 VSS_263 DE17 DU37 VSS_337 VSS_402 P11
BM45 VSS_42 VSS_116 AR7 CC3 VSS_190 VSS_264 DE18 DU48 VSS_338 VSS_403 P41
BM47 VSS_43 VSS_117 AR9 CC7 VSS_191 VSS_265 DE20 DU49 VSS_339 VSS_404 P8
BM5 VSS_44 VSS_118 AT3 CE37 VSS_192 VSS_266 DE22 DU7 VSS_340 VSS_405 R3
AA47 VSS_45 VSS_119 AT45 CE45 VSS_193 VSS_267 DE23 DV2 VSS_341 VSS_406 R37
BM6 VSS_46 VSS_120 AT47 CE49 VSS_194 VSS_268 DE26 DV44 VSS_342 VSS_407 T11

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BM7 VSS_47 VSS_121 AT5 CE9 VSS_195 VSS_269 DE28 DV48 VSS_343 VSS_408 T36
BP1 VSS_48 VSS_122 AT6 CG37 VSS_196 VSS_270 DE29 DV8 VSS_344 VSS_409 T41
BP2 VSS_49 VSS_123 AT7 CG39 VSS_197 VSS_271 DE33 DW 1 VSS_345 VSS_410 T43
BP3 VSS_50 VSS_124 AU37 CG43 VSS_198 VSS_272 DE45 DW 10 VSS_346 VSS_411 T45
BP43 VSS_51 VSS_125 AV11 CG45 VSS_199 VSS_273 DE6 DW 2 VSS_347 VSS_412 T47
BP7 VSS_52 VSS_126 A42 CG47 VSS_200 VSS_274 DF13 DW 20 VSS_348 VSS_413 U3
BR45 VSS_53 VSS_127 AV3 CG9 VSS_201 VSS_275 DF22 DW 27 VSS_349 VSS_414 U37
BR49 VSS_54 VSS_128 AV38 CH3 VSS_202 VSS_276 DF28 DW 44 VSS_350 VSS_415 U5
AB11 VSS_55 VSS_129 AV39 CH5 VSS_203 VSS_277 DF33 DW 46 VSS_351 VSS_416 V11
AB3 VSS_56 VSS_130 AV41 CJ37 VSS_204 VSS_278 DF35 DW 48 VSS_352 VSS_417 V36
AB38 VSS_57 VSS_131 AV42 CJ42 VSS_205 VSS_279 DF39 DW 49 VSS_353 VSS_418 V45
AB39 VSS_58 VSS_132 AV43 CJ9 VSS_206 VSS_280 DG10 DW 7 VSS_354 VSS_419 V49
AB41 VSS_59 VSS_133 AV45 CK45 VSS_207 VSS_281 DG12 E11 VSS_355 VSS_420 V9
A17 VSS_60 VSS_134 AV49 CK49 VSS_208 VSS_282 DG13 E34 VSS_356 VSS_421 W 37
AB42 VSS_61 VSS_135 AV7 CK9 VSS_209 VSS_283 DG15 E36 VSS_357 VSS_422 Y36
AB43 VSS_62 VSS_136 AY3 CL37 VSS_210 VSS_284 DG22 E39 VSS_358 VSS_423 Y38
AB5 VSS_63 VSS_137 A44 CL42 VSS_211 VSS_285 DG23 E42 VSS_359 VSS_424 Y43
AB6 VSS_64 VSS_138 AY7 CL49 VSS_212 VSS_286 DG47 E6 VSS_360 VSS_425 Y9
B AC45 VSS_65 VSS_139 B17 CM45 VSS_213 VSS_287 DG6 VSS_361 VSS_426 DE15 B
AC49 VSS_66 VSS_140 B2 CM47 VSS_214 VSS_288 DH1 17 of 19 VSS_427
AD10 VSS_67 VSS_141 B21 CM9 VSS_215 VSS_289 DH3
AD11 VSS_68 VSS_142 B24 CN3 VSS_216 VSS_290 DH45 ICL-U 1.2G QPWA
AD34 VSS_69 VSS_143 B3 CN37 VSS_217 VSS_291 DH5 CPU@
AD37 VSS_70 VSS_144 B31 CN39 VSS_218 VSS_292 DJ19
A3 VSS_71 VSS_145 B48 CN5 VSS_219 VSS_293 DJ21
AE6 VSS_72 VSS_146 BA1 CP9 VSS_220 VSS_294 DJ27
AF37 VSS_73 VSS_147 BA2 CR32 VSS_221 VSS_295 DJ31
VSS_74 15 of 19 VSS_148 VSS_22216 of 19 VSS_296

ICL-U 1.2G QPWA ICL-U 1.2G QPWA

CPU@ CPU@

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 6/14 (GND)
Date: Monday, November 04, 2019 Sheet 7 of 47
5 4 3 2 1
 5 4 3 2 1

08
U24R +VCCIO_OUT
N34 U24S
AK10 RSVD_TP_27 DA11 R169 1K_5%_2 MIPI60_CFG0#_R
BT36 RSVD_TP_28 RSVD_TP_35 CL32 always un-stuff MIPI60_CFG0# AG6 A47 TP_A47 TP60 @ MV R172 1K_5%_2 MIPI60_CFG1#
AH10 RSVD_7 RSVD_TP_36 CN32 MIPI60_CFG1# AE7 CFG_0 RSVD_TP_1 B47 TP_B47 TP58 @ R180 *10K_1%_2 MIPI60_CFG2#
BC10 RSVD_TP_29 RSVD_TP_37 CY35 for INTEL Debug MIPI60_CFG2# AG7 CFG_1 RSVD_TP_2 R162 *10K_1%_2 MIPI60_CFG3#
CH33 RSVD_TP_30 RSVD_32 DB37 (substitute test points) MIPI60_CFG3# AD9 CFG_2 C1 TP_C1 TP62 @ R167 *10K_1%_2 MIPI60_CFG4#
RSVD_TP_31 RSVD_33 DF37 MIPI60_CFG4# AE9 CFG_3 RSVD_57 E1 TP_E1 TP65 @ R152 *10K_1%_2 MIPI60_CFG5#
CJ32 RSVD_34 MIPI60_CFG5# AB9 CFG_4 RSVD_58 R176 *10K_1%_2 MIPI60_CFG6#
AM10 RSVD_12 BF11 IST_TP_0 R199 @ *0_5%_2 MIPI60_CFG6# AJ6 CFG_5 CT32 TP_CT32 TP23 @ R147 *10K_1%_2 MIPI60_CFG7#
BH10 RSVD_TP_32 IST_TP_0 BD11 IST_TP_1 MIPI60_CFG7# AB7 CFG_6 RSVD_TP_10 CV32 TP_CV32 TP27 @ R126 1K_5%_2 MIPI60_CFG8#
J34 RSVD_TP_33 IST_TP_1 BE10 IST_TRIG_0 R197 @ *0_5%_2 MIPI60_CFG8# V10 CFG_7 RSVD_TP_11 R185 1K_5%_2 MIPI60_CFG9#
RSVD_TP_34 IST_TRIG_0 BF10 IST_TRIG_1 MIPI60_CFG9# AJ5 CFG_8 G15 TP_G15 TP63 @ MV R133 1K_5%_2 MIPI60_CFG10#
D Y11 IST_TRIG_1 MIPI60_CFG10# Y10 CFG_9 RSVD_79 F15 TP_F15 TP61 @ R179 *10K_1%_2 MIPI60_CFG11# D
@ TP7 TP_L34 L34 RSVD_9 CW 33 PCH_IST_TP_0 TP24 @ MIPI60_CFG11# AJ7 CFG_10 RSVD_80 R141 1K_5%_2 MIPI60_CFG12#
RSVD_10 PCH_IST_TP_0 CY32 PCH_IST_TP_1 TP22 @ MIPI60_CFG12# AB10 CFG_11 BW 11 TP_BW11 TP19 @ MV R182 1K_5%_2 MIPI60_CFG13#
AJ11 PCH_IST_TP_1 MIPI60_CFG13# AL7 CFG_12 RSVD_TP_5 CA11 TP_CA11 TP20 @ R184 *10K_1%_2 MIPI60_CFG14#
CG32 RSVD_17 CY37 MIPI60_CFG14# AL9 CFG_13 RSVD_TP_6 R183 *10K_1%_2 MIPI60_CFG15#
RSVD_21 RSVD_27 CV37 MIPI60_CFG15# AJ9 CFG_14 C16 R134 10K_1%_2 MBP0#
RSVD_28 NEED CHECK. 03/20 CFG_15 VSS_428 A16 R135 10K_1%_2 MBP1#
MIPI60_CFG16_STB_DN V6 VSS_429 R127 10K_1%_2 MBP2#
CK33 @TP13 MIPI60_CFG17_STB_DP V7 CFG_16 C2 R136 10K_1%_2 MBP3#
BP41 RSVD_22 G34 CFG_17 RSVD_55 A4
AL11 RSVD_20 RSVD_35 H34 MIPI60_CFG18_STB_DN Y6 RSVD_56 R156 51_1%_2 MIPI60_CFG16_STB_DN
BG11 RSVD_23 RSVD_46 DJ34 @TP16 MIPI60_CFG19_STB_DP Y7 CFG_18 DP5
AN11 RSVD_24 RSVD_48 DK31 CFG_19 RSVD_65 DR5 R143 51_1%_2 MIPI60_CFG18_STB_DN
M13 RSVD_16 RSVD_49 DK15 R173 49.9_1%_2 CFG_RCOMP AD6 RSVD_66
@ TP8 TP_M34 M34 RSVD_18 RSVD_50 CP3 CFG_RCOMP D14
RSVD_19 RSVD_51 CP5 MBP0# T9 RSVD_59 E16
RSVD_52 AN9 MBP1# T7 BPM_N_0 RSVD_60
RSVD_53 AN7 MBP2# T10 BPM_N_1 DV6 TP_DV6 TP93 @
RSVD_54 AF10 MBP3# T6 BPM_N_2 RSVD_TP_13 DW 6 TP_DW6 TP89 @
DU42 RSVD_36 AE11 BPM_N_3 RSVD_TP_14
DW 42 RSVD_42 RSVD_37 H5 BJ11 DP2 TP_DP2 TP81 @ SKTOCC_N -> H_PRESENT_N
D33 RSVD_43 RSVD_38 D1 BL10 RSVD_62 RSVD_TP_24 DP1 TP_DP1 TP80 @ +3VPCU +3V_S5
L13 RSVD_44 RSVD_39 DJ40 RSVD_63 RSVD_TP_25
K13 RSVD_45 RSVD_40 DK40 @ TP76 TP_AV1 AV1 DW 4 TP_DW4 TP88 @
RSVD_47 18/19 RSVD_41 RSVD_TP_17 RSVD_TP_15 DV4 TP_DV4 TP87 @ @ @
@ TP72 TP_AT2 AT2 RSVD_TP_16 R574 R573
@ TP73 TP_AT1 AT1 RSVD_TP_18 CM33 TP_CM33 TP21 @
ICL-U 1.2G QPWA RSVD_TP_20 TP_3 *10K_5%_2 *10K_5%_2
@ TP75 TP_AU1 AU1 DB10 TP_DB10 TP30 @
CPU@ @ TP74 TP_AU2 AU2 RSVD_TP_19 TP_4
RSVD_TP_21 R1 TP_R1 TP71 @ SKTOCC# R578 @ *0_5%_2
TP_AV2 RSVD_TP_12 RSMRST# 13,34

3
C @ TP77 AV2 C
RSVD_TP_22 DW 3 TP_DW3 TP85 @ @
PROC_SELECT +3VPCU DP3 RSVD_TP_7 DV3 TP_DV3 TP84 @ R572 2 @
DT2 RSVD_67 RSVD_TP_8 *10K_5%_2 Q32
RSVD_68 DH49 TP_DH49 TP79 @ *DMG1012T-7
AR10 RSVD_TP_9
RSVD_69 TP_DL8

1
R580 AP10 DL8 TP33 @
BP36 RSVD_71 RSVD_TP_23
10K_5%_2 RSVD_70
BM36 DW 47 TP_DW47 TP95 @
RSVD_72 TP_1 DV47 TP_DV47 TP97 @
U42_L_U43E_Z J15 TP_2 DU47
K15 VSS_430 VSS_432

Vinafix.com
@ VSS_431 P10
R581 SKTOCC# C5 RSVD_TP_26
*100K_5%_2 U42_L_U43E_Z D4 SKTOCC_N
A5 RSVD_78 19 of 19
RSVD_64

ICL-U 1.2G QPWA

CPU@

EAR-STALL/NOT STALL RESET SEQUENCE PCI EXPRESS STATIC LANE REVERSAL PHYSICAL_DEBUG_ENABLED(DFX PRIVACY) PEG DEFER TRAINING NO SVID PROTOCOL CAPABLE VR CONNECTED
AFTER PCU PLL IS LOCKED FOR ALL PEG PORTS CFG4 CFG7 CFG9
CFG0 CFG2 1: DISABLED 1: (DEFAULT) PEG TRAIN IMMEEDIATELY 1: VRS SUPPORTING SVID PROTOCOL ARE PRESENT
1: (DEFAULT) NORMAL OPERATION; NO STALL 1: (DEFAULT)NORMAL OPERATION AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT FOLLOWING XXRESETB DEASSERTION 0: NO VR SUPPORTING SVID IS PRESENT. THE CHIP
R170 0: LANE REVERSAL 0: ENABLED 0: PEG WAIT FOR BIOS FOR TRAINING WILL NOT GENERATE (OR RESPOND TO) SVID ACTIVITY
0_5%_2 @ MIPI60_CFG2# NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT
MIPI60_CFG0# MIPI60_CFG0#_R MIPI60_CFG4# MIPI60_CFG7# MIPI60_CFG9#
B TP17 B
@
MV @ R181 @ @
R168 *1K_5%_2 R166 R146 R186
*1K_5%_2 1K_5%_2 *1K_5%_2 *1K_5%_2

PCH/ PCH LESS MODE SELECTION PHYSICAL_DEBUG_ENABLED(DFX PRIVACY) PCIE PORT BIFURCATION STRAPS ALLOW THE USE OF NOA ON LOCKED UNITS SAFE MODE BOOT
CFG1 CFG3 CFG[6:5] CFG8 CFG10
1: (DEFAULT) NORMAL OPERATION 1: DISABLED 11: DEVICE1 FUNTION 1, DEVICE 1 FUNCTION2 DISABLED 1: DISABLED(DEFAULT): IN THHIS CASE, NOA WILL BE 1: POWER FEATURES ACTIVATED DURING RESETT
0: PCH-LESS MODE 0: ENABLED 10: DEVICE1 FUNCTION1 ENABLED DEVICE1 FUNCTION 2 DISABLED DISABLE IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS 0: POWER FEATURES (ESPECIALLY CLOCK GATINE
MIPI60_CFG1#
01: DEVICE 1 FUNCTION 1 DISABLED, DEVICE 1 FUNCTION 2 ENABLED 0: ENABLED: NOA WILL BE AVAILABLE REGARDLESS OF ARE NOT ACTIVATED
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
MIPI60_CFG3# 00 DEVICE 1 FUNCTION 1 ENABLED, DEVICE 1 FUNCTION 2 ENABLED THE LOCKING OF THE UNIT MIPI60_CFG8# MIPI60_CFG10#
MIPI60_CFG5# MIPI60_CFG6#
@
R171 @ @ @
*1K_5%_2 R161 @ @ R125 R132
*1K_5%_2 R151 R174 *1K_5%_2 *1K_5%_2
*1K_5%_2 *1K_5%_2

DMI AC COUPLING - JUST A PLACE HOLDER. PM SYNC LEGACY PMSYNC AYNC MODE- PM SYNC
+VCCIO_OUT 5
A
NOT APPLICABLE FOR ULX-ULT CFG12 CFG13 MIPI60_CFG14# MIPI60_CFG15# +3VPCU 12,16,25,26,28,30,31,34,35,36,37
A

CFG11 1: (DEFAULT) PMSYNC 2.0 1: (DEFAULT)SYNCHCRONOUS (1 24 MHZ CYCLE PER BIT) +3V_S5 2,6,10,11,13,14,15,16,28,29,30,33,34,37,40,41
1:(DEFAULT)DMI WILL BE CONFIGURED AS HALF SWING DC COUPLED 0: LEGACY 0: ASYNC - 4-24MHZ CYCLES PER BIT
0: DMI WILL BE CONFIGURED AS FULL SWING AC COUPLED MIPI60_CFG12# @ @
MIPI60_CFG11# MIPI60_CFG13# R192 R191
*1K_5%_2 *1K_5%_2
@ Quanta Computer Inc.
@ R140 @
R177 *1K_5%_2 R193
*1K_5%_2 *1K_5%_2 PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 7/14 (RSVD/XDP)
Date: Monday, November 04, 2019 Sheet 8 of 47
5 4 3 2 1
 5 4 3 2 1

+3V_DEEP_SUS

22,26,34 2ND_MBCLK
2ND_MBCLK R380 0_5%_2 SMB_ML1_CLK
SMB_PCH_CLK

SMB_PCH_DAT
R801

R779
2.2K_5%_2

2.2K_5%_2
09
2ND_MBDATA R381 0_5%_2 SMB_ML1_DAT SMB_ML0_CLK R361 2.2K_5%_2
22,26,34 2ND_MBDATA
SMB_ML0_DAT R367 2.2K_5%_2

R783 100K_1%_2 PCH_SUSPWRDNACK R383 *10K_5%_2

U24E
D D
PCH_SPI1_CLK R777 22_1%_4 PCH_SPI0_CLK DB42
9,31,34 PCH_SPI1_CLK PCH_SPI1_SI PCH_SPI0_MOSI SPI0_CLK SMB_PCH_CLK SMB_ML1_CLK
R759 22_1%_4 DD43 DK27 R356 2.2K_5%_2
9,10,31,34 PCH_SPI1_SI SPI0_MOSI GPP_C0/SMBCLK

SMBUS
PCH_SPI1_SO R744 22_1%_4 PCH_SPI0_MISO DF43 DP24 SMB_PCH_DAT
9,31,34 PCH_SPI1_SO PCH_SPI_IO2 SPI0_MISO GPP_C1/SMBDATA GPP_C2 SMB_ML1_DAT

SPI 0
DF42 DL24 R357 2.2K_5%_2
10 PCH_SPI_IO2 PCH_SPI_IO3 SPI0_IO2 GPP_C2/SMBALERT_N GPP_C2 9,10
DD41
10 PCH_SPI_IO3 PCH_SPI_CS0# SPI0_IO3
DB43
DF41 SPI0_CS0_N DK24 SMB_ML0_CLK
SPI_TPM_CS# DB41 SPI0_CS1_N GPP_C3/SML0CLK DJ24 SMB_ML0_DAT
EMI(near Ra)

SML 0
31 SPI_TPM_CS# SPI0_CS2_N GPP_C4/SML0DATA GPP_C5
DP22
GPP_C5/SML0ALERT_N GPP_C5 10
GPP_E11 DV16
DT16 GPP_E11/SPI1_CLK/BK1/SBK1 DN22 SMB_ML1_CLK R379 *0_5%_2 ESPI_CLK C326 *10P/50V_2
SSD PCH_SUSPWRDNACK 34

SML1
GPP_E13/SPI1_MOSI/BK3/SBK3 GPP_C6/SML1CLK/SUSW ARN_N/SUSPW RDNACK

SPI 1
DU18 DL22 SMB_ML1_DAT
DT18 GPP_E12/SPI1_MISO/BK2/SBK2 GPP_C7/SML1DATA/SUSACK_N
DW 18 GPP_E1/SPI1_IO2
GPP_E10 DW 16 GPP_E2/SPI1_IO3 CR47 ESPI_CLK_R R240 49.9_1%_2
SATA_LED# GPP_E10/SPI1_CS_N/BK0/SBK0 GPP_A5/ESPI_CLK ESPI_0_R ESPI_CLK 34
DU16 CN45 R231 10_5%_2
TP91 GPP_E8/SATALED_N/SPI1_CS1_N GPP_A0/ESPI_IO0 ESPI_0 34
CN48 ESPI_1_R R233 10_5%_2
GPP_A1/ESPI_IO1 ESPI_2_R ESPI_1 34
CN49 R236 10_5%_2

eSPI
GPP_A2/ESPI_IO2 ESPI_3_R ESPI_2 34
DV19 CN47 R237 10_5%_2

MLINK
CL_CLK GPP_A3/ESPI_IO3 ESPI_3 34
DW 19 CT45 ESPI_CS#_R R254 0_5%_2
CL_DATA GPP_A4/ESPI_CS_N ESPI_RESET#_R ESPI_CS# 34
DT19 CR46 R242 0_5%_2
CL_RST_N GPP_A6/ESPI_RESET_N ESPI_RESET# 34
5 of 19

ICL-U 1.2G QPWA

CPU@

C C

PCH SPI ROM(CLG) GPP_E11 R728 100K_5%_2

ESPI_CS# R243 75K_1%_2
DG : no neet PD ESPI_RESET# R239 100K_5%_2
PCH_SPI1_CLK R789 *100K_5%_2
Size P/N
Vender
MXIC 16M AKE3DZN0Z03 MX25L12873FM2I-10G

Vinafix.com
Kabylake
SMBus/Pull-up(CLG) POA 3.3V Winbond 16M AKE3DF-KN01 W25Q128JVSIQ
+3V
GigaDevice 16M AKE3DZN0Q02 GD25B127DSIGR

+3V R800 4.7K_5%_2

5

Q41A

4 3 SMB_PCH_DAT PCH_SPI_CS0#
17,30,31 SMB_RUN_DAT 34 PCH_SPI_CS0# PCH_SPI1_CLK
9,31,34 PCH_SPI1_CLK PCH_SPI1_SI
2N7002KDW 9,10,31,34 PCH_SPI1_SI
PCH_SPI1_SO
R790 @ *0_5%_2
9,31,34 PCH_SPI1_SO
PCH SPI ROM(CLG)
DDR4
B
Touch Pad B

+3VSPI
+3V R788 4.7K_5%_2
2

Q41B
+3V_DEEP_SUS R358 0_5%_6
1 6 SMB_PCH_CLK
17,30,31 SMB_RUN_CLK
U32
2N7002KDW PCH_SPI_CS0# R384 0_5%_4 PCH_SPI_CS0#_R 1 8 +3VSPI
PCH_SPI1_CLK R312 22_1%_4 PCH_SPI1_CLK_R 6 CE# VDD
R792 @ *0_5%_2 PCH_SPI1_SI R323 22_1%_4 PCH_SPI1_SI_R 5 SCK R324 100K_1%_4
PCH_SPI1_SO R382 22_1%_4 PCH_SPI1_SO_R 2 SI 7HOLD# R335 22_1%_4 PCH_SPI_IO3
SO HOLD#
PCH_SPI_IO2 R363 22_1%_4 BIOS_WP#3 4
W P# VSS C370
+3VSPI BIOS SOCKET 0.1u/16V_2
C374 1u/6.3V_2 R351 100K_1%_4 DG008000012
C373
22p/50V_4
U33
strap pin
1 8
CS VCC
2 7
GPP_C2 IO1/DO IO3/HOLD
9,10 GPP_C2 GPP_E11 3 6
10 GPP_E11 GPP_E10 IO2/W P CLK
10 GPP_E10 P/N DG008000011 (Socket)
5
4 IO0/DI
GND

A W25Q64FVSSIQ A

Quanta Computer Inc.

+3V 2,6,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44 PROJECT : ZAUI
Size Document Number Rev
+3V_DEEP_SUS 10,14
3A
ICL-U 8/14 (SMBus/SPI)
Date: Monday, November 04, 2019 Sheet 9 of 47
5 4 3 2 1
 5 4 3 2 1

TOP SWAP OVERRIDE CPUNSSC CLOCK FREQ

High: TOP SWAP ENABLED
Low: DISABLED
WEAK INTERNAL PD 20K
+3V

@
R664
(RSVD) XTAL INPUT MODE
High: XTAL INPUT IS SINGLE ENDED
Low: XTAL IS ATTACHED
WEAK INTERNAL PD 20K
+3V_S5

@
R413
High: 19.2MHz CLOCK FROM INTERNAL DIVIDER
Low: 38.4MHz CLOCK FROM DIRECT CRYSTAL (Default)
WEAK INTERNAL PD 20K +3V_DEEP_SUS
(RSVD) CONSENT STRAP
High: DISABLE
Low: ENABLE +3V_DEEP_SUS
External pull-up is required.
10
GPP_B14/SPKR *4.7K_5%_2 *4.7K_5%_2
GPP_B23/SML1ALERT# @ R753
ACZ_SPKR
13 GPD7 GPD7 R663 SPI0_IO2 MV 100K_5%_2
6,26 ACZ_SPKR
*4.7K_5%_2 R723
0_5%_2 @
@ @ GPP_B23 PCH_SPI_IO2 XDP_PCH_SPI0_IO2
D R665 GPD7 R405
6 GPP_B23 9 PCH_SPI_IO2 TP92 D
*20K_1%_2 *20K_1%_2
@ @
R666 R743
*20K_1%_2 *4.7K_5%_2

+3V_DEEP_SUS
NO REBOOT This strap has no internal pull-up or pull-down.
+3V
High: NO REBOOT 0 = DDP1 I2C / TBT_LSX0 pins at 1.8V
Low: REBOOT ENABLED 1 = DDP1 I2C / TBT_LSX0 pins at 3.3V @
WEAK INTERNAL PD 20K R304 XTAL FREQUENCE SEL
@ *4.7K_5%_2 High: 24MHZ
R655 GPP_E19
GPP_B18/GSPI0_MOSI *4.7K_5%_2 2 GPP_E19
(25 MHZ WHEN XTAL FREQ DIVIDER NON ZERO)
Low: 38.4MHZ (DEFAULT)
GPP_B18 WEAK INTERNAL PD 20K +1.8V_DEEP_SUS
6 GPP_B18
R301
@ 20K_1%_2
R656 @
*20K_1%_2 R353
GPP_F0 *4.7K_5%_2

CNV_BRI_DT
12,33 CNV_BRI_DT

@
TLS CONFIDENTIALITY (RSVD) A0 PERSONALITY STRAP R337
C +3V_DEEP_SUS +3V_DEEP_SUS *20K_1%_2 C
HIGH - TLS CONFIDENTIALITY ENABLE High: DISABLE 3V SELECT STRAP +3V_DEEP_SUS
LOW - TLS CONFIDENTIALITY DISABLE Low: ENABLE
WEAK INTERNAL PD 20K High: 3.0V +/-5%
External pull-up is required. R721 Low: 3.3V +/-5%
R346 100K_5%_2 @
GPP_C2/SMBALERT# 4.7K_5%_2 R705
SPI0_IO3 *4.7K_5%_2
GPP_C2 PCH_SPI_IO3
9 GPP_C2 9 PCH_SPI_IO3
13 INPUT3VSEL INPUT3VSEL

@ @

Vinafix.com
R303 R722 R706
*20K_1%_2 *4.7K_5%_2 100K_5%_2

ESPI OR EC LESS (RSVD) JTAG ODT DISABLE MAF/SAF STRAP Flash Descriptor Security Override XTAL INPUT FREQUENCY [0]
HIGH: ESPI IS DISABLED High: JTAG ODT Enable High: SAF ENABLE High: DISABLE 00: DIVIDE BYPASS
HVM ONLY
LOW: ESPI SELECTED +3V_DEEP_SUS Low: JTAG ODT Disable +3V_DEEP_SUS Low: MAF ENABLE +3V_DEEP_SUS Low: ENABLE +3V_DEEP_SUS 01: DIVIDE BY 2 (HVM: 38.4MHZ INPUT) +1.8V_DEEP_SUS +3V_DEEP_SUS
WEAK INTERNAL PD 20K External pull-up is required. WEAK INTERNAL PD 20K WEAK INTERNAL PD 20K 10: DIVIDE BY 10 (HVM: 250MHZ INPUT)
11: DIVIDE BY 4 (BI: 100MHZ INPUT)
@ R760 @ @
( QUALIFIED BY DFXTESTMODE) @
GPP_C5/SML0ALERT# R347 100K_5%_2 R415 GPP_R2 R677 NO INTERNAL PU/PD R747 R735
*4.7K_5%_2 GPP_E6 GPP_H2 *2.2K_5%_2 *4.7K_5%_2 20K_1%_2 *20K_1%_2
B B
GPP_C5 GPP_E6 GPP_H2 ACZ_SDOUT
9 GPP_C5 4 GPP_E6 4 GPP_H2 13 ACZ_SDOUT 9 GPP_E10

@ @ @
R334 R736 R408 34 ME_WR#
GPP_E10 R725
20K_1%_2 *4.7K_5%_2 *20K_1%_2 R679 1K_5%_2 *20K_1%_2

(RSVD) BOOT HALT (RSVD) ITP PMODE STRAP FOR SPI 1.8V/3.3V SELECTION XTAL INPUT FREQUENCY [1]
High: DISABLE +3V_DEEP_SUS
High: DFXTESTMODE DISABLED(DEFAULT) High: SPI voltage is 1.8V 00: DIVIDE BYPASS
HVM ONLY
Low: ENABLE Low: DFXTESTMODE ENABLED +VCC1.05_OUT_FET Low: SPI voltage is 3.3V +3V_RTC 01: DIVIDE BY 2 (HVM: 38.4MHZ INPUT) +1.8V_DEEP_SUS +3V_DEEP_SUS
External pull-up is required. WEAK INTERNAL PU 20K 10: DIVIDE BY 10 (HVM: 250MHZ INPUT)
R771 11: DIVIDE BY 4 (BI: 100MHZ INPUT)
100K_5%_2
MV R300
( QUALIFIED BY DFXTESTMODE) @
SPI0_MOSI R755 1K_5%_2 R712 NO INTERNAL PU/PD R750 R739
0_5%_2 @ INTRUDER# *1M_5%_2 20K_1%_2 *20K_1%_2
PCH_SPI1_SI XDP_PCH_SPI0_SI @
9,31,34 PCH_SPI1_SI TP96
INTRUDER#
4 DBG_PMODE TP34 13 INTRUDER# 9 GPP_E11
@ @
R778 R290
*4.7K_5%_2 *20K_1%_2 R713 GPP_E11
10K_5%_2
A ITP_PMODE A

+1.8V_DEEP_SUS 5,14,33
Quanta Computer Inc.
+3V 2,6,9,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44
+3V_S5 2,6,8,11,13,14,15,16,28,29,30,33,34,37,40,41 PROJECT : ZAUI
+3V_DEEP_SUS 9,14
Size Document Number Rev
+VCC1.05_OUT_FET 14,16
3A
ICL-U 9/14 (HW STRAP)
Date: Monday, November 04, 2019 Sheet 10 of 47
5 4 3 2 1
 5 4 3 2 1

+3V 2,6,9,10,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44 U24H

11
+3V_S5 2,6,8,10,13,14,15,16,28,29,30,33,34,37,40,41
CV7 DJ8 USB30_RX1-
19 PEG_RXN7 PCIE7_RXN PCIE1_RXN/USB31_1_RXN USB30_RX1+ USB30_RX1- 24
CV6 DJ6
19
19
PEG_RXP7
PEG_TXN7 C621 0.22u/10V_2 PEG_TXN7_C DD3 PCIE7_RXP PCIE1_RXP/USB31_1_RXP DJ2 USB30_TX1- USB30_RX1+ 24 USB3.0 Small Board
PCIE7_TXN PCIE1_TXN/USB31_1_TXN USB30_TX1- 24
19 PEG_TXP7 C618 0.22u/10V_2 PEG_TXP7_C DD5
PCIE7_TXP PCIE1_TXP/USB31_1_TXP
DJ1 USB30_TX1+
USB30_TX1+ 24 DB 1SPD TypeA UP
dGPU CT6 DG9 USB30_RX2-
19
19
PEG_RXN8
PEG_RXP8
CT7 PCIE8_RXN PCIE2_RXN/USB31_2_RXN DG7 USB30_RX2+ USB30_RX2- 24 USB3.0 Small Board
PCIE8_RXP PCIE2_RXP/USB31_2_RXP USB30_RX2+ 24
19 PEG_TXN8 C614
C617
0.22u/10V_2
0.22u/10V_2
PEG_TXN8_C
PEG_TXP8_C
DA3
DA5 PCIE8_TXN PCIE2_TXN/USB31_2_TXN
DJ3
DJ5
USB30_TX2-
USB30_TX2+ USB30_TX2- 24 DB 1SPD TypeA DN
19 PEG_TXP8 PCIE8_TXP PCIE2_TXP/USB31_2_TXP USB30_TX2+ 24
CP7 DE7 USB30_RX3-
28 PCIE_RXN9_LAN PCIE9_RXN PCIE3_RXN/USB31_3_RXN USB30_RX3+ USB30_RX3- 29
CP6 DE9
28 PCIE_RXP9_LAN PCIE_TXN9_LAN_C PCIE9_RXP PCIE3_RXP/USB31_3_RXP USB30_TX3- USB30_RX3+ 29
LAN 28 PCIE_TXN9_LAN C611 0.1u/16V_2 DA2 DF3 Type-c
PCIE_TXP9_LAN_C DA1 PCIE9_TXN PCIE3_TXN/USB31_3_TXN DF5 USB30_TX3+ USB30_TX3- 29
C613 0.1u/16V_2
28 PCIE_TXP9_LAN PCIE9_TXP PCIE3_TXP/USB31_3_TXP USB30_TX3+ 29
D USB30_RX_N4 D
CM7 DC7 R263 @ *0_5%_4
33 PCIE_RXN10_WLAN PCIE10_RXN PCIE4_RXN/USB31_4_RXN USB30_RX_P4
CM6 DC9 always un-stuff for DCI Debug (INTEL)
33 PCIE_RXP10_WLAN PCIE10_RXP PCIE4_RXP/USB31_4_RXP USB30_TX_N4
WLAN 33 PCIE_TXN10_WLAN CY3 DF2 R273 @ *0_5%_4
CY4 PCIE10_TXN PCIE4_TXN/USB31_4_TXN DF1 USB30_TX_P4
33 PCIE_TXP10_WLAN PCIE10_TXP PCIE4_TXP/USB31_4_TXP
CK7 DA6
32 SATA_RXN0_HDD PCIE11_RXN/SATA0_RXN PCIE5_RXN/USB31_5_RXN PEG_RXN5 19
CK6 DA7
32 SATA_RXP0_HDD PCIE11_RXP/SATA0_RXP PCIE5_RXP/USB31_5_RXP PEG_TXN5_C PEG_RXP5 19
HDD 32 SATA_TXN0_HDD CW2 DE4 C630 0.22u/10V_2 PEG_TXN5 19
CW1 PCIE11_TXN/SATA0_TXN PCIE5_TXN/USB31_5_TXN DE3 PEG_TXP5_C C631 0.22u/10V_2
32 SATA_TXP0_HDD PCIE11_TXP/SATA0_TXP PCIE5_TXP/USB31_5_TXP PEG_TXP5 19 dGPU
32 SATA_RXN1A_ODD CJ6 CY7
PCIE12_RXN/SATA1A_RXN PCIE6_RXN/USB31_6_RXN PEG_RXN6 19
32 SATA_RXP1A_ODD CJ7 CY6
PCIE12_RXP/SATA1A_RXP PCIE6_RXP/USB31_6_RXP PEG_TXN6_C PEG_RXP6 19
ODD 32 SATA_TXN1A_ODD CW5 DD1 C625 0.22u/10V_2 PEG_TXN6 19
CW3 PCIE12_TXN/SATA1A_TXN PCIE6_TXN/USB31_6_TXN DD2 PEG_TXP6_C C628 0.22u/10V_2
32 SATA_TXP1A_ODD PCIE12_TXP/SATA1A_TXP PCIE6_TXP/USB31_6_TXP PEG_TXP6 19
CG7 DN8 USBP1-
33 PCIE_RXN13_SSD PCIE13_RXN USB2N_1 USBP1- 24
CG6 DP8 USBP1+ Combo USB3.0 Small Board UP
33 PCIE_RXP13_SSD PCIE13_RXP USB2P_1 USBP1+ 24
CT3
SATA/PCIE 33 PCIE_TXN13_SSD
CT5 PCIE13_TXN DK11 USBP2- USBP2- 24
33 PCIE_TXP13_SSD PCIE13_TXP USB2N_2 DJ11 USBP2+ USBP2+ 24 Combo USB3.0 Small Board DN
CE6 USB2P_2
33 PCIE_RXN14_SSD PCIE14_RXN USBP3-_TPC
CE7 DP13
33 PCIE_RXP14_SSD PCIE14_RXP USB2N_3 USBP3+_TPC USBP3-_TPC 29
33 PCIE_TXN14_SSD CT2 DN13 Type C
CT1 PCIE14_TXN USB2P_3 USBP3+_TPC 29
For SSD_DET 33 PCIE_TXP14_SSD PCIE14_TXP DK10 USBP4-_DB
+3V High: SSD SATA IF CC5 USB2N_4 DJ10 USBP4+_DB USBP4-_DB 35
Low: SSD PCIE IF SSD 33 PCIE_RXN15_SSD
CC6 PCIE15_RXN/SATA1B_RXN USB2P_4 USBP4+_DB 35 USB2.0 (DB)
33 PCIE_RXP15_SSD PCIE15_RXP/SATA1B_RXP USBP5-_CAM
33 PCIE_TXN15_SSD CR3 DL5 USBP5-_CAM 25
R253 *10K_5%_2 NGFF_SATA_DET CR4 PCIE15_TXN/SATA1B_TXN USB2N_5 DL3 USBP5+_CAM
33 PCIE_TXP15_SSD PCIE15_TXP/SATA1B_TXP USB2P_5 USBP5+_CAM 25 Camera
+3V CA6 DP11 USBP6-_CR
33 PCIE_RXN16_SSD PCIE16_RXN/SATA2_RXN USB2N_6 USBP6-_CR 35
CA5 DN11 USBP6+_CR
33 PCIE_RXP16_SSD
CP1 PCIE16_RXP/SATA2_RXP USB2P_6 USBP6+_CR 35 Card reader (DB)
33 PCIE_TXN16_SSD PCIE16_TXN/SATA2_TXN USBP7-_FP
CP2 DK13
33 PCIE_TXP16_SSD PCIE16_TXP/SATA2_TXP USB2N_7 USBP7+_FP USBP7-_FP 31
*10K_1%_2 R742 DEVSLP0 DJ13 USBP7+_FP 31 Finger print
*10K_5%_4 R737 DEVSLP1 SATAGP0 DW12 USB2P_7
*10K_1%_2 R258 DEVSLP2 SATAGP1 CR42 GPP_E0/SATAXPCIE0/SATAGP0 DN6 USBP8-_TS
NGFF_SATA_DET GPP_A12/SATAXPCIE1/SATAGP1 USB2N_8 USBP8+_TS USBP8-_TS 25
C 33 NGFF_SATA_DET CR43 DP6 USBP8+_TS 25 Touch Screen C
+3V_S5 GPP_A13/SATAXPCIE2/SATAGP2 USB2P_8
USB_OC0# DW14 DL2
USB_OC0# 24 USB_OC0# USB_OC3# GPP_E9/USB_OC0_N USB2N_9
R768 10K_5%_2 CT43 DL1
USB_OC3# TP32 GPP_A16/USB_OC3_N USB2P_9
R272 10K_5%_2
DEVSLP0 DU12 DP10 USBP10-_BT
32 DEVSLP0 GPP_E4/DEVSLP0 USB2N_10 USBP10+_BT USBP10-_BT 33
DEVSLP1 DU11 DN10 BT
GPP_E5/DEVSLP1 USB2P_10 USBP10+_BT 33
SATAGP0 R741 *10K_1%_2 DEVSLP2 CV48
0.1u/16V_2

33 DEVSLP2 GPP_A11/SATA_DEVSLP2 USB_ID

DL6 R286 10K_5%_2
DT38 USB_ID
SATAGP1 R250 *10K_1%_2 DW38 GPP_H12/M2_SKT2_CFG0 DL11 USB_VBUSSENSE R287 10K_5%_2
DV38 GPP_H13/M2_SKT2_CFG1 USB_VBUSSENSE
DU38 GPP_H14/M2_SKT2_CFG2 DN5 USB2_COMP R285 113_1%_2
GPP_H15/M2_SKT2_CFG3 USB2_COMP
C654

R292 100_1%_2 PCIE_RCOMPN DN1 CD3 UFS_RESET# @

PCIE_RCOMPP DN3 PCIE_RCOMPN RSVD_81 TP18

Vinafix.com
PCIE_RCOMPP
8 of 19

ICL-U 1.2G QPWA

CPU@
PCI-E Port Mapping Table USB3.0 Port Mapping Table
PCI-E Port Function CLK RQ Port Function
USB3.0 Function USB2.0 Port Mapping Table
Port5 dGPU Port0 VGA PORT-1 USB3.0 Type A
USB2.0 Function
PORT-2 USB3.0 Type A
Port6 dGPU Port1 SSD PORT-1 Cobime USB3.0 Type A
PORT-3 Type C
PORT-2 Cobime USB3.0 Type A
Port7 dGPU Port2 Un-used PORT-4 NC
PORT-3 Type C
Port8 dGPU Port3 Un-used SATAGP1:GPP_E1 - SATA#1/PCIE#8 PORT-4 USB 2.0 Small board
SATA => High < Base U> PORT-5 Camera
Port9 LAN Port4 LAN
B
PCIE => Low PORT-6 Card reader
B

Port10 WLAN Port5 WLAN PORT-7 Finger Print

PORT-8 Touch Screen
Port11 HDD
PORT-9 NC
Port12 ODD PORT-10 BT (CNVI)
Port13 PCIE SSDx4

Port14 PCIE SSDx4

Port15 PCIE SSDx4

PCIE SSDx4
Port16 /SATA SSD

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 10/14(USB/PCIE/SAT)
Date: Monday, November 04, 2019 Sheet 11 of 47
5 4 3 2 1
 5 4 3 2 1

D12
C12
B12
A12
U24I

CSI_E_CLK_N
CSI_E_CLK_P
CSI_E_DN_0
GPP_F8/EMMC_DATA0
GPP_F9/EMMC_DATA1
GPP_F10/EMMC_DATA2
DP27
DU30
DT30
DT29
12
G13 CSI_E_DP_0 GPP_F11/EMMC_DATA3 DV30
F13 CSI_E_DN_1 GPP_F12/EMMC_DATA4 DU29
+3V 2,6,9,10,11,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44

eMMC
CSI_E_DP_1 GPP_F13/EMMC_DATA5 DW30
GPP_F14/EMMC_DATA6 +1.8V_DEEP_SUS 5,10,14,33
K10 DW29
L10 CSI_F_CLK_N GPP_F15/EMMC_DATA7 DV28
L8 CSI_F_CLK_P GPP_F7/EMMC_CMD DW28
M8 CSI_F_DN_0 GPP_F16/EMMC_RCLK DN27
M11 CSI_F_DP_0 GPP_F17/EMMC_CLK DT28
L11 CSI_F_DN_1 GPP_F18/EMMC_RESET_N DU28 EMMC_RCOMP R326 200_1%_2
CSI_F_DP_1 EMMC_RCOMP
D9
C9 CSI_D_CLK_N DV45
D CSI_D_CLK_P CNV_WT_D0N CNV_WT_LANE0_DN 33
A7 DU45 CNV_WT_LANE0_DP 33
D
B7 CSI_D_DN_0 CNV_WT_D0P DU44
CSI_D_DP_0 CNV_WT_D1N CNV_WT_LANE1_DN 33
B9 DT44 CNV_WT_LANE1_DP 33
A9 CSI_D_DN_1 CNV_WT_D1P DL42
CSI_D_DP_1 CNV_WT_CLKN CNV_WT_CLK_DN 33
D7 DK42
CSI_D_DN_2/CSI_C_DN_0 CNV_WT_CLKP CNV_WT_CLK_DP 33
C7

CSI2
D8 CSI_D_DP_2/CSI_C_DP_0 DP44
CSI_D_DN_3/CSI_C_CLK_N CNV_WR_D0N CNV_WR_LANE0_DN 33
C8 DN44
CSI_D_DP_3/CSI_C_CLK_P CNV_WR_D0P CNV_WR_LANE0_DP 33
DG42 CNV_WR_LANE1_DN 33
G11 CNV_WR_D1N DG44
CSI_H_CLK_N CNV_WR_D1P CNV_WR_LANE1_DP 33
J11 DK44 CNV_WR_CLK_DN 33
F6 CSI_H_CLK_P CNV_WR_CLKN DJ44
CNV_WR_CLK_DP 33

CNVi
G6 CSI_H_DN_0 CNV_WR_CLKP
G10 CSI_H_DP_0 DT45 CNV_WT_RCOMP R724 150_1%_2
F10 CSI_H_DN_1 CNV_WT_RCOMP
G8 CSI_H_DP_1 DL29
CSI_H_DN_2/CSI_G_DN_0 GPP_F1/CNV_BRI_RSP/UART0_RXD CNV_RGI_DT_R CNV_BRI_RSP 33
J8 DP31 R307 22_1%_2
CSI_H_DP_2/CSI_G_DP_0 GPP_F2/CNV_RGI_DT/UART0_TXD CNV_BRI_DT_R CNV_RGI_DT 33
K6 DL31 R329 22_1%_2
L6 CSI_H_DN_3/CSI_G_CLK_N GPP_F0/CNV_BRI_DT/UART0_RTS_N DN29
CNV_BRI_DT
CNV_RGI_RSP
10,33
33
Strapping pin
CSI_H_DP_3/CSI_G_CLK_P GPP_F3/CNV_RGI_RSP/UART0_CTS_N
R579 100_1%_2 CSI_RCOMP B4 DJ29
CSI_RCOMP GPP_F4/CNV_RF_RESET_N DP29
DT34 GPP_F6/CNV_PA_BLANKING DL27 CLK_REQ/Strap Pin(CLG)
DP38 GPP_D4/IMGCLKOUT0 GPP_F19/A4WP_PRESENT DK29 +3V
DK36 GPP_H20/IMGCLKOUT1 GPP_F5/MODEM_CLKREQ
DL36 GPP_H21/IMGCLKOUT2 ???
DN38 GPP_H22/IMGCLKOUT3 PCIE_CLKREQ_VGA# R342 10K_5%_4
GPP_H23/IMGCLKOUT4 R302 R311
75K_1%_2 75K_1%_2 PCIE_CLKREQ_WLAN# R377 10K_5%_4

9 of 19 PCIE_CLKREQ_LAN# R414 10K_5%_4

ICL-U 1.2G QPWA PCIE_CLKREQ_SSD# R390 10K_5%_4
CPU@
CLK_PCIE_REQ2# R391 *10K_5%_4
close PCH
CLK_PCIE_REQ3# R729 *10K_5%_4

U24J

CLK_VGA_N CJ3 CF5 CLK_PCIE_WLANN

C
19 CLK_VGA_N CLK_VGA_P CLKOUT_PCIE_N0 CLKOUT_PCIE_N5 CLK_PCIE_WLANP CLK_PCIE_WLANN 33
VGA 19 CLK_VGA_P
CJ5 CF3 CLK_PCIE_WLANP 33 WLAN C
PCIE_CLKREQ_VGA# DK33 CLKOUT_PCIE_P0 CLKOUT_PCIE_P5 DP40 PCIE_CLKREQ_WLAN#
19 PCIE_CLKREQ_VGA# GPP_D5/SRCCLKREQ0_N GPP_H11/SRCCLKREQ5_N PCIE_CLKREQ_WLAN# 33
CLK_PCIE_SSDN CL2
Crystal Components with Surrounding 10 mil Wide GND Shield Trace
33 CLK_PCIE_SSDN CLK_PCIE_SSDP CLKOUT_PCIE_N1 RTC_X1 Break Out:4-10 mil Wide GND Shield Trace
33 CLK_PCIE_SSDP
CL1 DL48
PCIE_CLKREQ_SSD# DN34 CLKOUT_PCIE_P1 RTCX1 DL49 RTC_X2
SSD 33 PCIE_CLKREQ_SSD#
CL3
GPP_D6/SRCCLKREQ1_N RTCX2
DT47 RTC_RST#
RTC Clock 32.768KHz
CL5 CLKOUT_PCIE_N2 RTCRST_N DK46 SRTC_RST# R689
CLK_PCIE_REQ2# DP34 CLKOUT_PCIE_P2 SRTCRST_N 0_5%_2
TP38 GPP_D7/SRCCLKREQ2_N SUSCLK_32K RTC_X1 RTC_X1_R
DF49 SUSCLK_32K 33 C626 18p/50V_4
CK3 GPD8/SUSCLK
CLKOUT_PCIE_N3

1
CK4
CLK_PCIE_REQ3# DP36 CLKOUT_PCIE_P3 DW8 XTAL_38P4M_IN
TP94 GPP_D8/SRCCLKREQ3_N XTAL_IN XTAL_38P4M_OUT
DU8 Y3
CLK_PCIE_LANN CJ2 XTAL_OUT 32.768KHZ/20ppm
28 CLK_PCIE_LANN CLK_PCIE_LANP CLKOUT_PCIE_N4
LAN 28 CLK_PCIE_LANP
CJ1
PCIE_CLKREQ_LAN# DN40 CLKOUT_PCIE_P4 DU6 CLK_BIASREF R308

Vinafix.com
28 PCIE_CLKREQ_LAN# 60.4_1%_2
GPP_H10/SRCCLKREQ4_N XCLK_BIASREF R693

2
10M_5%_2
10 of 19
R696
ICL-U 1.2G QPWA
0_5%_2
CPU@ R692
0_5%_2
RTC_X2 RTC_X2_R
C632 18p/50V_4

2nd
Crystal 38.4MHz HHE P/N: E1FB38E0X0003E
Quanta P/N: BG638400033

R727
0_5%_2
B C658 10P/50V_4 XTAL_38P4M_IN_R XTAL_38P4M_IN B

2
1
Y4 R740
38.4MHZ/20ppm 200K_1%_2
PV
R726

4
3
0_5%_2
XTAL_38P4M_OUT_R XTAL_38P4M_OUT
C657 10P/50V_4

RTC Circuitry(RTC)
RTC Power trace width 20mils.
+3VPCU R842 1.5K_5%_4

R841 45.3K_1%_4
+3VPCU
30mils
+3V_RTC_0 +3V_RTC R854
C712 +3V_RTC_2
*0.1u/16V_2 +3V_RTC RTC_RST#
+3V_RTC_0 R855 1K/F_4 +3V_RTC_1
1

D42
BAT54CW 20K_1%_2 J1
C721 *JUMP SRTC_RST#
1u/6.3V_2
2

R853
EC reset RTC
SRTC_RST#
3

2 Q29
34 CLR_CMOS
20K_1%_2 *2N7002KTB
C722
update footprint to C720
1

bat-aaa-bat-046-k03-2p-smt and change pin defined 1u/6.3V_2 1u/6.3V_2 R496

4/17
100K_1%_4
A
(20mils) A
1
2

RTC_RST#

3 4
3

CN19 CLR_CMOS 2 Q28

50281-00201-001 2N7002KTB
Correct pin defined 9/20 Quanta Computer Inc.
1

PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 11/14(CSI/CNVi/CLK)
Date: Monday, November 04, 2019 Sheet 12 of 47
5 4 3 2 1
 5 4 3 2 1

ACZ_SDOUT

13
10 ACZ_SDOUT
U24G
CE46 Board_ID6
ACZ_BCLK CY46 GPP_G6/SD_CLK CC48 Board_ID1 Board_ID6 15,25
26 PCH_AZ_CODEC_BITCLK R687 33_5%_2
ACZ_SYNC CV49 GPP_R0/HDA_BCLK/I2S0_SCLK GPP_G1/SD_DATA0 CC49 Board_ID2 Board_ID1 15
26 PCH_AZ_CODEC_SYNC R682 33_5%_2
ACZ_SDOUT CY47 GPP_R1/HDA_SYNC/I2S0_SFRM GPP_G2/SD_DATA1 CC47 Board_ID3 Board_ID2 15
26 PCH_AZ_CODEC_SDOUT R683 33_5%_2
GPP_R2/HDA_SDO/I2S0_TXD GPP_G3/SD_DATA2 Board_ID4 Board_ID3 15
CV45 CF45
26 PCH_AZ_CODEC_SDIN0 ACZ_RST# GPP_R3/HDA_SDI0/I2S0_RXD GPP_G4/SD_DATA3 Board_ID0 Board_ID4 15,25
R684 33_5%_2 DA47 CC45
26 PCH_AZ_CODEC_RST# GPP_R4/HDA_RST_N GPP_G0/SD_CMD Board_ID7 Board_ID0 15 +3V_S5
SD3.0 CF49
GPPC_D19 GPP_G7/SD_W P Board_ID5 Board_ID7 15
@TP37 DP33 CE47
GPP_D19/I2S_MCLK GPP_G5/SD_CD_N Board_ID5 15 BATLOW# R397 8.2K_1%_2
DC45 DK38 LCD_PRIVACY_PCH @ TP29
DA49 GPP_A23/I2S1_SCLK GPP_H0/CNV_BT_I2S_SDO DG38 EXT_PWR_GATE# R654 100K_1%_2
D DA45 GPP_R5/HDA_SDI1/I2S1_SFRM GPP_H1/SD_PW R_EN_N/CNV_BT_I2S_SDO D
DA48 GPP_R6/I2S1_TXD CJ43 SD3_RCOMP R226 200_1%_2
PIRQA# CT49 GPP_R7/I2S1_RXD SD3_RCOMP C383 *15p/50V_4
31 PIRQA# CNV_RF_RESET# GPP_A7/I2S2_SCLK
33 CNV_RF_RESET# CT48
CV47 GPP_A8/I2S2_SFRM/CNV_RF_RESET_N DG36 DMIC_CLK_2_R 33_5%_2 R395
33 MODEM_CLKREQ
CT47 GPP_A10/I2S2_RXD GPP_S6/SNDW 4_CLK/DMIC_CLK0 DG34 DMIC_DAT_2_R 33_5%_2 R394
DMIC_CLK_2 35 For DSx
GPP_A9/I2S2_TXD/MODEM_CLKREQ GPP_S7/SNDW 4_DATA/DMIC_DATA0 DMIC_DAT_2 35
CY39 CV38 SNDW_RCOMP R259 200_1%_2
For DSx -->Ra
CY38 GPP_S0/SNDW 1_CLK SNDW _RCOMP Non-DSx -->Rb
GPP_S1/SNDW 1_DATA
AUDIO
DB39
DD38 GPP_S2/SNDW 2_CLK
GPP_S3/SNDW 2_DATA +3V_S5
DF38 @
DD39 GPP_S4/SNDW 3_CLK/DMIC_CLK1 AC_PRESENT_EC R330 *10K_5%_2
GPP_S5/SNDW 3_DATA/DMIC_DATA1 7 of 19

+3V_S5
ICL-U 1.2G QPWA
CPU@
U24K
PCIE_WAKE# R406 200K_1%_2

PCH_SLP_SUS# DM49 CY42

SLP_S5# SLP_SUS_N GPD3/PW RBTN_N AC_PRESENT_EC DNBSWON# 34
@ DF45 DE46 +3V
TP31 GPD10/SLP_S5_N GPD1/ACPRESENT AC_PRESENT_EC 34
SUSC# DC48 DH48 BATLOW#
16,34 SUSC# GPD5/SLP_S4_N GPD0/BATLOW _N VCCST_OVERRIDE
SUSB# DF47 R661 @ *100K_5%_2
16,34 SUSB# GPD4/SLP_S3_N EXT_PWR_GATE# VCCST_PWRGD_TCSS
C723 *0.1U/10V_2 DH47 CL39 R660 @ *100K_5%_2
CL45 GPD6/SLP_A_N GPP_B11/PMCALERT DU40 CPU_C10_GATE# R776 0_5%_2 PIRQA# R671 10K_5%_2
GPP_B12/SLP_S0_N GPP_H18/CPU_C10_GATE_N PWR_GATE# 16
C724 *0.1U/10V_2 DG40
C DE49 GPP_H3/SX_EXIT_HOLDOFF_N/CNV_BT_I2S_SDO CPU_C10_GATE# R762 100K_5%_2 C
@ XDP_RSMRST# R704 1K_5%_2 DN48 GPD9/SPL_W LAN_N DL45 PCIE_WAKE# SYS_RESET# R299 10K_5%_2
TP82 SLP_LAN_N W AKE_N PCIE_WAKE# 28,33
RSMRST# DG49 DE47
SYS_RESET# DK19 RSMRST_N GPD_2/LAN_W AKE_N DF48
PLTRST# CM49 SYS_RESET_N GPD11/LANPHYPC/DSW LDO_MON RSMRST# R709 100K_5%_2
GPP_B13/PLTRST_N CE4 VCCST_OVERRIDE
VCCST_OVERRIDE H_VCCST_PWRGD VCCST_OVERRIDE 16 AC_PRESENT_EC
CF2 R317 10K_5%_2
BU5 : usw IMVP_PWRGD PCH_DSWROK DR48 VCCST_PW RGD CE3 VCCST_PWRGD_TCSS
VCCST_PWRGD_TCSS 16
MODEM_CLKREQ R256 @ *10K_5%_2
R703 @ 0_5%_2 PCH_PWROK_R DN47 DSW _PW ROK VCCSTPW RGOOD_TCSS CF1 PROCPWRGD
16,34 PCH_PWROK
R702 *0_5%_2 SYS_PWROK DP19 PCH_PW ROK PROCPW RGD DG : PD 10k
4,39 IMVP_PWRGD SYS_PW ROK DC47

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DN49 GPD7 GPD7 10
10 INPUT3VSEL INPUT3VSEL SUSC# R291 100K_5%_2
INTRUDER# DR47 INPUT3VSEL SUSB# R339 100K_5%_2
10 INTRUDER# INTRUDER_N PCH_SLP_SUS# R701 100K_5%_2
11 of 19 ACZ_RST# R685 100K_5%_2
C642
CNV_RF_RESET# R672 *75K_1%_2
0.1U/10V_2 ICL-U 1.2G QPWA PV
CPU@
PROCPWRGD R643 @ *10K_5%_2
C726 *0.1u/10V_2
For DSX Sequence PLTRST#(CLG)
For DSX -->Ra
Non-DSX -->Rb Rb System PWR_OK(CLG)
NDSX@
8,34 RSMRST# RSMRST# R711 0_5%_2
PLTRST# SYS_PWROK R372 0_5%_2 EC_PWROK
PCH_DSWROK PLTRST# 19,28,31,33,35 EC_PWROK 34
R717 *0_5%_2
B DSX@ B
R662
@ Ra R708 100K_5%_2 R359
R716 C649 *100K_5%_2 100K_5%_2
*1M_5%_2 *0.01U/50V_4

RX288 close to CPU side

H_VCCST_PWRGD trace 0.3" - 1.5"
+VCCST +VCCST

R638 R633
+1.8V 26,29,41
1K_1%_2 DG : 62 ohm *1K_1%_2
+VCCST 4,5,16,36,39
PV R637 PV
+3V_S5 2,6,8,10,11,14,15,16,28,29,30,33,34,37,40,41
60.4_1%_2
A D33 2 H_VCCST_PWRGD_R H_VCCST_PWRGD A
16,34 HWPG +3V 2,6,9,10,11,12,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44
1 RB500V-40
+5V_S5 16,24,29,33,35,37,38,39,40,42,43,44
@
SUSB# D43 2 C601
1 *RB500V-40 *10P/50V_2
16 VCCST_PWRGD
Quanta Computer Inc.
PV PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 12/14(PM/HDA/SD3.0)
Date: Monday, November 04, 2019 Sheet 13 of 47
5 4 3 2 1
 5 4 3 2 1

+VCCIN_AUX

C240

C289

C276
*15P/25V_2

*15P/25V_2

*15P/25V_2
Vinafix.com
14
C291 *15P/25V_2

C285 *15P/25V_2

C273 *15P/25V_2 +VCCIN_AUX

D D
C283 *15P/25V_2 11500mA
U24N
C576 *15P/25V_2 202mA
C237 C311 C284 C244 C269 C275 AH1 DF23 +VCCPRIM_3P3 R710 0_5%_6
VCCIN_AUX_1 VCCPRIM_3P3_2 +3V_DEEP_SUS +1.8V_DEEP_SUS +1.8V_S5
47U/6.3V_6 47U/6.3V_6 47U/6.3V_6 47U/6.3V_6 47U/6.3V_6 47U/6.3V_6 AW 10 DG26
AY11 VCCIN_AUX_2 VCCPRIM_3P3_3 DG28 @ C633 *1U/6.3V_4
AY9 VCCIN_AUX_3 VCCPRIM_3P3_4 @ C636 *0.1U/16V_4
BA10 VCCIN_AUX_4
BB9 VCCIN_AUX_5
CH1 VCCIN_AUX_6 DF15 1300mA
VCCIN_AUX_7 VCCPRIM_1P8_2 +1.8V_DEEP_SUS
CK11 DF17 @ C339 *1U/6.3V_4 R274 0_5%_8
C299 C294 C255 C254 C245 C243 C256 C242 C288 C305 CL10 VCCIN_AUX_8 VCCPRIM_1P8_3 DF18 @ C341 *1U/6.3V_4
CM11 VCCIN_AUX_9 VCCPRIM_1P8_4 DF20
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 VCCIN_AUX_10 VCCPRIM_1P8_5
CN1 DG17
AJ1 VCCIN_AUX_11 VCCPRIM_1P8_6 DG18
CN10 VCCIN_AUX_12 VCCPRIM_1P8_7 DG20
CP11 VCCIN_AUX_13 VCCPRIM_1P8_8 DF34
CR10 VCCIN_AUX_14 VCCPRIM_1P8_9
CT11 VCCIN_AUX_15 +VCCLDOSTD_OUT_0P85 C652 2.2U/10V_4
CU10 VCCIN_AUX_16
C248 C265 C253 C602 C337 C250 C313 C264 C335 C263 CV1 VCCIN_AUX_17
10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 CV11 VCCIN_AUX_18
CW 10 VCCIN_AUX_19 DW 37 165mA VCCA_CLKLDO_1V8 R748 *Short_0402 +1.8V_DEEP_SUS
CY11 VCCIN_AUX_20 VCCLDOSTD_0P85 C651 47U/6.3V_6
DC1 VCCIN_AUX_21 DW 15
AL1 VCCIN_AUX_22 VCCA_CLKLDO_1P8
P13 VCCIN_AUX_23 DW 32 +VCCDPHY_1P24 C653 4.7U/6.3V_4
VCCIN_AUX_24 VCCDPHY_1P24 FIVR output of PCH to platform 1.05V Power Gates
R12
C308 C302 C315 T13 VCCIN_AUX_25 DD34 +VCCDSW_1P05 C338 1U/6.3V_4
(VCCST/VCCSTG)
C 10U/10V_4 10U/10V_4 10U/10V_4 U12 VCCIN_AUX_26 VCCDSW _1P05 C
DC11 VCCIN_AUX_27 BY2 R623 0_5%_6
VCCIN_AUX_28 VCC1P05_1 +VCC1.05_OUT_FET
DE12 CB2
DF12 VCCIN_AUX_29 VCC1P05_2 CC1
AM1 VCCIN_AUX_30 VCC1P05_3 Can't down size
AN1 VCCIN_AUX_31 CD1
AT11 VCCIN_AUX_32 VCCPLL_2 +VCC1.05_OUT_SFR PV
C336 C325 C331 C297 AT9 VCCIN_AUX_33 DG31
VCCIN_AUX_34 VCCPRIM_1P05_1 +VCC1.05_OUT_PCH
10U/10V_4 10U/10V_4 10U/10V_4 10U/10V_4 AU10
AV9 VCCIN_AUX_35 DG29
VCCIN_AUX_36 VCCPRIM_1P05_2
VCC_AUX_SENSE BF9 DF29

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40 VCC_AUX_SENSE VSS_AUX_SENSE BD9 VCCIN_AUX_VCCSENSE VCCPRIM_1P05_3 R770 *Short_0402 +3V_RTC From Main BAT
40 VSS_AUX_SENSE VCCIN_AUX_VSSSENSE DF31 C664 1u/10V_2
VCCPRIM_1P05_4 C665 0.1U/10V_2
+1.05V_EXT
DG33 202mA +VCCRTC @ C662 *1U/6.3V_4
R277 *100K_1%_2 DJ15 VCCRTC R268 NDSX@ 0_5%_4
VCC_V1P05EXT_1P05 500mA VCCDSW_3P3 +3V_S5
DE31 4mA
R255 *1K_5%_2 CY34 VCCDSW _3P3
VCC_VNNEXT_1P05 500mA DF26 5mA @ C342 *1U/6.3V_4
+VCCPFUSE_3P3 DC33 VCCPGPPR +3V_DEEP_SUS
Volume of power is NC, +VNN_EXT +3V_DEEP_SUS R279 0_5%_4
VCCPRIM_3P3_1 202mA CL38 VCCAUX_VID0_R R270 0_5%_2
No connect power DD35 GPP_B0/CORE_VID0 CJ38 VCCAUX_VID1_R R271 0_5%_2
VCCAUX_VID0 16,40
+1.8V_DEEP_SUS VCCPRIM_1P8_1 1300mA GPP_B1/CORE_VID1 VCCAUX_VID1 16,40
CN38 VRALERT#
R283 0_5%_4 VCCSPI DB34 GPP_B2/VRALERT_N
+3V_DEEP_SUS VCCSPI 14 of 19
3mA

ICL-U 1.2G QPWA

CPU@
B B

+3V_S5 +3V_DEEP_SUS
+VCCIN_AUX 40

for DS3 +VCC1.05_OUT_FET

+VCC1.05_OUT_SFR
10,16
5
R719 0_5%_6
+1.8V_DEEP_SUS
Can't down size +1.8V_DEEP_SUS 5,10,33
VCCAUX_VID0_R +3VPCU 8,12,16,25,26,28,30,31,34,35,36,37
R714 C655 R266 @ *100K_5%_2
*100K_2 1u/6.3V_2 VCCAUX_VID1_R R269 @ *100K_5%_2
U31 +3V_S5 2,6,8,10,11,13,15,16,28,29,30,33,34,37,40,41

4 1
VIN#1 VOUT
5 2
VIN#2 GND
3 C640
16,34,38,40 SUSON EN
0.1U/10V_2

C639 *APL3512ABI-TRG
*10P/50V_2
+3V_DEEP_SUS

A A
R241
*100K_5%_2

D23
VRALERT# 2
H_PROCHOT# 4,34,36,39
1
*RB500V-40 Quanta Computer Inc.
R571 @ *0_5%_2 PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 13/14(PCH POWER)
Date: Monday, November 04, 2019 Sheet 14 of 47
5 4 3 2 1
 5 4 3 2 1

D 2
2
RAM_ID0
RAM_ID1
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44
+3V_S5 2,6,8,10,11,13,14,16,28,29,30,33,34,37,40,41

RAM_ID0
RAM_ID1
15 D
RAM_ID2
2
2
RAM_ID2
RAM_ID3
RAM_ID3 Board ID
13,15,25 Board_ID4 +3V_S5
Board_ID6
13,15,25 Board_ID6
Board_ID1 R640 10K_5%_4 Board_ID0 R639 *10K_5%_4
13 Board_ID1
Board_ID2 R632 HDMI_N@10K_5%_4 Board_ID1 R631 HDMI_R@10K_5%_4
13 Board_ID2
Board_ID3 R635 GS_N@10K_5%_4 Board_ID2 R634 GS@10K_5%_4
13 Board_ID3
Board_ID4 R630 TPM_N@10K_5%_4 Board_ID3 R629 TPM@10K_5%_4
13,15,25 Board_ID4
Board_ID0 R651 *10K_5%_4 Board_ID4 R650 10K_5%_4
13 Board_ID0
Board_ID7 R645 TPC_N@10K_5%_4 Board_ID5 R644 TPC@10K_5%_4
13 Board_ID7
Board_ID5 R648 *10K_5%_4 Board_ID6 R647 DMIC@10K_5%_4
13 Board_ID5
R653 10K_5%_4 Board_ID7 R652 *10K_5%_4

+3V_S5 13,15,25 Board_ID6

RAM ID Low High
R730 SP@10K_5%_4 RAM_ID0 R763 SP@10K_5%_4
R385 SP@10K_5%_4 RAM_ID1 R392 SP@10K_5%_4
R732 SP@10K_5%_4 RAM_ID2 R731 SP@10K_5%_4
BOARD_ID0 Non eMMC eMMC
R376 SP@10K_5%_4 RAM_ID3 R389 SP@10K_5%_4
BOARD_ID1 HDMI_N@ HDMI_R@
C C

ID3 ID2 ID1 ID0 Vendor Vendor PN Quanta PN BOARD_ID2 Non G-sensor(GS_N@) G-sensor(GS@)
0 0 0 0 Hynix 8Gb H5AN8G6NCJR-VKC AKD5QGSTW13
BOARD_ID3 Non TPM(TPM_N@) TPM(TPM@)
0 0 0 1 Micron 8Gb MT40A512M16LY-075:E AKD5LZSTL24
Touch panel
0 0 1 0 Micron 8Gb MT40A512M16TB-062E:J AKD5QGSTL23 BOARD_ID4 Non Touch panel (Control by Cable)

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0 0 1 1 Samsung 8Gb K4A8G165WC-BCTD AKD5QGST512
BOARD_ID5 Non Type-C(TPC_N@) Type-C(TPC@)
1 1 1 1 With out on board memory
BOARD_ID6 Single MIC(Cable control) Dual MIC (DMIC@)

BOARD_ID7 Reserved (Default) Reserve

B B

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
ICL-U 14/14 (Board ID)
Date: Monday, November 04, 2019 Sheet 15 of 47
5 4 3 2 1
 5 4 3 2 1

Volume Segment
ICL U42

+5V_S5
C10: turn off VCCPLL_OC , VCCIO , VCCSTG
16
+VCC1.05_OUT_FET +5V_S5
Volume Segment
+1.2VSUS
C597
VCCST: 0.65A
0.1u/6.3V_2 <= 65us full load ready
U25 C583 C448
M74VHC1GT08DFT2G 0.1u/6.3V_2 *0.1u/6.3V_2

3
R625 13,16,34 SUSC# R467 *0_5%_2 C361
D VCCST_EN D
1 866_1%_2 *0.1u/6.3V_2

3
4 2 R352
2 1 *866_1%_4
Q37 4 VCCPLL_OC_EN_2 VCCPLL_OC_EN_1 2
17SZ_EN2
<= 240us, full load ready
DMG3414U-7 R473 0_5%_2 2
13 PWR_GATE#

1
Q14
R627 C578 +VCCST_S2 +VCCSTG U18 *DMG3414U-7
TDC:0.26A

1
*0_5%_2 0.1u/16V_4 R619 +VCCST *M74VHC1GT08DFT2G C380
*Short_0603 C463 *0.1u/16V_4 +1.2V_VCCPLL_OC_S2
*0.1u/16V_4 L8 +1.2V_VCCPLL_OC
R457 *Short_0603
+5V_S5 R616 *Short_0201
C580 C587 *0_5%_6 +5V_S5
+3VPCU 0.1u/6.3V_2 *10u/6.3V_4
+3VPCU C369 C376
R621 +VCCST *0.1u/6.3V_2 *10u/6.3V_4
*10K_1%_4 R454 R456
R628 *10K_1%_4 *0_5%_2
*100K_2 R474
+5V_S5 R620 *100K_2 +1.2V_VCCPLL_OC
*47_5%_8
6

6
fine tune <65usec VCCSTPLL_DIS2 +5V_S5
2 R624 fine tune <65usec R332
*1M_5%_4 2 *22_5%_8
3

3
Q39B Q38A
1

5 *2N7002KDW VCCSTPLL_DIS1 5 *2N7002KDW Q24B R387 VCCPLL_OC_DIS2

1
5 *2N7002KDW *1M_5%_4

3
Q39A
*2N7002KDW R618 Q24A Q17A
4

4
2 *2M_1%_4 *2N7002KDW VCCPLL_OC_DIS1 5 *2N7002KDW

6
Q38B
*2N7002KDW R386

4
2 *2M_1%_4

C Q17B C
*2N7002KDW

1
+VCC1.05_OUT_FET
D6 2 1
VCCST_CPU GENERATION 13,16,34 SUSC#

*RB500V-40

+3V_S5 +3V_S5 C582

3
VCCST_OR_TCSS D7 2 1 R614 Q36 0.1u/6.3V_2
866_1%_2 DMG3414U-7
+3V_S5 VCCPLL_OC_EN_2 VCCSTG_EN22
R688 R667 *RB500V-40

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*100K_2 *100K_2 C347 *0.1u/16V_4
PD3 R674
VCCSTG: 0.15A

1
5

VCCAUX_VID0 2 *0_5%_2 C586 +VCCSTG

2 3 0.1u/16V_4
VCCAUX_VID1 +1V_S5_ON 34,40
4 1
3

1
U9 BAT54CW
R669 0_5%_2 VCCST_OR_TCSS 5 2 *74AUP1G32SE-7 C590 C585
13 VCCST_OVERRIDE
3

Q40B +3V_S5 0.1u/6.3V_2 *10u/6.3V_4

13 VCCST_PWRGD_TCSS R668 0_5%_2 Q40A *2N7002KDW
*2N7002KDW C634 *0.1u/16V_4
4

R670 R297 *0_5%_2 +5V_S5 +VCCSTG

5
100K_2 R676
2 *0_5%_2
SUSON R265 *0_5%_2 +3V_S5 4 VCCST_EN SUSON
14,34,38,40 SUSON
1 R680 *0_5%_2 R613 R611
34,37,38,40,41 MAINON R288 *0_5%_2 C362 *0.1u/16V_4 U29 *1M_5%_4 *22_5%_8
*74AUP1G32SE-7
3
5

R681
2 *100K_2 DIS_VCCSTG2
14,40 VCCAUX_VID0

3
4
14,40 VCCAUX_VID1 1 R675 *0_5%_2 Q35A
B DIS_VCCSTG1 5 B
U10 *2N7002KDW
*74AUP1G32SE-7
3

6
R612

4
VCCSTG_EN2 2 *2M_1%_4

Q35B
*2N7002KDW

1
B2A
S0->S5 & S0->S3
Power of sequence 1us
SUSB# -> VCCST_PWRGD
VCCST PWRGD CRB is via +1.05V PG +3V_S5

U26
+3V_S5 C603 0.1u/16V_4

5 VCC NC 1 U27
5

MC74VHC1G08DFT2G
C606 1 SUSB# SUSB# 13,34
0.1u/16V_4 A 2 VCCST_PWRGD_EN_L 4
2VCCST_PWRGD_EN

VCCST_PWRGD 4 Y GND 3
13 VCCST_PWRGD
3

C607 C600
*1000p/50V_4 *1000p/50V_4
C605
74AUP1G07GW
*1000p/50V_4 R642
Shortpad change
A A
to 60.4 ohm. 11/6
Stuff 1000P/50V *0_5%_4
Reserve 1000P/50V

PCH_PWROK R641 *0_5%_4

13,34 PCH_PWROK
13,34 HWPG HWPG R636 *short_4

Rev:D change to shortpad

PROJECT : G7AL
Quanta Computer Inc.
Size Document Number Rev
C 1A
+1.0V/+VCCSTPLL
BU5 Date: Monday, November 04, 2019 Sheet 16 of 47
5 4 3 2 1
 5 4 3 2 1

3 M_A_A[13:0] M_A_A0
M_A_A1
M_A_A2
M_A_A3
144
133
132
131
JDIM1A

A0
A1
A2
DQ0
DQ1
DQ2
8
7
20
21
M_A_DQ11
M_A_DQ15
M_A_DQ12
M_A_DQ10
M_A_DQ[63:0] 3

2.48A
+1.2VSUS

111
112
117
JDIM1B

VDD1
VDD2
+VDDQ_VTT

+2.5V_SUS
18,38

18,38 17
M_A_A4 128 A3 DQ3 4 M_A_DQ13 118 VDD3 255
M_A_A5 126 A4 DQ4 3 M_A_DQ14 123 VDD4 VDDSPD +3V
M_A_A6 127 A5 DQ5 16 M_A_DQ9 124 VDD5
M_A_A7 122 A6 DQ6 17 M_A_DQ8 129 VDD6 257
M_A_A8 A7 DQ7 M_A_DQ27 VDD7 VPP1 +2.5V_SUS
125 28 130 259
M_A_A9 121 A8 DQ8 29 M_A_DQ31 135 VDD8 VPP2
D M_A_A10 146 A9 DQ9 41 M_A_DQ26 136 VDD9 D
M_A_A11 120 A10/AP DQ10 42 M_A_DQ25 141 VDD10 258
M_A_A12 119 A11 DQ11 24 M_A_DQ29 142 VDD11 VTT +VDDQ_VTT
M_A_A13 158 A12 DQ12 25 M_A_DQ30 147 VDD12
151 A13 DQ13 38 M_A_DQ28 148 VDD13
3 M_A_WE# A14/W E# DQ14 M_A_DQ24 VDD14 +SMDDR_VREF_DIMM
156 37 153 164
3 M_A_CAS# A15/CAS# DQ15 M_A_DQ4 VDD15 VREFCA
152 50 154
3 M_A_RAS# A16/RAS# DQ16 M_A_DQ2 VDD16
49 159
162 DQ17 62 M_A_DQ7 160 VDD17
165 CS2#/C0/NC DQ18 63 M_A_DQ5 163 VDD18
CS3#/C1/NC DQ19 46 M_A_DQ0 VDD19
DQ20 45 M_A_DQ1
114 DQ21 58 M_A_DQ6 1 2

DDR4 SODIMM 260 PIN

3 M_A_ACT# ACT# DQ22 M_A_DQ3 VSS1 VSS48
R615 240_1%_2 143 59 5 6
+1.2VSUS 3 M_A_PARITY PARITY DQ23 M_A_DQ17 VSS2 VSS49
116 70 9 10
3 M_A_ALERT# PM_EXTTS#0 134 ALERT# DQ24 71 M_A_DQ18 15 VSS3 VSS50 14
108 EVENT# DQ25 83 M_A_DQ23 19 VSS4 VSS51 18
3,18 DDR4_DRAMRST# RESET# DQ26 M_A_DQ19 VSS5 VSS52
C293 *0.1u/6.3V_2 84 23 22
DQ27 66 M_A_DQ20 27 VSS6 VSS53 26

DDR4 SODIMM 260 PIN

DQ28 67 M_A_DQ16 31 VSS7 VSS54 30
DQ29 79 M_A_DQ22 35 VSS8 VSS55 36
DQ30 80 M_A_DQ21 39 VSS9 VSS56 40
DQ31 174 M_A_DQ35 43 VSS10 VSS57 44
DQ32 173 M_A_DQ39 47 VSS11 VSS58 48
DQ33 187 M_A_DQ32 51 VSS12 VSS59 52
DQ34 186 M_A_DQ33 57 VSS13 VSS60 56
DQ35 170 M_A_DQ37 61 VSS14 VSS61 60
DQ36 169 M_A_DQ38 65 VSS15 VSS62 64
DQ37 183 M_A_DQ36 69 VSS16 VSS63 68

(260P)
DQ38 182 M_A_DQ34 73 VSS17 VSS64 72
C DQ39 195 M_A_DQ49 77 VSS18 VSS65 78 C
150 DQ40 194 M_A_DQ52 81 VSS19 VSS66 82
3 M_A_BS#0 BA0 DQ41 M_A_DQ51 VSS20 VSS67
145 207 85 86
3 M_A_BS#1 BA1 DQ42 VSS21 VSS68
115 208 M_A_DQ50 89 90
3 M_A_BG#0 BG0 DQ43 M_A_DQ53 VSS22 VSS69

(260P)
113 191 93 94
+3V 3 M_A_BG#1 BG1 DQ44 M_A_DQ48 VSS23 VSS70
190 99 98
149 DQ45 203 M_A_DQ55 103 VSS24 VSS71 102
3 M_A_CS#0 CS0# DQ46 M_A_DQ54 VSS25 VSS72
157 204 107 106
3 M_A_CS#1 CS1# DQ47 M_A_DQ46 VSS26 VSS73
109 216 167 168
3 M_A_CKE0 CKE0 DQ48 M_A_DQ45 VSS27 VSS74
110 215 171 172
3 M_A_CKE1 CKE1 DQ49 M_A_DQ41 VSS28 VSS75
228 175 176
R57 R63 R605 137 DQ50 229 M_A_DQ42 181 VSS29 VSS76 180

Vinafix.com
3 M_A_CLKP0 CK0 DQ51 M_A_DQ43 VSS30 VSS77
*0_5%_4 *0_5%_4 *0_5%_4 139 211 185 184
3 M_A_CLKN0 CK0# DQ52 VSS31 VSS78
138 212 M_A_DQ47 189 188
3 M_A_CLKP1 CK1 DQ53 M_A_DQ44 VSS32 VSS79
140 224 193 192
CHA_SA0 CHA_SA1 CHA_SA2 3 M_A_CLKN1 CK1# DQ54 M_A_DQ40 VSS33 VSS80
225 197 196
155 DQ55 237 M_A_DQ63 201 VSS34 VSS81 202
3 M_A_DIM0_ODT0 ODT0 DQ56 M_A_DQ57 +1.2VSUS +1.2VSUS VSS35 VSS82
161 236 205 206
3 M_A_DIM0_ODT1 ODT1 DQ57 VSS36 VSS83
R58 R62 R609 249 M_A_DQ62 209 210
*Short_0402 *Short_0402 *Short_0402 253 DQ58 250 M_A_DQ60 213 VSS37 VSS84 214
9,30,31 SMB_RUN_CLK 254 SCL DQ59 232 M_A_DQ59 217 VSS38 VSS85 218
9,30,31 SMB_RUN_DAT SDA DQ60 M_A_DQ56 VSS39 VSS86
233 223 222
CHA_SA0 256 DQ61 245 M_A_DQ58 R205 R208 227 VSS40 VSS87 226
CHA_SA1 260 SA0 DQ62 246 M_A_DQ61 231 VSS41 VSS88 230
SA1 DQ63 240_1%_2 240_1%_2 VSS42 VSS89
+1.2VSUS CHA_SA2 166 235 234
SA2 EZIW 13 M_A_DQSP1 M_A_DQSP[7:0] 3 239 VSS43 VSS90 238
Follow reference board R213 240_1%_2M_A_CB0 92 DQS0 34 M_A_DQSP3 243 VSS44 VSS91 244
CB0/NC DQS1 VSS45 VSS92
DIMM0 SA0,1,2=LLL R212
R203
240_1%_2M_A_CB1
240_1%_2M_A_CB2
91
101 CB1/NC DQS2
55
76
M_A_DQSP0
M_A_DQSP2 M_A_DQSP8
247
251 VSS46 VSS93
248
252
M_A_DQSN8
R201 240_1%_2M_A_CB3 105 CB2/NC DQS3 179 M_A_DQSP4 VSS47 VSS94
B R220 240_1%_2M_A_CB4 88 CB3/NC DQS4 200 M_A_DQSP6 B
R216 240_1%_2M_A_CB5 87 CB4/NC DQS5 221 M_A_DQSP5
R207 240_1%_2M_A_CB6 100 CB5/NC DQS6 242 M_A_DQSP7 Place these Caps near So-Dimm0. 263
263
261
240_1%_2M_A_CB7 104 CB6/NC DQS7 97 M_A_DQSP8 264 GND#1 262
R206
CB7/NC DQS8 1uF/10uF 4pcs on each side of connector GND#2
M_A_DQSN[7:0] 3 264
12 11 M_A_DQSN1
+1.2VSUS 33 DM0_n/DBI0_n DQS#0 32 M_A_DQSN3
54 DM1_n/DBI1_n DQS#1 53 M_A_DQSN0 +1.2VSUS +VDDQ_VTT
75 DM2_n/DBI2_n DQS#2 74 M_A_DQSN2
178 DM3_n/DBI3_n DQS#3 177 M_A_DQSN4 C246 1u/6.3V_4 C154 1u/6.3V_4 2,6,9,10,11,12,13,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44 +3V
199 DM4_n/DBI4_n DQS#4 198 M_A_DQSN6 3,5,16,18,38,44 +1.2VSUS
220 DM5_n/DBI5_n DQS#5 219 M_A_DQSN5 C324 1u/6.3V_4 C150 1u/6.3V_4
241 DM6_n/DBI6_n DQS#6 240 M_A_DQSN7
96 DM7_n/DBI7_n DQS#7 95 M_A_DQSN8 C178 1u/6.3V_4 C155 1u/6.3V_4 VREF DQ0 M1 Solution
DBI8# DQS#8
C238 1u/6.3V_4 C142 1u/6.3V_4 +1.2VSUS
D4AS0-26010-1P40
C348 1u/6.3V_4 C152 10u/6.3V_4 D4AS0-26010-1P40

C577 1u/6.3V_4 C156 10u/6.3V_4

R149
C579 1u/6.3V_4 +SMDDR_VREF_DIMM 1K_1%_4

C594 1u/6.3V_4 C208 0.1u/6.3V_2 R159 2_1%_6 +SMDDR_VREF_DIMM

3 SM_VREF
C209 2.2U/10V_4
C235 10u/6.3V_4
+1.2VSUS +2.5V_SUS C211 R158
C171 10u/6.3V_4 0.022u/25V_4 1K_1%_4
EC1 180p/25V_2 C141 1u/6.3V_4
A C213 10u/6.3V_4 R154 24.9_1%_4 A
EC2 180p/25V_2 C164 1u/6.3V_4
C574 10u/6.3V_4
C140 10u/6.3V_4
C581 10u/6.3V_4
C161 10u/6.3V_4
C204 10u/6.3V_4
+3V Quanta Computer Inc.
C573 10u/6.3V_4
C159 0.1u/6.3V_2
C224 10u/6.3V_4 PROJECT : ZAUI
C153 2.2u/10V_4 Size Document Number Rev
3A
DDR4 DIMM0-STD(4.0H)
Date: Monday, November 04, 2019 Sheet 17 of 47
5 4 3 2 1
 5 4 3 2 1

+SMDDR_VREF_DQ1_M1
DB1 change
M1
U2
BYTE7_56-63
BYTE6_48-55
G2 M_B_DQ58
M_B_DQ58 3
DB1 change
+SMDDR_VREF_DQ1_M1 M1
U4
BYTE4_32-39
BYTE5_40-47
G2 M_B_DQ38
M_B_DQ38 3 +2.5V_SUS
DB1 change
+SMDDR_VREF_DQ1_M1 M1
U6
BYTE3_24-31
BYTE2_16-23
G2 M_B_DQ24
M_B_DQ24 3
DB1 change
+SMDDR_VREF_DQ1_M1 M1
U8
BYTE0_0-7
BYTE1_8-15
G2 M_B_DQ5
M_B_DQ5
18
3
B1 VREFCA DQL0 F7 M_B_DQ63 B1 VREFCA DQL0 F7 M_B_DQ32 B1 VREFCA DQL0 F7 M_B_DQ28 B1 VREFCA DQL0 F7 M_B_DQ0
+2.5V_SUS VPP#B1 DQL1 M_B_DQ60 M_B_DQ63 3 +2.5V_SUS VPP#B1 DQL1 M_B_DQ35 M_B_DQ32 3 VPP#B1 DQL1 M_B_DQ30 M_B_DQ28 3 +2.5V_SUS VPP#B1 DQL1 M_B_DQ7 M_B_DQ0 3
R9 H3 R9 H3 R9 H3 R9 H3
VPP#R9 DQL2 M_B_DQ62 M_B_DQ60 3 VPP#R9 DQL2 M_B_DQ33 M_B_DQ35 3 VPP#R9 DQL2 M_B_DQ27 M_B_DQ30 3 VPP#R9 DQL2 M_B_DQ2 M_B_DQ7 3
H7 H7 H7 H7
DQL3 M_B_DQ57 M_B_DQ62 3 DQL3 M_B_DQ37 M_B_DQ33 3 DQL3 M_B_DQ25 M_B_DQ27 3 DQL3 M_B_DQ6 M_B_DQ2 3
C147 H2 C192 H2 C309 H2 C360 H2
DQL4 M_B_DQ61 M_B_DQ57 3 DQL4 M_B_DQ36 M_B_DQ37 3 DQL4 M_B_DQ26 M_B_DQ25 3 DQL4 M_B_DQ4 M_B_DQ6 3
H8 H8 H8 H8
3 M_B_A[13:0] M_B_A0 DQL5 M_B_DQ56 M_B_DQ61 3 M_B_A0 DQL5 M_B_DQ39 M_B_DQ36 3 M_B_A0 DQL5 M_B_DQ29 M_B_DQ26 3 M_B_A0 DQL5 M_B_DQ3 M_B_DQ4 3
68p/50V_4 P3 J3 68p/50V_4 P3 J3 68p/50V_4 P3 J3 68p/50V_4 P3 J3
M_B_A1 A0 DQL6 M_B_DQ59 M_B_DQ56 3 M_B_A1 A0 DQL6 M_B_DQ34 M_B_DQ39 3 M_B_A1 A0 DQL6 M_B_DQ31 M_B_DQ29 3 M_B_A1 A0 DQL6 M_B_DQ1 M_B_DQ3 3
P7 J7 P7 J7 P7 J7 P7 J7
M_B_A2 A1 DQL7 M_B_DQ59 3 M_B_A2 A1 DQL7 M_B_DQ34 3 M_B_A2 A1 DQL7 M_B_DQ31 3 M_B_A2 A1 DQL7 M_B_DQ1 3
R3 R3 R3 R3
M_B_A3 N7 A2 SI1, 0427 RF M_B_A3 N7 A2 M_B_A3 N7 A2 SI1, 0427 RF M_B_A3 N7 A2
SI1, 0427 RF M_B_A4 N3 A3 A3 M_B_DQ55
M_B_DQ55 3
M_B_A4 N3 A3 A3 M_B_DQ42
M_B_DQ42
SI1,3 0427 RF M_B_A4 N3 A3 A3 M_B_DQ21
M_B_DQ21 3
M_B_A4 N3 A3 A3 M_B_DQ13
M_B_DQ13 3
D M_B_A5 P8 A4 DQU0 B8 M_B_DQ50 M_B_A5 P8 A4 DQU0 B8 M_B_DQ45 M_B_A5 P8 A4 DQU0 B8 M_B_DQ20 M_B_A5 P8 A4 DQU0 B8 M_B_DQ11 D
M_B_A6 A5 DQU1 M_B_DQ51 M_B_DQ50 3 M_B_A6 A5 DQU1 M_B_DQ43 M_B_DQ45 3 M_B_A6 A5 DQU1 M_B_DQ16 M_B_DQ20 3 M_B_A6 A5 DQU1 M_B_DQ10 M_B_DQ11 3
P2 C3 P2 C3 P2 C3 P2 C3
M_B_A7 A6 DQU2 M_B_DQ48 M_B_DQ51 3 M_B_A7 A6 DQU2 M_B_DQ46 M_B_DQ43 3 M_B_A7 A6 DQU2 M_B_DQ22 M_B_DQ16 3 M_B_A7 A6 DQU2 M_B_DQ12 M_B_DQ10 3
R8 C7 R8 C7 R8 C7 R8 C7
M_B_A8 A7 DQU3 M_B_DQ54 M_B_DQ48 3 M_B_A8 A7 DQU3 M_B_DQ40 M_B_DQ46 3 M_B_A8 A7 DQU3 M_B_DQ17 M_B_DQ22 3 M_B_A8 A7 DQU3 M_B_DQ8 M_B_DQ12 3
R2 C2 R2 C2 R2 C2 R2 C2
M_B_A9 A8 DQU4 M_B_DQ52 M_B_DQ54 3 M_B_A9 A8 DQU4 M_B_DQ47 M_B_DQ40 3 M_B_A9 A8 DQU4 M_B_DQ19 M_B_DQ17 3 M_B_A9 A8 DQU4 M_B_DQ9 M_B_DQ8 3
R7 C8 R7 C8 R7 C8 R7 C8
M_B_A10 A9 DQU5 M_B_DQ49 M_B_DQ52 3 M_B_A10 A9 DQU5 M_B_DQ41 M_B_DQ47 3 M_B_A10 A9 DQU5 M_B_DQ23 M_B_DQ19 3 M_B_A10 A9 DQU5 M_B_DQ15 M_B_DQ9 3
M3 D3 M3 D3 M3 D3 M3 D3
M_B_A11 A10/AP DQU6 M_B_DQ53 M_B_DQ49 3 M_B_A11 A10/AP DQU6 M_B_DQ44 M_B_DQ41 3 M_B_A11 A10/AP DQU6 M_B_DQ18 M_B_DQ23 3 M_B_A11 A10/AP DQU6 M_B_DQ14 M_B_DQ15 3
T2 D7 T2 D7 T2 D7 T2 D7
M_B_A12 A11 DQU7 M_B_DQ53 3 M_B_A12 A11 DQU7 M_B_DQ44 3 M_B_A12 A11 DQU7 M_B_DQ18 3 M_B_A12 A11 DQU7 M_B_DQ14 3
M7 M7 M7 M7
M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS
L2 A13 M_B_WE# L2 A13 M_B_WE# L2 A13 M_B_WE# L2 A13
3 M_B_WE# WE_n/A14 M_B_CAS# WE_n/A14 M_B_CAS# WE_n/A14 M_B_CAS# WE_n/A14
M8 B3 M8 B3 M8 B3 M8 B3
3 M_B_CAS# CAS_n/A15 VDD#B3 M_B_RAS# CAS_n/A15 VDD#B3 M_B_RAS# CAS_n/A15 VDD#B3 M_B_RAS# CAS_n/A15 VDD#B3
L8 B9 L8 B9 L8 B9 L8 B9
3 M_B_RAS# RAS_n/A16 VDD#B9 RAS_n/A16 VDD#B9 RAS_n/A16 VDD#B9 RAS_n/A16 VDD#B9
D1 D1 D1 D1
VDD#D1 G7 VDD#D1 G7 VDD#D1 G7 VDD#D1 G7
VDD#G7 J1 VDD#G7 J1 VDD#G7 J1 VDD#G7 J1
N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9
3 M_B_BS#0 BA0 VDD#J9 M_B_BS#1 BA0 VDD#J9 M_B_BS#1 BA0 VDD#J9 M_B_BS#1 BA0 VDD#J9
N8 L1 N8 L1 N8 L1 N8 L1
3 M_B_BS#1 BA1 VDD#L1 M_B_BG#0 BA1 VDD#L1 M_B_BG#0 BA1 VDD#L1 M_B_BG#0 BA1 VDD#L1
M2 L9 M2 L9 M2 L9 M2 L9
3 M_B_BG#0 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9
R1 R1 R1 R1
VDD#R1 T9 VDD#R1 T9 VDD#R1 T9 VDD#R1 T9
VDD#T9 VDD#T9 VDD#T9 VDD#T9
K7 A1 M_B_CLKP0 K7 A1 M_B_CLKP0 K7 A1 M_B_CLKP0 K7 A1
3 M_B_CLKP0 M_B_CLKN0 CK_t VDDQ#A1 M_B_CLKN0 CK_t VDDQ#A1 M_B_CLKN0 CK_t VDDQ#A1 M_B_CLKN0 CK_t VDDQ#A1
K8 A9 K8 A9 K8 A9 K8 A9
3 M_B_CLKN0 CK_c VDDQ#A9 M_B_CKE0 CK_c VDDQ#A9 M_B_CKE0 CK_c VDDQ#A9 M_B_CKE0 CK_c VDDQ#A9
K2 C1 K2 C1 K2 C1 K2 C1
3 M_B_CKE0 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1
D9 D9 D9 D9
VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2
K3 VDDQ#F2 F8 M_B_DIM0_ODT0 K3 VDDQ#F2 F8 M_B_DIM0_ODT0 K3 VDDQ#F2 F8 M_B_DIM0_ODT0 K3 VDDQ#F2 F8
3 M_B_DIM0_ODT0 ODT VDDQ#F8 M_B_CS#0 ODT VDDQ#F8 M_B_CS#0 ODT VDDQ#F8 M_B_CS#0 ODT VDDQ#F8
L7 G1 L7 G1 L7 G1 L7 G1
3 M_B_CS#0 CS VDDQ#G1 CS VDDQ#G1 CS VDDQ#G1 CS VDDQ#G1
G9 G9 G9 G9
M_B_DQSP7 G3 VDDQ#G9 J2 M_B_DQSP4 G3 VDDQ#G9 J2 M_B_DQSP3 G3 VDDQ#G9 J2 M_B_DQSP0 G3 VDDQ#G9 J2
3 M_B_DQSP7 M_B_DQSP6 DQSL_t VDDQ#J2 3 M_B_DQSP4 M_B_DQSP5 DQSL_t VDDQ#J2 3 M_B_DQSP3 M_B_DQSP2 DQSL_t VDDQ#J2 3 M_B_DQSP0 M_B_DQSP1 DQSL_t VDDQ#J2
B7 J8 B7 J8 B7 J8 B7 J8
3 M_B_DQSP6 DQSU_t VDDQ#J8 3 M_B_DQSP5 DQSU_t VDDQ#J8 3 M_B_DQSP2 DQSU_t VDDQ#J8 3 M_B_DQSP1 DQSU_t VDDQ#J8
M_B_DQSN7 F3 B2
DB1 Option for 16Gbx16 die M_B_DQSN4 F3 B2
DB1 Option for 16Gbx16 die M_B_DQSN3 F3 B2
DB1 Option for 16Gbx16 die M_B_DQSN0 F3 B2 DB1 Option for 16Gbx16 die
3 M_B_DQSN7 M_B_DQSN6 DQSL_c VSS#B2 3 M_B_DQSN4 M_B_DQSN5 DQSL_c VSS#B2 3 M_B_DQSN3 M_B_DQSN2 DQSL_c VSS#B2 3 M_B_DQSN0 M_B_DQSN1 DQSL_c VSS#B2
A7 E1 A7 E1 A7 E1 A7 E1
3 M_B_DQSN6 DQSU_c VSS#E1 3 M_B_DQSN5 DQSU_c VSS#E1 3 M_B_DQSN2 DQSU_c VSS#E1 3 M_B_DQSN1 DQSU_c VSS#E1
E9 R114 0_5%_4 E9 R190 0_5%_4 E9 R229 0_5%_4 E9 R295 0_5%_4
VSS#E9 G8 VSS#E9 G8 VSS#E9 G8 VSS#E9 G8
VSS#G8 K1 VSS#G8 K1 VSS#G8 K1 VSS#G8 K1
C
VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 C
E7 VSS#K9 M9 M_B_BG#1_R R267 *0_5%_4 E7 VSS#K9 M9 M_B_BG#1_R E7 VSS#K9 M9 M_B_BG#1_R E7 VSS#K9 M9 M_B_BG#1_R
DML_n/DBIL_n VSS#M9 M_B_BG#1 3 DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9
E2 N1 E2 N1 E2 N1 E2 N1
+1.2VSUS DMU_n/DBIU_n VSS#N1 +1.2VSUS DMU_n/DBIU_n VSS#N1 +1.2VSUS DMU_n/DBIU_n VSS#N1 +1.2VSUS DMU_n/DBIU_n VSS#N1
T1 T1 T1 T1
VSS#T1 SI1C, 0615 VSS#T1 SI1C, 0615 VSS#T1 SI1C, 0615 VSS#T1 SI1C, 0615
DDR4_DRAMRST# P1 A2 DDR4_DRAMRST# P1 A2 DDR4_DRAMRST# P1 A2 DDR4_DRAMRST# P1 A2
3,17 DDR4_DRAMRST# RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2
R113 240_1%_2 M_B1_ZQ0 F9 A8 R189 240_1%_2 M_B2_ZQ0 F9 A8 R228 240_1%_2 M_B3_ZQ0 F9 A8 R294 240_1%_2 M_B4_ZQ0 F9 A8
N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9
TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2
VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8
M_B_ALERT# P9 VSSQ#D8 E3 M_B_ALERT# P9 VSSQ#D8 E3 M_B_ALERT# P9 VSSQ#D8 E3 M_B_ALERT# P9 VSSQ#D8 E3
3 M_B_ALERT# M_B_ACT# ALERT_n VSSQ#E3 M_B_ACT# ALERT_n VSSQ#E3 M_B_ACT# ALERT_n VSSQ#E3 M_B_ACT# ALERT_n VSSQ#E3
L3 E8 L3 E8 L3 E8 L3 E8
3 M_B_ACT# M_B_PARITY ACT_n VSSQ#E8 M_B_PARITY ACT_n VSSQ#E8 M_B_PARITY ACT_n VSSQ#E8 M_B_PARITY ACT_n VSSQ#E8
T3 F1 T3 F1 T3 F1 T3 F1
3 M_B_PARITY PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1

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H1 H1 H1 H1
VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9
R99 T7
0_5%_4 VSSQ#H9 R165 T7
0_5%_4 VSSQ#H9 R209 T7
0_5%_4 VSSQ#H9 R264 T7
0_5%_4 VSSQ#H9
NC NC NC NC
96-BALL 96-BALL 96-BALL 96-BALL
DDR4 DDR4 DDR4 DDR4
DDR4_96P DDR4_96P DDR4_96P DDR4_96P
Hynix AKD5JGETW00--H5TC4G63AFR-PBA

DDR4 mapping SDP DDP Place these Caps near Channel B

Vendor P/N Vendor P/N 1uF/10uF 4pcs on each side of connector
M_B_BG#1_R R120 0_5%_4
E9 VSS UZQ
MIC 16G AKD5EG0TL00 MT40A1G16HBA-083E:A +1.2VSUS +1.2VSUS
M9 VSS BG1 VREF DQ1 M1 Solution
C251 1u/6.3V_4 +VDDQ_VTT
T7 NC VSS
Elpida
DB1 Option for 16Gbx16 die C252 1u/6.3V_4 C119 1u/6.3V_4 R65
B
SAMSUNG +VDDQ_VTT
Close DDR ball C321 1u/6.3V_4
C167
C122
1u/6.3V_4
1u/6.3V_4 1.8K_1%_2
B

C124 1u/6.3V_4
C191 1u/6.3V_4 C121 1u/6.3V_4 R51 2.7_5%_6 +SMDDR_VREF_DQ1_M1R47 *0_5%_4
3 SMDDR_VREF_DQ1_M3 +VDDQ
C173 1u/6.3V_4
C227 1u/6.3V_4 C162 1u/6.3V_4
DB1 12/11, close memory C170 Memory 8G & Memory 16G TABLE C123 1u/6.3V_4 R54
0.01u/50V_4 C346 1u/6.3V_4
+VDDQ_VTT M_B_CLKP0 R94 39_1%_2 Memory 8G Memory 16G C125 1.8K_1%_2
C144 1u/6.3V_4 C169 10u/6.3V_4 0.022u/25V_4
M_B_CLKN0 R95 39_1%_2 R278 0Ω CS00002JB38 240Ω CS12402FB03 C120 10u/6.3V_4 R48 24.9_1%_4
M_B_BS#1 delete 36 ohm put it back later C261 1u/6.3V_4
M_B_BS#0 R74 39_1%_2 +1.2VSUS R279 0Ω CS00002JB38 240Ω CS12402FB03
M_B_BS#1 R109 39_1%_2 C228 1u/6.3V_4 DB1 Intel
M_B_BG#0 R75 39_1%_2 M_B_ALERT# R112 49.9_1%_2 R280 0Ω CS00002JB38 240Ω CS12402FB03
M_B_CKE0 R79 39_1%_2 C257 1u/6.3V_4
M_B_CS#0 R77 39_1%_2 R281 0Ω CS00002JB38 240Ω CS12402FB03
M_B_A0 R85 39_1%_2 C303 1u/6.3V_4
M_B_A1 R89 39_1%_2 M_B_CLKP0 R282 UNINSTAL INSTAL
M_B_A2 R66 39_1%_2 C268 10u/6.3V_4
M_B_A3 R88 39_1%_2 R283 UNINSTAL INSTAL C355 10u/6.3V_4 +SMDDR_VREF_DQ1_M1
M_B_A4 R87 39_1%_2 C356 10u/6.3V_4 SI1B, 0603
M_B_A5 R91 39_1%_2 C176 R284 UNINSTAL INSTAL C350 10u/6.3V_4 C319 0.1u/16V_4
M_B_A6 R71 39_1%_2 C214 10u/6.3V_4
M_B_A7 R101 39_1%_2 DB1 1/18, close cpu 3.3p/50V_4
R285 UNINSTAL INSTAL C130 2.2u/6.3V_4
M_B_A8 R70 39_1%_2 M_B_CLKN0 C199 1u/6.3V_4
M_B_A9 R90 39_1%_2 R290 INSTAL UNINSTAL C281 1u/6.3V_4 C258 0.047u/25V_4
M_B_A10 R76 39_1%_2 C260 1u/6.3V_4
M_B_A11 R68 39_1%_2 R291 INSTAL UNINSTAL C320 1u/6.3V_4 C189 0.047u/25V_4
M_B_A12 R72 39_1%_2 C184 1u/6.3V_4
M_B_A13 R92 39_1%_2 C225 0.01u/50V_4 R292 INSTAL UNINSTAL C131 0.047u/25V_4
M_B_WE# +1.2VSUS
R73 39_1%_2 C226 0.01u/50V_4
M_B_CAS# R108 39_1%_2 C145 0.01u/50V_4 R293 INSTAL UNINSTAL C259 0.047u/25V_4
M_B_RAS# R69 39_1%_2 C146 0.01u/50V_4 SI1, 0421 add
M_B_DIM0_ODT0 R78 39_1%_2 C216 0.01u/50V_4
M_B_ACT# R80 39_1%_2 DB1 Intel
M_B_PARITY R67 39_1%_2
M_B_BG#1_R R139 *39_1%_4
A A
+2.5V_SUS C314 1u/6.3V_4
C359 1u/6.3V_4
C148 1u/6.3V_4 +SMDDR_VREF_DQ1_M1 +1.2VSUS
C193 1u/6.3V_4 SI1, 0417 RF SI1, 0417 RF
+VDDQ_VTT 17,38 C312 1u/6.3V_4
+1.2VSUS 3,5,16,17,38,44 C194 1u/6.3V_4
+2.5V_SUS 17,38 C195 1u/6.3V_4
C149 1u/6.3V_4 C132 C190 C318 C357 C322 C188 C219
C358 10u/6.3V_4 3.3p/50V_4 68p/50V_4 2200p/50V_4 68p/50V_4 2200p/50V_4 0.1u/16V_4 3.3p/50V_4
C220 10u/6.3V_4
C217 68p/50V_4
DB1 RF DB1 RF Quanta Computer Inc.
DB1 12/11, close memory PROJECT : ZAUI
Size Document Number Rev
3A
DDR4 Memory Down (CH. B)
Date: Monday, November 04, 2019 Sheet 18 of 47
5 4 3 2 1
 1 2 3 4 5 6 7 8

+1.03_GFX
Near GPU
C497
C500
EV@22U/6.3VS_4
EV@10u/6.3V_4
U22A

1/14 PCI_EXPRESS
NVDD = 32.22 ~ 26.66 A
+VGPU_CORE
19
C499 EV@10u/6.3V_4 AB6 C493 *[email protected]/16V_4 U22E 2 1 L5
PEX_W AKE* Under GPU EV@HCB1005KF-330T30 +1V8_GFX_MAIN
C504 [email protected]/6.3V_4 11/14 NVVDD
C503 [email protected]/6.3V_4 AA22 C72 EV@1u/6.3V_4 K10
AB23 PEX_IOVDD_1 AC7 VGA_RST# R502 *short_4 C74 EV@1u/6.3V_4 K12 VDD_001
PEX_IOVDD_2 PEX_RST* PEGX_RST# 22 VDD_002
AC24 C104 EV@1u/6.3V_4 K14
C38 EV@1u/6.3V_4 AD25 PEX_IOVDD_3 AC6 PEX_CLKREQ# R537 EV@10K_1%_4 +1V8_AON C99 EV@1u/6.3V_4 K16 VDD_003 U22C VDD33 = 56mA
A C48 [email protected]/6.3V_4 AE26 PEX_IOVDD_4 PEX_CLKREQ* C102 [email protected]/6.3V_4 K18 VDD_004 A
14/14 XVDD/VDD33
AE27 PEX_IOVDD_5 AE8 C77 [email protected]/6.3V_4 L11 VDD_005
PEX_IOVDD_6 PEX_REFCLK CLK_VGA_P 12 VDD_006
Under GPU AD8 C507 [email protected]/6.3V_4 L13 AD10 G10
PEX_REFCLK* CLK_VGA_N 12 VDD_007 NC_1 VDD33_1 +1V8_AON
C107 [email protected]/6.3V_4 L15 AD7 G12
AC9 PEG_RXP5_C C36 [email protected]/10V_4 C86 [email protected]/6.3V_4 L17 VDD_008 B19 NC_2 VDD33_2 C128 [email protected]/16V_4Under
PEX_IOVDD + PEX_IOVDDQ = 1.042A PEX_TX0 PEG_RXP5 11 VDD_009 NC_3 GPU
AB9 PEG_RXN5_C C40 [email protected]/10V_4 C108 [email protected]/6.3V_4 M10
PEX_TX0* PEG_RXN5 11 VDD_010
C98 [email protected]/6.3V_4 M12
AG6 C70 [email protected]/6.3V_4 M14 VDD_011 C133 F11
[email protected]/16V_4 C143 [email protected]/6.3V_4 Near
+1V8_GFX_MAIN PEX_RX0 PEG_TXP5 11 VDD_012 3V3AUX GPU
C514 EV@22U/6.3VS_4 AA10 AG7 C506 EV@47U/6.3V_6 M16 C129 EV@1u/6.3V_4
PEX_IOVDDQ_1 PEX_RX0* PEG_TXN5 11 VDD_013
C523 [email protected]/6.3V_4 AA12 C505 EV@22u/6.3V_6 M18 C135 V5
[email protected]/6.3V_4
C516 EV@10u/6.3V_4 AA13 PEX_IOVDDQ_2 AB10 PEG_RXP6_C C10 [email protected]/10V_4 N11 VDD_014 V6 NC_V5
PEX_IOVDDQ_3 PEX_TX1 PEG_RXP6 11 VDD_015
C515 EV@10u/6.3V_4 AA16 AC10 PEG_RXN6_C C9 [email protected]/10V_4 PEG_RXN6 11 C1 EV@220u/2V_7343H1.0N13 C127 EV@22u/6.3V_6 NC_V6 G8
+1V8_GFX_MAIN
C520 [email protected]/6.3V_4 AA18 PEX_IOVDDQ_4 PEX_TX1* N15 VDD_016 VDD33_3 G9

+
AA19 PEX_IOVDDQ_5 AF7 C509 EV@47U/6.3V_6 N17 VDD_017 VDD33_4
PEX_IOVDDQ_6 PEX_RX1 PEG_TXP6 11 VDD_018
Near GPU AA20 AE7 C519 EV@10u/6.3V_4 P10
PEX_IOVDDQ_7 PEX_RX1* PEG_TXN6 11 VDD_019
AA21 C496 *EV@10u/6.3V_4 P12 CONFIGURABLE
AB22 PEX_IOVDDQ_8 AD11 PEG_RXP7_C C3 [email protected]/10V_4 C494 *EV@10u/6.3V_4 P14 VDD_020 C89 [email protected]/6.3V_4
PEG_RXP7 11 POWER CHANNELS
AC23 PEX_IOVDDQ_9 PEX_TX2 AC11 PEG_RXN7_C C4 P16 VDD_021
Under GPU PEX_IOVDDQ_10 PEX_TX2*
[email protected]/10V_4 PEG_RXN7 11 C517 *EV@10u/6.3V_4
VDD_022
* nc on substrate C115 EV@1u/6.3V_4
C35 EV@1u/6.3V_4 AD24 C510 [email protected]/6.3V_4 P18
C46 EV@1u/6.3V_4 AE25 PEX_IOVDDQ_11 AE9 C511 [email protected]/6.3V_4 R11 VDD_023 G1 C117 [email protected]/16V_4
PEX_IOVDDQ_12 PEX_RX2 PEG_TXP7 11 VDD_024 NC_G1
C34 EV@1u/6.3V_4 AF26 AF9 C513 [email protected]/6.3V_4 R13 G2 C116 [email protected]/16V_4
PEX_IOVDDQ_13 PEX_RX2* PEG_TXN7 11 VDD_025 NC_G2
C50 EV@1u/6.3V_4 AF27 C512 [email protected]/6.3V_4 R15 G3
PEX_IOVDDQ_14 AC12 PEG_RXP8_C C11 [email protected]/10V_4 R17 VDD_026 G4 NC_G3
PEX_TX3 PEG_RXP8 11 Near GPU VDD_027 NC_G4 Under GPU
AB12 PEG_RXN8_C C12 [email protected]/10V_4 T10 G5
PEX_TX3* PEG_RXN8 11 VDD_028 NC_G5
C110 [email protected]/6.3V_4 T12 G6
AG9 C109 [email protected]/6.3V_4 T14 VDD_029 G7 NC_G6
PEX_PLL_HVDD + PEX_RX3 AG10
PEG_TXP8 11
PEG_TXN8 11 C66 [email protected]/6.3V_4 T16 VDD_030 NC_G7
PEX_RX3* VDD_031
PEX_SVDD_3V3 = 143mA AB13 +VGPU_CORE +VGPU_CORE
C82
C56
[email protected]/6.3V_4
EV@1u/6.3V_4
T18
U11 VDD_032 V1
PEX_TX4 AC13 C84 EV@1u/6.3V_4 U13 VDD_033 V2 NC_V1
B R17 *EV@Short_0402 PEX_TX4* C101 EV@10u/6.3V_4 U15 VDD_034 NC_V2 B
+1V8_GFX_MAIN VDD_035
AF10 C8 EV@47U/6.3V_6 C6 *EV@47U/6.3V_6 C60 EV@10u/6.3V_4 U17
PEX_RX4 AE10 C13 EV@47U/6.3V_6 C2 *EV@47U/6.3V_6 C85 EV@10u/6.3V_4 V10 VDD_036
PEX_RX4* C44 EV@47U/6.3V_6 C522 *EV@47U/6.3V_6 C100 EV@10u/6.3V_4 V12 VDD_037
AD14 C76 EV@47U/6.3V_6 C7 *EV@47U/6.3V_6 C73 EV@10u/6.3V_4 V14 VDD_038 W1
C54 [email protected]/16V_4 AA8 PEX_TX5 AC14 C14 EV@47U/6.3V_6 C5 *EV@47U/6.3V_6 C55 EV@10u/6.3V_4 V16 VDD_039 W2 NC_W 1
C41 [email protected]/6.3V_4 AA9 PEX_PLL_HVDD_1 PEX_TX5* C83 EV@10u/6.3V_4 V18 VDD_040 W3 NC_W 2
C57 [email protected]/6.3V_4 PEX_PLL_HVDD_2 AE12 C71 EV@10u/6.3V_4 VDD_041 W4 NC_W 3
PEX_RX5 AF12 NC_W 4
PEX_RX5* Under GPU
Near GPU AB8
PEX_SVDD_3V3
PEX_TX6
AC15 Power up
AB15
sequence

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PEX_TX6*
AG12
PEX_RX6 AG13
PEX_RX6*
AB16 1V8_AON
PEX_TX7 AC16
PEX_TX7*
AF13 1V8_MAIN
PEX_RX7 AE13 1.8V
PEX_RX7*
AD17 3V3_SYS
NC PEX_TX8
NC
AC17
PEX_TX8*
AE15 +1V8_AON
NC PEX_RX8 AF15
NVVDD
NC PEX_RX8*
F2 NC
AC18 NVVDDS
42 VGA_VCCSENSE VDD_SENSE PEX_TX9 AB18
NC PEX_TX9*
C C501 C
F1 AG15 U19 [email protected]/16V_4 PEX_VDD
42 VGA_VSSSENSE GND_SENSE NC
NC
PEX_RX9 AG16 EV@NL17SZ08DFT2G 1.0V
PEX_RX9*

5
AB19 1 FBVDD/Q
NC PEX_TX10 6 DGPU_HOLD_RST# PEGX_RST#_C R506
NC
AC19 4 *EV@Short_0402 PEGX_RST#
PEX_TX10* 2
13,28,31,33,35 PLTRST#
AF16
NC PEX_RX10
NC
AE16

3
PEX_RX10*
AD20 R503
NC PEX_TX11 AC20 EV@100K_1%_4
NC PEX_TX11* Power down
AE18
NC
NC
PEX_RX11
PEX_RX11*
AF18 sequence
AC21
NC PEX_TX12 AB21
NC PEX_TX12*
R512 PEX_TSTCLK AF22
*EV@200_1%_2 AG18
PEX_TSTCLK# AE22 PEX_TSTCLK_OUT
PEX_TSTCLK_OUT*
NC
NC
PEX_RX12
PEX_RX12*
AG19 net PCIE_CLKREQ_VGA# and PU:10K both remove in CPU side
CX300T30001 Change to 0ohm
AD23
NC PEX_TX13
NC AE23
PEX_TX13*
AA14 AF19
PEX_PLLVDD_1 NC PEX_RX13 6,22 DGPU_PWROK
AA15 NC AE19
PEX_PLLVDD_2 PEX_RX13*
NC
AF24
PEX_TX14 AE24
2

NC PEX_TX14*
D D
AE21 PEX_CLKREQ# 1 3
PEX_PLLVDD = 130mA NC
NC
PEX_RX14 AF21 PCIE_CLKREQ_VGA# 12
EV@10K_1%_4 R513 TESTMODE AD9 PEX_RX14* Q31 EV@PJA138K
TESTMODE AG24
NC PEX_TX15
NC AG25 R542 *EV@0_5%_4
PEX_TX15*
NC PEX_RX15
AG21
AG22
Quanta Computer Inc.
NC PEX_RX15*
GF117 GF119
PROJECT : ZAUI
[email protected]_1%_2 R511 PEX_TERMP AF25 Size Document Number Rev
PEX_TERMP 3A
N17S-G1-A1(PCIE I/F)/NVDD
Date: Monday, November 04, 2019 Sheet 19 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

U22B

23 VMA_DQ[63..0]
R528

VMA_DQ[63..0]
PS_FB_CLAMP F3
EV@10K_1%_4 NC
FB_CLAMP GF119

GF117
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
E18 VMA_DQ0
F18 VMA_DQ1
E16 VMA_DQ2
F17 VMA_DQ3
D20 VMA_DQ4
D21 VMA_DQ5
FBVDDQ + FBVDD = 3.116A U22F
13/14 GND
20
FBA_CMD[31:0] FBA_D5 F20 VMA_DQ6 +1.35V_GFX U22D A2 M13
23 FBA_CMD[31:0] FBA_D6 E21 VMA_DQ7 AB17 GND_001 GND_071 M15
12/14 FBVDDQ
FBA_DBI[7:0] FBA_D7 E15 VMA_DQ8 AB20 GND_005 GND_072 M17
23 FBA_DBI[7:0] FBA_D8 GND_006 GND_073
D15 VMA_DQ9 C134 EV@1u/6.3V_4 B26 AB24 N10
FBA_EDC[7:0] FBA_D9 F15 VMA_DQ10 C25 FBVDDQ_01 AC2 GND_007 GND_074 N12
23 FBA_EDC[7:0] FBA_D10 Under GPU C157 EV@1u/6.3V_4
FBVDDQ_02 GND_008 GND_075
F13 VMA_DQ11 C80 EV@1u/6.3V_4 E23 AC22 N14
A FBA_D11 C13 VMA_DQ12 C118 EV@1u/6.3V_4 E26 FBVDDQ_03 AC26 GND_009 GND_076 N16 A
FBA_D12 B13 VMA_DQ13 C158 EV@1u/6.3V_4 F14 FBVDDQ_04 AC5 GND_010 GND_077 N18
FBA_D13 E13 VMA_DQ14 C79 EV@1u/6.3V_4 F21 FBVDDQ_05 AC8 GND_011 GND_078 P11
FBA_D14 D13 VMA_DQ15 C78 EV@1u/6.3V_4 G13 FBVDDQ_06 AD12 GND_012 GND_079 P13
FBA_D15 B15 VMA_DQ16 C126 EV@1u/6.3V_4 G14 FBVDDQ_07 AD13 GND_013 GND_080 P15
+1.35V_GFX FBA_D16 C16 VMA_DQ17 C111 EV@10u/6.3V_4 G15 FBVDDQ_08 A26 GND_014 GND_081 P17
FBA_D17 A13 VMA_DQ18 C87 EV@10u/6.3V_4 G16 FBVDDQ_09 AD15 GND_002 GND_082 P2
FBA_D18 A15 VMA_DQ19 C75 EV@10u/6.3V_4 G18 FBVDDQ_10 AD16 GND_015 GND_083 P23
FBA_CMD14 R527 EV@10K_1%_4 FBA_D19 B18 VMA_DQ20 C543 EV@22u/6.3V_6 G19 FBVDDQ_11 AD18 GND_016 GND_084 P26
FBA_D20 A18 VMA_DQ21 C63 *EV@22U/6.3V_6 G20 FBVDDQ_12 AD19 GND_017 GND_085 P5
FBA_CMD30 R525 EV@10K_1%_4 FBA_D21 A19 VMA_DQ22 C544 *EV@22U/6.3V_6 G21 FBVDDQ_13 AD21 GND_018 GND_086 R10
FBA_D22 C19 VMA_DQ23 H24 FBVDDQ_14 AD22 GND_019 GND_087 R12
FBA_D23 B24 VMA_DQ24 H26 FBVDDQ_15 AE11 GND_020 GND_088 R14
FBA_D24 C23 VMA_DQ25 J21 FBVDDQ_16 AE14 GND_021 GND_089 R16
FBA_CMD13 R526 EV@10K_1%_4 FBA_D25 A25 VMA_DQ26 K21 FBVDDQ_17 AE17 GND_022 GND_090 R18
FBA_D26 A24 VMA_DQ27 L22 FBVDDQ_18 AE20 GND_023 GND_091 T11
FBA_CMD29 R29 EV@10K_1%_4 FBA_D27 A21 VMA_DQ28 L24 FBVDDQ_19 AB11 GND_024 GND_092 T13
FBA_D28 B21 VMA_DQ29 L26 FBVDDQ_20 AF1 GND_003 GND_093 T15
FBA_D29 C20 VMA_DQ30 M21 FBVDDQ_21 AF11 GND_025 GND_094 T17
FBA_D30 C21 VMA_DQ31 N21 FBVDDQ_22 AF14 GND_026 GND_095 U10
FBA_D31 R22 VMA_DQ32 R21 FBVDDQ_23 AF17 GND_027 GND_096 U12
FBA_CMD0 C27 FBA_D32 R24 VMA_DQ33 T21 FBVDDQ_24 AF20 GND_028 GND_097 U14
FBA_CMD1 C26 FBA_CMD0 FBA_D33 T22 VMA_DQ34 V21 FBVDDQ_25 AF23 GND_029 GND_098 U16
FBA_CMD2 E24 FBA_CMD1 FBA_D34 R23 VMA_DQ35 W 21 FBVDDQ_26 AF5 GND_030 GND_099 U18
FBA_CMD3 F24 FBA_CMD2 FBA_D35 N25 VMA_DQ36 FBVDDQ_27 AF8 GND_031 GND_100 U2
FBA_CMD4 D27 FBA_CMD3 FBA_D36 N26 VMA_DQ37 AG2 GND_032 GND_101 U23
FBA_CMD5 D26 FBA_CMD4 FBA_D37 N23 VMA_DQ38 AG26 GND_033 GND_102 U26
FBA_CMD6 F25 FBA_CMD5 FBA_D38 N24 VMA_DQ39 AB14 GND_034 GND_103 U5
FBA_CMD7 F26 FBA_CMD6 FBA_D39 V23 VMA_DQ40 B1 GND_004 GND_104 V11
FBA_CMD8 F23 FBA_CMD7 FBA_D40 V22 VMA_DQ41 B11 GND_035 GND_105 V13
B FBA_CMD9 G22 FBA_CMD8 FBA_D41 T23 VMA_DQ42 B14 GND_036 GND_106 V15 B
FBA_CMD10 G23 FBA_CMD9 FBA_D42 U22 VMA_DQ43 B17 GND_037 GND_107 V17
FBA_CMD11 G24 FBA_CMD10 FBA_D43 Y24 VMA_DQ44 B20 GND_038 GND_108 Y2
FBA_CMD12 F27 FBA_CMD11 FBA_D44 AA24 VMA_DQ45 B23 GND_039 GND_109 Y23
FBA_CMD13 G25 FBA_CMD12 FBA_D45 Y22 VMA_DQ46 B27 GND_040 GND_110 Y26
FBA_CMD14 G27 FBA_CMD13 FBA_D46 AA23 VMA_DQ47 B5 GND_041 GND_111 Y5
FBA_CMD15 G26 FBA_CMD14 FBA_D47 AD27 VMA_DQ48 B8 GND_042 GND_112
FBA_CMD16 M24 FBA_CMD15 FBA_D48 AB25 VMA_DQ49 E11 GND_043
FBA_CMD17 M23 FBA_CMD16 FBA_D49 AD26 VMA_DQ50 E14 GND_044
FBA_CMD18 K24 FBA_CMD17 FBA_D50 AC25 VMA_DQ51 E17 GND_045
FBA_CMD19 K23 FBA_CMD18 FBA_D51 AA27 VMA_DQ52 E2 GND_046
FBA_CMD20 M27 FBA_CMD19 FBA_D52 AA26 VMA_DQ53 E20 GND_047

Vinafix.com
FBA_CMD21 M26 FBA_CMD20 FBA_D53 W 26 VMA_DQ54 E22 GND_048
FBA_CMD22 M25 FBA_CMD21 FBA_D54 Y25 VMA_DQ55 E25 GND_049
FBA_CMD23 K26 FBA_CMD22 FBA_D55 R26 VMA_DQ56 E5 GND_050
FBA_CMD24 K22 FBA_CMD23 FBA_D56 T25 VMA_DQ57 E8 GND_051
FBA_CMD25 J23 FBA_CMD24 FBA_D57 N27 VMA_DQ58 H2 GND_052
FBA_CMD26 J25 FBA_CMD25 FBA_D58 R27 VMA_DQ59 H23 GND_053
FBA_CMD27 J24 FBA_CMD26 FBA_D59 V26 VMA_DQ60 H25 GND_054
FBA_CMD28 K27 FBA_CMD27 FBA_D60 V27 VMA_DQ61 D22 FB_CAL_PD_VDDQ R84 [email protected]_1%_2 H5 GND_055
FBA_CMD29 FBA_CMD28 FBA_D61 FB_CAL_PD_VDDQ +1.35V_GFX GND_056
K25 W 27 VMA_DQ62 K11
FBA_CMD30 J27 FBA_CMD29 FBA_D62 W 25 VMA_DQ63 K13 GND_057
FBA_CMD31 J26 FBA_CMD30 FBA_D63 C24 FB_CAL_PU_GND R82 [email protected]_1%_2 K15 GND_058
FBA_CMD31 FB_CAL_PU_GND K17 GND_059
D19 FBA_DBI0 L10 GND_060
FBA_DQM0 D14 FBA_DBI1 B25 FB_CAL_TERM_GNDR541 [email protected]_1%_2 L12 GND_061
FBA_DQM1 C17 FBA_DBI2 FB_CAL_TERM_GND L14 GND_062
FBA_DQM2 C22 FBA_DBI3 L16 GND_063
FBA_DQM3 P24 FBA_DBI4 L18 GND_064
FBA_DQM4 W 24 FBA_DBI5 L2 GND_065
C FBA_DQM5 AA25 FBA_DBI6 L23 GND_066 C
R59 F22
*[email protected]_1%_2 FBA_DQM6 U25 FBA_DBI7 L25 GND_067
+1.35V_GFX
R46 J22 FBA_DEBUG0
*[email protected]_1%_2 FBA_DQM7 L5 GND_068 AA7
FBA_DEBUG1 M11 GND_069 GND_F AB7
E19 FBA_EDC0 GND_070 GND_H
FBA_DQS_W P0 C15 FBA_EDC1
D24 FBA_DQS_W P1 B16 FBA_EDC2
23 VMA_CLK0 FBA_CLK0 FBA_DQS_W P2 FBA_EDC3
D25 B22
23 VMA_CLK0# FBA_CLK0* FBA_DQS_W P3 FBA_EDC4
N22 R25
23 VMA_CLK1 FBA_CLK1 FBA_DQS_W P4 FBA_EDC5
M22 W 23
23 VMA_CLK1# FBA_CLK1* FBA_DQS_W P5 FBA_EDC6
AB26
FBA_DQS_W P6 T26 FBA_EDC7
FBA_DQS_W P7
For support GC6 2.0
VMA_WCK01 D18 F19 +3V
23 VMA_WCK01 VMA_WCK01# FBA_W CK01 FBA_DQS_RN0
C18 C14
23 VMA_WCK01# FBA_W CK01* FBA_DQS_RN1
VMA_WCK23 D17 A16
23 VMA_WCK23 VMA_WCK23# FBA_W CK23 FBA_DQS_RN2
D16 A22 U20
23 VMA_WCK23# FBA_W CK23* FBA_DQS_RN3
VMA_WCK45 T24 P25 EV@NL17SZ32DFT2G
23 VMA_WCK45 VMA_WCK45# FBA_W CK45 FBA_DQS_RN4
U24 W 22 R510 *EV@0_5%_4 C495
23 VMA_WCK45# FBA_W CK45* FBA_DQS_RN5 6,44 DGPU_PWR_EN

5
VMA_WCK67 V24 AB27 [email protected]/16V_4
23 VMA_WCK67 VMA_WCK67# FBA_W CK67 FBA_DQS_RN6
FB_PLLAVDD = 55mA V25 T27 R509 2
*EV@Short_0402
23 VMA_WCK67# FBA_W CK67* FBA_DQS_RN7 42,44 GPU_PWR_GD FBVDD_EN
4 R505 *EV@Short_0402 FBVDDQ_EN 43
FB_DLLAVDD = 15mA 1
6,22 GC6_FB_EN_Q
L3 1 +FB_PLLAVDD F16
2 *EV@HCB1608KF_300_2A

3
FB_PLLAVDD_1

+1V8_GFX_MAIN L4 1 2 EV@HCB1005KF-330T30 P22 R504

FB_PLLAVDD_2 EV@100K_1%_4
C136 EV@22u/6.3V_4 H22 GF119
D C95 [email protected]/16V_4 FB_DLLAVDD D
C139 [email protected]/16V_4
FB_PLLAVDD GF117
C114 [email protected]/16V_4

D23
Quanta Computer Inc.
FB_VREF_PROBE
L.H PROJECT : ZAUI
Size Document Number Rev
3A
N17S-G1-A1(MEMORY/GND)
Date: Monday, November 04, 2019 Sheet 20 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

U22G U22J

AA6
4/14 IFPAB

GF119 GF117

NC
GF117
NC
NC
GF119

IFPA_TXC*
IFPA_TXC
AC4
AC3
7/14 IFPEF

GF119 GF117
GF117

NC
NC
DVI-DL

I2CY_SDA
I2CY_SCL
GF119
DVI-SL/HDMI

I2CY_SDA
I2CY_SCL
DP

IFPE_AUX_I2CY_SDA*
J3
J2
Vinafix.com 21
IFPAB_RSET Y3 J7 IFPE_AUX_I2CY_SCL
NC IFPA_TXD0* IFPEF_PLLVDD_1 NC
Y4
NC IFPA_TXD0 J1
NC TXC TXC IFPE_L3*
V7 K1
TP57 IFPAB_PLLVDD_1 NC NC TXC TXC IFPE_L3
NC
AA2 K7 NC
W7 IFPA_TXD1* AA3 IFPEF_PLLVDD_2 K3
TP55 IFPAB_PLLVDD_2 NC NC IFPA_TXD1 NC TXD0 TXD0 IFPE_L2* U22K
A K2 A
NC TXD0 TXD0 IFPE_L2 R556 EV@10K_5%_4
3/14 DACA +1V8_AON
AA1 K6 M3
NC IFPA_TXD2* IFPEF_RSET NC NC TXD1 TXD1 IFPE_L1*
AB1 M2 GF119 GF117
NC IFPA_TXD2 NC TXD1 TXD1 IFPE_L1 GF117 GF119
W5 DACA_VDD NC NC I2CA_SCL B7 I2CA_SCL
M1 I2CA_SDA A7
I2CA_SDA R557 *EV@10K_5%_4
NC TXD2 TXD2 IFPE_L0* NC
AA5 N1 AE2 DACA_VREF
NC IFPA_TXD3* NC TXD2 TXD2 IFPE_L0 TSEN_VREF
AA4
NC IFPA_TXD3 AF2 DACA_RSET NC NC DACA_HSYNC AE3
IFPE NC DACA_VSYNC AE4
AB4
NC IFPB_TXC* AB5
NC IFPB_TXC
NC HPD_E HPD_E C2 DACA_RED AG3
GF119 GF117 GPIO18 NC
W6 AB2 DACA_GREEN AF4
TP56 IFPA_IOVDD NC NC IFPB_TXD4* NC
AB3
NC IFPB_TXD4 GF119 GF117
Y6 DACA_BLUE AF3
TP54 IFPB_IOVDD NC NC
H6 NC
AD2 IFPE_IOVDD
NC GF119
IFPB_TXD5* AD3 J6
NC NC GF117
IFPB_TXD5 IFPF_IOVDD DVI-DL DVI-SL/HDMI DP

NC H4
I2CZ_SDA IFPF_AUX_I2CZ_SDA*
AD1 NC I2CZ_SCL H3
NC IFPB_TXD6* IFPF_AUX_I2CZ_SCL
NC
AE1
IFPB_TXD6
NC TXC J5
AD5 IFPF_L3* J4
NC IFPB_TXD7* NC TXC IFPF_L3
AD4
NC IFPB_TXD7
NC TXD3 TXD0
K5
IFPF_L2* K4
NC TXD3 TXD0 IFPF_L2
B B
NC TXD4 TXD1 L4
IFPF IFPF_L1* L3
NC TXD4 TXD1 IFPF_L1
NC B3
GPIO14
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0*
M5
M4
IFPF_L0

U22H
5/14 IFPC
IFPC NC HPD_F F7
GF119 GF117 GPIO19

Vinafix.com
T6 GF117 GF119
IFPC_RSET NC

DVI/HDMI DP

M7 NC NC I2CW_SDA N5
N7 IFPC_PLLVDD_1 IFPC_AUX_I2CW _SDA* N4
IFPC_PLLVDD_2 NC NC I2CW_SCL IFPC_AUX_I2CW _SCL
PLLVDD = 38mA
N3
NC TXC IFPC_L3*
NC N2
TXC IFPC_L3 L2 1 2 EV@HCB1005KF-330T30 NV_PLLVDD
+1V8_GFX_MAIN
R3 C68 [email protected]/16V_4
NC TXD0 IFPC_L2* R2 C105 *EV@22u/6.3V_4
NC TXD0 IFPC_L2
TXD1 R1
NC IFPC_L1*
NC TXD1 T1
IFPC_L1 U22M
T3 SP_PLLVDD = 17mA 9/14 XTAL_PLL
NC TXD2 IFPC_L0*
C T2 C
NC TXD2 IFPC_L0 L6
L1 1 SP_PLLVDD
2 EV@HCB1005KF-330T30 M6 CORE_PLLVDD
+1V8_GFX_MAIN SP_PLLVDD
C90 [email protected]/16V_4
P6 NC C3 C96 [email protected]/16V_4 R42 N6
*EV@Short_0402
IFPC_IOVDD NC GPIO15 VID_PLLVDD GF119
C59 *EV@10u/6.3V_4 +1V8_AON
C103 *EV@47U/6.3V_6 NC GF117
R562 *EV@10K_1%_4
U22I VID_PLLVDD = 41mA
6/14 IFPD R570 XTAL_SSIN
EV@10K_1%_4 A10 C10 BXTALOUT R563 EV@10K_1%_4
XTAL_SSIN XTAL_OUTBUFF
GF119 GF117
U6 GF117 GF119 27M_XTAL_IN C11 B10 27M_XTAL_OUT
IFPD_RSET NC XTAL_IN XTAL_OUT
DVI/HDMI DP

T7 I2CX_SDA P4
IFPD_PLLVDD_2 NC NC IFPD_AUX_I2CX_SDA*
NC I2CX_SCL P3 C555 EV@12p/50V_4
R7 IFPD_AUX_I2CX_SCL
IFPD_PLLVDD_1 NC

3
4
R5 27M_XTAL_IN Y2
NC TXC IFPD_L3* R4 27M_XTAL_OUT EV@27MHZ/10ppm
NC TXC IFPD_L3
T5

1
2
NC TXD0 IFPD_L2* T4 C554 EV@12p/50V_4
NC TXD0 IFPD_L2
TXD1 U4
NC IFPD_L1*
IFPD NC TXD1 IFPD_L1
U3

D V4 D
NC TXD2 IFPD_L0* V3
NC TXD2 IFPD_L0

R6 D4
IFPD_IOVDD GF119 NC GPIO17
NC GF117 Quanta Computer Inc.
PROJECT : ZAUI
Size Document Number Rev
3A
N17S-G1-A1(DISPLAY)
Date: Monday, November 04, 2019 Sheet 21 of 47
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

U22L
Default: Samsung +1V8_AON

22
10/14 MISC2

+1V8_AON R568 *EV@Short_0402

TP9 E10
TP10 F10 VMON_IN0 D12 ROM_CS TP6 R566 R567 R565
VMON_IN1 ROM_CS* EV@100K_5%_4
EV@100K_5%_4
EV@100K_5%_4 R533 R538 R544 R529 R546 R540
B12 ROM_SI EV@100K_5%_4
EV@100K_5%_4
EV@100K_5%_4
*EV@100K_5%_4
*EV@100K_5%_4
*EV@100K_5%_4
ROM_SI A12 ROM_SO
STRAP0 D1 ROM_SO C12 ROM_SCLK ROM_SI STRAP0
STRAP1 D2 STRAP0 ROM_SCLK ROM_SO STRAP1
STRAP1 N17S strap setting
STRAP2 E4 ROM_SCLK STRAP2 ROM_SI = Stuff 100K Pull Up CS41002JB20
STRAP3 E3 STRAP2 STRAP3 ROM_SO = Stuff 100K Pull Up CS41002JB20
A STRAP4 D3 STRAP3 STRAP4 ROM_SCLK = Stuff 100K Pull Up and 100K Pull Down A
STRAP4 STRAP5 CS41002JB20
STRAP0 = VRAM Configuration follow VRAM table
GF119 GF117
STRAP1 = VRAM Configuration follow VRAM table
STRAP5 C1 R553 R554 R552 STRAP2 = VRAM Configuration follow VRAM table
STRAP5 NC
D11 *[email protected]_1%_4
*EV@100K_5%_4
EV@100K_5%_4 R534 R539 R545 R532 R547 R543 STRAP3 = Stuff 100K Pull Down CS41002JB20
BUFRST* EV@100K_5%_4
EV@100K_5%_4
EV@100K_5%_4
EV@100K_5%_4 EV@100K_5%_4 STRAP4 =
EV@100K_5%_4 Stuff 100K Pull Down CS41002JB20
F6 D10 STRAP5 = Stuff 100K Pull Down CS41002JB20
MULTI_STRAP_REF0_GND PGOOD
+1V8_AON
GF119 GF117
F4
MULTI_STRAP_REF1_GND NC
E9 R340 [email protected]_5%_2
CEC EV@PJT138K +1V8_AON
F5 NC STRAP2 STRAP1 STRAP0
MULTI_STRAP_REF2_GND
6 1 GPUT_DATA_L
9,26,34 2ND_MBDATA
Samsung L L L 0x0000
2
U22N
8/14 MISC1
GPUT_CLK_L GPUT_CLK_L
Micron H L L 0x0004
D9 3 4
I2CS_SCL 9,26,34 2ND_MBCLK
D8 GPUT_DATA_L
I2CS_SDA 5 Hynix H L H 0x0005
A9 DGPU_EDIDCLKR561 [email protected]_5%_2
R569 *EV@Short_0402 R341 [email protected]_5%_2
I2CC_SCL DGPU_EDIDDATA +1V8_AON +1V8_AON
B9 R560 [email protected]_5%_2 Q15
I2CC_SDA

TP11 THERM- E12 GF117 GF119

THERMDN
NC I2CB_SCL
C9 N12E_SCL
N12E_SDA
R559 [email protected]_5%_2 STRAP[2:0] VRAM Table for N17S-G0/G2 GDDR5 Recommended Memories
TP5 THERM+ F12 C8 R558 [email protected]_5%_2
B THERMDP NC I2CB_SDA RAMCFG B
[2:0] DESCRIPTION Vendor Vendor P/N QPN
TP51 JTAG_TCK AE5
TP50 JTAG_TMS AD6 JTAG_TCK 0x0 GDDR5 256Mx32 7 GHz Samsung B die K4G80325FB-HC28 AKG5QGDT518
TP52 JTAG_TDI AE6 JTAG_TMS
TP53 JTAG_TDO AF6 JTAG_TDI 0x4 GDDR5 256Mx32 7 GHz Micron B die MT51J256M32HF-70:B AKG5QGUTL32
JTAG_TRST# AG4 JTAG_TDO C6 GPU_GPIO0 R551 PWM-VID
*EV@Short_0402
JTAG_TRST* GPIO0 GC6_FB_EN_N17 GC6_FB_EN PWM-VID 42 0x5 GDDR5 256Mx32 7 GHz Hynix A die H5GC8H24AJR-R0C AKG5QGUTW26
B2 R81 *EV@Short_0402
GPIO1 D6 GPU_GPIO2 R53 GPU_EVENT#_GPU 2
*EV@Short_0402 1 GPU_EVENT#
GPIO2 GPU_EVENT# 6
C7 D2 EV@RB500V-40
GPIO3 F9 1V8_MAIN_EN_N17 R61 1V8_MAIN_EN
*EV@Short_0402
GPIO4 1V8_MAIN_EN 42,44
A3

Vinafix.com
GPIO5 A4 GPU_GPIO6 R549 DGPU_PSI
*EV@Short_0402
GPIO6 B6
GPIO7 A6 VGA_OVT#
GPIO8/OVERT F8 ALERT
GPIO9 C5 GPIO10_VREF
GPIO10 GPIO10_VREF 23
E7
GPIO11 D7 DGPU_PROCHOT_EC#
GPIO12 B4 R175 DGPU_PWROK
*EV@Short_0402
GPIO13 43 HWPG_1.35VGFX DGPU_PWROK 6,19

GF117 GF119
D5 GPU_PEX_RST_HOLD#
NC GPIO16
NC E6
GPIO20 C4 GPU_GPIO21
NC GPIO21

+3V
C C
GC6_FB_EN_Q
GC6_FB_EN_Q 6,20
+1V8_AON R2 *EV@0_5%_4
R83
R1 *EV@Short_0402 R3 *[email protected]_5%_2
+3V EV@10K_5%_4
19 PEGX_RST#
3

2 Q8 +3V
2

EV@DMG1012T-7
VGA_OVT# 1 3 DGPU_OVT#_EC
1

DGPU_OVT#_EC 34
3

GC6_FB_EN 2 Q9
Q1
EV@DMG1012T-7
*EV@DMG1012T-7
1

GPU_EVENT# R673 *EV@10K_5%_4

+1V8_AON

+1V8_AON +1V8_AON +3V

DGPU_PSI
DGPU_PSI 42 DGPU_PSI
R550 EV@10K_1%_4
DGPU_PWR_EN
6,20,44 DGPU_PWR_EN
R479 R480
EV@10K_1%_4 *EV@10K_1%_4 GC6_FB_EN R86 EV@10K_1%_4 VGA_OVT# R564 EV@10K_1%_4

D D
2

JTAG_TRST# R508 EV@10K_1%_4 ALERT R56 EV@10K_1%_4

DGPU_PROCHOT_EC# 1 3
dGPU_OPP# 34
GPIO10_VREF R64 EV@100K_1%_4 GPU_PEX_RST_HOLD# R555 *EV@10K_1%_4
Q25
EV@2N7002KTB
GPU_EVENT#_GPU R50 EV@10K_1%_4 Quanta Computer Inc.
1V8_MAIN_EN R60 EV@10K_1%_4 PROJECT : ZAUI
Size Document Number Rev
NVVDD POWER GOOD LOOPBACK Overt temp ckt for NVVDD and NVVDDS GPU_GPIO21 R548 EV@10K_1%_4 N17S-G1-A1(GPIO/STRAPS) 3A

Date: Monday, November 04, 2019 Sheet 22 of 47

1 2 3 4 5 6 7 8
 5 4 3 2 1

MF=0 Non-mirrored
MF=0 Non-mirrored CHANNEL A: 2G/4G GDDR5
Channel 0 Channel 0 MF=0 Non-mirrored
23
20,43 +1.35V_GFX
+1.35V_GFX
+1.35V_GFX
<0-31> 20 VMA_DQ[63..0]
VMA_DQ30 M2
VRAM2
B1 C20
<32-63>
EV@22u/6.3V_6 VMA_DQ46 M2
VRAM1
B1 C151 EV@22u/6.3V_6
VMA_DQ26 M4 DQ31 | DQ7 VDDQ#B1 B3 C502 EV@22u/6.3V_6 VMA_DQ40 M4 DQ31 | DQ7 VDDQ#B1 B3 C138 EV@22u/6.3V_6

QD24~31
VMA_DQ31
VMA_DQ24
VMA_DQ28
N2
N4
T2
DQ30 | DQ6
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
VDDQ#B3
VDDQ#B12
VDDQ#B14
VDDQ#D1
B12
B14
D1
C524
C518
C81
EV@22u/6.3V_6
EV@22u/6.3V_6
EV@22u/6.3V_6
QD40~47 VMA_DQ44
VMA_DQ41
VMA_DQ45
N2
N4
T2
DQ30 | DQ6
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
VDDQ#B3
VDDQ#B12
VDDQ#B14
VDDQ#D1
B12
B14
D1
C564
C547
C546
EV@22u/6.3V_6
EV@22u/6.3V_6
EV@22u/6.3V_6
VMA_DQ27 T4 D3 VMA_DQ43 T4 D3
VMA_DQ29 U2 DQ26 | DQ2 VDDQ#D3 D12 VMA_DQ47 U2 DQ26 | DQ2 VDDQ#D3 D12
VMA_DQ25 U4 DQ25 | DQ1 VDDQ#D12 D14 C69 EV@1u/6.3V_4 VMA_DQ42 U4 DQ25 | DQ1 VDDQ#D12 D14 C160 EV@1u/6.3V_4
VMA_DQ23 M13 DQ24 | DQ0 VDDQ#D14 E5 C18 EV@1u/6.3V_4 VMA_DQ37 M13 DQ24 | DQ0 VDDQ#D14 E5 C172 EV@1u/6.3V_4
D DQ23 | DQ15 VDDQ#E5 DQ23 | DQ15 VDDQ#E5 D
VMA_DQ18 M11 E10 C16 EV@1u/6.3V_4 VMA_DQ35 M11 E10 C163 EV@1u/6.3V_4

QD16~23
VMA_DQ22
VMA_DQ16
VMA_DQ21
N13
N11
T13
DQ22 | DQ14
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
VDDQ#E10
VDDQ#F1
VDDQ#F3
VDDQ#F12
F1
F3
F12
C52

C26
EV@1u/6.3V_4

EV@1u/6.3V_4
QD32~39 VMA_DQ36
VMA_DQ33
VMA_DQ39
N13
N11
T13
DQ22 | DQ14
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
VDDQ#E10
VDDQ#F1
VDDQ#F3
VDDQ#F12
F1
F3
F12
C166

C175
EV@1u/6.3V_4

EV@1u/6.3V_4
VMA_DQ19 T11 F14 C21 EV@1u/6.3V_4 VMA_DQ38 T11 F14 C566 EV@1u/6.3V_4
VMA_DQ20 U13 DQ18 | DQ10 VDDQ#F14 G2 C27 EV@1u/6.3V_4 VMA_DQ34 U13 DQ18 | DQ10 VDDQ#F14 G2 C565 EV@1u/6.3V_4
VMA_DQ17 U11 DQ17 | DQ9 VDDQ#G2 G13 C49 EV@1u/6.3V_4 VMA_DQ32 U11 DQ17 | DQ9 VDDQ#G2 G13 C174 EV@1u/6.3V_4
VMA_DQ15 F13 DQ16 | DQ8 VDDQ#G13 H3 VMA_DQ58 F13 DQ16 | DQ8 VDDQ#G13 H3
VMA_DQ13 F11 DQ15 | DQ23 VDDQ#H3 H12 C15 EV@10u/6.3V_4 VMA_DQ62 F11 DQ15 | DQ23 VDDQ#H3 H12 C168 EV@10u/6.3V_4

QD8~15
VMA_DQ9
VMA_DQ12
VMA_DQ14
E13
E11
B13
DQ14 | DQ22
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
VDDQ#H12
VDDQ#K3
VDDQ#K12
VDDQ#L2
K3
K12
L2
C47
C19
C521
EV@10u/6.3V_4
*EV@22U/6.3V_6
*EV@22U/6.3V_6
QD56~63 VMA_DQ59
VMA_DQ63
VMA_DQ56
E13
E11
B13
DQ14 | DQ22
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
VDDQ#H12
VDDQ#K3
VDDQ#K12
VDDQ#L2
K3
K12
L2
C165
C548
C563
EV@10u/6.3V_4
*EV@22U/6.3V_6
*EV@22U/6.3V_6
VMA_DQ8 B11 L13 VMA_DQ61 B11 L13
VMA_DQ10 A13 DQ10 | DQ18 VDDQ#L13 M1 VMA_DQ57 A13 DQ10 | DQ18 VDDQ#L13 M1
VMA_DQ11 A11 DQ9 | DQ17 VDDQ#M1 M3 VMA_DQ60 A11 DQ9 | DQ17 VDDQ#M1 M3
VMA_DQ1 F2 DQ8 | DQ16 VDDQ#M3 M12 VMA_DQ48 F2 DQ8 | DQ16 VDDQ#M3 M12
VMA_DQ4 F4 DQ7 | DQ31 VDDQ#M12 M14 VMA_DQ55 F4 DQ7 | DQ31 VDDQ#M12 M14
VMA_DQ0 E2 DQ6 | DQ30 VDDQ#M14 N5 VMA_DQ50 E2 DQ6 | DQ30 VDDQ#M14 N5

QD0~7 VMA_DQ6
VMA_DQ3
VMA_DQ5
E4
B2
B4
DQ5 | DQ29
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
VDDQ#N5
VDDQ#N10
VDDQ#P1
VDDQ#P3
N10
P1
P3 QD48~55
VMA_DQ54
VMA_DQ49
VMA_DQ52
E4
B2
B4
DQ5 | DQ29
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
VDDQ#N5
VDDQ#N10
VDDQ#P1
VDDQ#P3
N10
P1
P3
VMA_DQ2 A2 P12 VMA_DQ51 A2 P12
VMA_DQ7 A4 DQ1 | DQ25 VDDQ#P12 P14 VMA_DQ53 A4 DQ1 | DQ25 VDDQ#P12 P14
DQ0 | DQ24 VDDQ#P14 T1 DQ0 | DQ24 VDDQ#P14 T1
VDDQ#T1 T3 VDDQ#T1 T3
VDDQ#T3 T12 VDDQ#T3 T12
VDDQ#T12 T14 VDDQ#T12 T14
VDDQ#T14 VDDQ#T14
FBA_CMD9 J5 FBA_CMD25 J5
20 FBA_CMD9 FBA_CMD6 A12/A13 20 FBA_CMD25 FBA_CMD22 A12/A13
K4 C5 K4 C5
20 FBA_CMD6 FBA_CMD7 A7/A8 | A0/A10 VDD#C5 20 FBA_CMD22 FBA_CMD23 A7/A8 | A0/A10 VDD#C5
K5 C10 K5 C10
20 FBA_CMD7 FBA_CMD4 A6/A11 | A1/A9 VDD#C10 20 FBA_CMD23 FBA_CMD20 A6/A11 | A1/A9 VDD#C10
K10 D11 K10 D11
20 FBA_CMD4 FBA_CMD3 A5/BA1 | A3/BA3 VDD#D11 20 FBA_CMD20 FBA_CMD19 A5/BA1 | A3/BA3 VDD#D11
K11 G1 K11 G1
20 FBA_CMD3 FBA_CMD1 A4/BA2 | A2/BA0 VDD#G1 20 FBA_CMD19 FBA_CMD17 A4/BA2 | A2/BA0 VDD#G1
H10 G4 H10 G4
20 FBA_CMD1 FBA_CMD2 A3/BA3 | A5/BA1 VDD#G4 20 FBA_CMD17 FBA_CMD18 A3/BA3 | A5/BA1 VDD#G4
C
H11 G11 H11 G11 C
20 FBA_CMD2 FBA_CMD11 A2 /BA0 | A4/BA2 VDD#G11 20 FBA_CMD18 FBA_CMD27 A2 /BA0 | A4/BA2 VDD#G11
H5 G14 H5 G14
20 FBA_CMD11 FBA_CMD10 A1/A9 | A6/A11 VDD#G14 20 FBA_CMD27 FBA_CMD26 A1/A9 | A6/A11 VDD#G14
H4 L1 H4 L1
20 FBA_CMD10 A0/A10 | A7/A8 VDD#L1 20 FBA_CMD26 A0/A10 | A7/A8 VDD#L1
L4 L4
VDD#L4 L11 VDD#L4 L11
VDD#L11 L14 VDD#L11 L14
VMA_WCK01 D4 VDD#L14 P11 VMA_WCK67 D4 VDD#L14 P11
20 VMA_WCK01 VMA_WCK01# WCK01 | WCK23 VDD#P11 20 VMA_WCK67 VMA_WCK67# WCK01 | WCK23 VDD#P11
D5 R5 D5 R5
20 VMA_WCK01# WCK01 | WCK23 VDD#R5 20 VMA_WCK67# WCK01 | WCK23 VDD#R5
R10 R10
VMA_WCK23 P4 VDD#R10 VMA_WCK45 P4 VDD#R10
20 VMA_WCK23 VMA_WCK23# WCK23 | WCK01 20 VMA_WCK45 VMA_WCK45# WCK23 | WCK01
P5 P5
20 VMA_WCK23# WCK23 | WCK01 20 VMA_WCK45# WCK23 | WCK01
A1 A1
FBA_EDC3 R2 VSSQ#A1 A3 FBA_EDC5 R2 VSSQ#A1 A3
20 FBA_EDC3 FBA_EDC2 EDC3 | EDC0 VSSQ#A3 20 FBA_EDC5 FBA_EDC4 EDC3 | EDC0 VSSQ#A3
R13 A12 R13 A12
20 FBA_EDC2 FBA_EDC1 EDC2 | EDC1 VSSQ#A12 20 FBA_EDC4 FBA_EDC7 EDC2 | EDC1 VSSQ#A12
C13 A14 C13 A14

Vinafix.com
20 FBA_EDC1 FBA_EDC0 EDC1 | EDC2 VSSQ#A14 20 FBA_EDC7 FBA_EDC6 EDC1 | EDC2 VSSQ#A14
C2 C1 C2 C1
20 FBA_EDC0 EDC0 | EDC3 VSSQ#C1 20 FBA_EDC6 EDC0 | EDC3 VSSQ#C1
C3 C3
FBA_DBI3 P2 VSSQ#C3 C4 FBA_DBI5 P2 VSSQ#C3 C4
20 FBA_DBI3 FBA_DBI2 DBI3 | DBI0 VSSQ#C4 20 FBA_DBI5 FBA_DBI4 DBI3 | DBI0 VSSQ#C4
P13 C11 P13 C11
20 FBA_DBI2 FBA_DBI1 DBI2 | DBI1 VSSQ#C11 20 FBA_DBI4 FBA_DBI7 DBI2 | DBI1 VSSQ#C11
D13 C12 D13 C12
20 FBA_DBI1 FBA_DBI0 DBI1 | DBI2 VSSQ#C12 20 FBA_DBI7 FBA_DBI6 DBI1 | DBI2 VSSQ#C12
D2 C14 D2 C14
20 FBA_DBI0 DBI0 | DBI3 VSSQ#C14 20 FBA_DBI6 DBI0 | DBI3 VSSQ#C14
E1 E1
VSSQ#E1 E3 VSSQ#E1 E3
VSSQ#E3 E12 VSSQ#E3 E12
FBA_CMD12 G3 VSSQ#E12 E14 FBA_CMD28 G3 VSSQ#E12 E14
20 FBA_CMD12 FBA_CMD15 RAS | CAS VSSQ#E14 20 FBA_CMD28 FBA_CMD31 RAS | CAS VSSQ#E14
L3 F5 L3 F5
20 FBA_CMD15 CAS | RAS VSSQ#F5 20 FBA_CMD31 CAS | RAS VSSQ#F5
F10 F10
VSSQ#F10 H2 VSSQ#F10 H2
FBA_CMD14 J3 VSSQ#H2 H13 FBA_CMD30 J3 VSSQ#H2 H13
20 FBA_CMD14 VMA_CLK0# CKE VSSQ#H13 20 FBA_CMD30 VMA_CLK1# CKE VSSQ#H13
J11 K2 J11 K2
20 VMA_CLK0# VMA_CLK0 CK VSSQ#K2 20 VMA_CLK1# VMA_CLK1 CK VSSQ#K2
J12 K13 J12 K13
20 VMA_CLK0 CK VSSQ#K13 20 VMA_CLK1 CK VSSQ#K13
M5 M5
VSSQ#M5 M10 VSSQ#M5 M10
FBA_CMD0 G12 VSSQ#M10 N1 FBA_CMD16 G12 VSSQ#M10 N1
20 FBA_CMD0 FBA_CMD5 CS | WE VSSQ#N1 20 FBA_CMD16 FBA_CMD21 CS | WE VSSQ#N1
L12 N3 L12 N3
20 FBA_CMD5 WE | CS VSSQ#N3 20 FBA_CMD21 WE | CS VSSQ#N3
B
N12 N12 B
VSSQ#N12 N14 VSSQ#N12 N14
R530 EV@120_1%_2 J13 VSSQ#N14 R1 R523 EV@120_1%_2 J13 VSSQ#N14 R1
J10 ZQ VSSQ#R1 R3 J10 ZQ VSSQ#R1 R3
SEN VSSQ#R3 R4 2017/1/4 Modify SEN VSSQ#R3 R4
VSSQ#R4 R11 VSSQ#R4 R11
FBA_CMD13 J2 VSSQ#R11 R12 FBA_CMD29 J2 VSSQ#R11 R12
20 FBA_CMD13 RESET VSSQ#R12 20 FBA_CMD29 RESET VSSQ#R12
J1 R14 J1 R14
MF VSSQ#R14 U1 MF VSSQ#R14 U1
VSSQ#U1 U3 VSSQ#U1 U3
VSSQ#U3 U12 VSSQ#U3 U12
VSSQ#U12 U14 VSSQ#U12 U14
A5 VSSQ#U14 A5 VSSQ#U14
U5 NC#A5 U5 NC#A5
+1.35V_GFX NC#U5 B5 +1.35V_GFX NC#U5 B5
A10 VSS#B5 B10 A10 VSS#B5 B10
U10 VREFD#A10 VSS#B10 D10 U10 VREFD#A10 VSS#B10 D10
VREFD#U10 VSS#D10 G5 VREFD#U10 VSS#D10 G5
VSS#G5 G10 VSS#G5 G10
R45 VSS#G10 H1 R36 VSS#G10 H1
VSS#H1 H14 VSS#H1 H14
EV@549_1%_2
VSS#H14
EV@549_1%_2 VREFC_VMA1 0.4MM=16mils VSS#H14
VREFC_VMA1 0.4MM=16mils K1 K1
FBA_VREFC_1 J14 VSS#K1 K14 FBA_VREFC_2 J14 VSS#K1 K14
VREFC VSS#K14 L5 VREFC VSS#K14 L5
VSS#L5 L10 R40 VSS#L5 L10
R49 R43 VSS#L10 P10 R35 EV@931_1%_4 VSS#L10 P10
[email protected]_1%_2 EV@931_1%_4 C137 FBA_CMD8 J4 VSS#P10 T5 [email protected]_1%_2 C92 FBA_CMD24 J4 VSS#P10 T5
20 FBA_CMD8 ABI VSS#T5 20 FBA_CMD24 ABI VSS#T5
EV@820p/50V_4 T10 T10
VSS#T10 EV@820p/50V_4 VSS#T10

EV@K4G80325FB-HC28_GDDR5_170P EV@K4G80325FB-HC28_GDDR5_170P

A A

MEM_VREF_CTL_QA

VMA_CLK0 VMA_CLK1
3

2 Q5
22 GPIO10_VREF
EV@DMG1012T-7

R531 R524
1

[email protected]_1%_2 [email protected]_1%_2
Quanta Computer Inc.
VMA_CLK0# VMA_CLK1# PROJECT : ZAUI
Size Document Number Rev
3A
N17S-G0-A1(GDDR5-1)
Date: Monday, November 04, 2019 Sheet 23 of 47
5 4 3 2 1
 5 4 3 2 1

USB Charger to 3.0 (UBC)

+USBPWR0

24
+5VPCU
80 mils (Iout=2A)
U7 CTL1 CTL2 CTL3 ILIM_SEL
1 12 80 mils (Iout=2A)
VIN VOUT (RILIM_LO 1.2A)
ILIM_L
15 ILIM_LO (RILIM_HI 2.3A) SDP 1 1 1 0
C328 16 ILIM_HI
ILIM_H C599 C310 C304
TPC@1u/10V_4
9
NC 17
R235 R223
TPC@39K_1%_2
TPC@100u/6.3V_12TPC@470p/[email protected]/16V_4 CDP 1 1 1 1
GND#2 TPC@20K_1%_2
13
D 11 USB_OC0# FAULT#
4 14 D
34 USB_BC_ON ILIM_SEL GND#1 DCP 0 1 1 X
5 11 USBP1-_C iPAD charging current is about 2.1A so set on 2.3A
34 USB_CHARGE_ON EN DM_IN USBP1+_C 1.2A current limit of USB 3.0 SDP mode
R234 TPC@100K_5%_4 10
6 DP_IN
34 USB_CLT1 CTL1 USBP1-_U14
R225 CTL2
TPC@10K_5%_4 7 2
+5VPCU CTL2 DM_OUT
R222 TPC@10K_5%_4
CTL3 8 3 USBP1+_U14
CTL3 DP_OUT
RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
TPC@SLGC55544VTR
1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
TI:AL002544001(TPS2544) 3. Mouse / Keyboard wake function is not used
If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
Silergy: AL055544000 (SLGC55544VTR) RILIM_LO < 80.6 kΩ.
The following equation programs the typical current limit:
+5VPCU 26,37,44 (1) IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
+5V_S5 16,29,33,35,37,38,39,40,42,43,44 RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44

+USBPWR0 +USBPWR1
USBP1- R251 TPC_N@0_5%_2 USBP1-_C_R R211 TPC_N@0_5%_2
USB 3.0 Connector (UB3) 11 USBP1-
11 USBP1+
USBP1+ R252 TPC_N@0_5%_2 USBP1+_C_R R218 TPC_N@0_5%_2
R649 TPC_N@0_5%_8
USBP1-_C R210 TPC@0_5%_2 USBP1-_C_R_N R646 TPC_N@0_5%_8
USBP1+_C R217 TPC@0_5%_2 USBP1+_C_R_N
R246 TPC@0_5%_2 USBP1-_U14
+5V_S5 R247 TPC@0_5%_2 USBP1+_U14 U14
CN5 +USBPWR0
C USB3.0 CONN C
1 U5
1 VBUS USB30_RX1-_C 1
2
+USBPWR1 2 D- I/O 1 USB30_RX1+_C
C610 U28 C295 *1.6p/50V_4 3 10
4 3 D+ 2 I/O 6
1u/6.3V_4 Close USB3.0 4 GND VDD
5 1 R204 *Short_0402 USB30_RX1-_C 5 9
IN OUT 11 USB30_RX1- USB30_RX1+_C 5 SSRX- GND_2
R202 *Short_0402 6 C593 3
11 USB30_RX1+ 6 SSRX+ NC_1
2 7 8
GND C287 8 7 GND USBP1-_C_R_N 4 NC_2
USBON# 4 3 C608 C604 C612 *1.6p/50V_4 9 8 SSTX- 0.1u/16V_4 I/O 2 7 USBP1+_C_R_N
34,35 USBON# /EN /OC 9 SSTX+ USB30_TX1-_C_R 5 I/O 5
470p/50V_4 0.1u/16V_4 100u/6.3V_12

GND_1
13
12
11
10
I/O 3 6 USB30_TX1+_C_R
I/O 4

Vinafix.com
G524B2T11U

13
12
11
10
2 USB_OC1#

11
C277 0.1u/16V_4 USB30_TX1-_C R200 *Short_0402 USB30_TX1-_C_R
Enable: Low Active /2.5A 11 USB30_TX1- USB30_TX1+_C R198 USB30_TX1+_C_R
*Short_0402
BCD:AL002822000 (A3) 11 USB30_TX1+
C272 0.1u/16V_4 USB30_ESD_AZ1065-06F.R7G
GMT:AL000524007 (A3)
GMT:AL000524009 (A5) C280 C270 USB protection diodes for ESD.
*1.6p/50V_4 *1.6p/50V_4
as close as possible to USB connector pins.

R293 *Short_0402 USBP2-_C

11 USBP2- USBP2+_C
R298 *Short_0402
11 USBP2+ +USBPWR1
+USBPWR1
CN7 U11
USB3.0 CONN USB30_RX2-_C 1
B 1 I/O 1 10 USB30_RX2+_C B
1 VBUS I/O 6
2 2
2 D- VDD
C368 *1.6p/50V_4 3 9
4 3 D+ C609 3 GND_2
R316 *Short_0402 USB30_RX2-_C 5 4 GND NC_1 8
11 USB30_RX2- USB30_RX2+_C 6 5 SSRX- USBP2-_C 4 NC_2
R305 *Short_0402 0.1u/16V_4
11 USB30_RX2+ 6 SSRX+ I/O 2 USBP2+_C
7 7
C363 *1.6p/50V_4 8 7 GND USB30_TX2-_C_R 5 I/O 5

GND_1
9 8 SSTX- I/O 3 6 USB30_TX2+_C_R
9 SSTX+ I/O 4

13
12
11
10
13
12
11
10

11
USB30_ESD_AZ1065-06F.R7G
C351 0.1u/16V_4 USB30_TX2-_C R284 *Short_0402 USB30_TX2-_C_R
11 USB30_TX2- USB30_TX2+_C R280 USB30_TX2+_C_R
11 USB30_TX2+
*Short_0402 USB protection diodes for ESD.
C349 0.1u/16V_4
as close as possible to USB connector pins.
C352 C345
*1.6p/50V_4 *1.6p/50V_4

CAP close to different CONN

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
USB3/Charger
Date: Monday, November 04, 2019 Sheet 24 of 47
5 4 3 2 1
 5 4 3 2 1

+3V +5V 2,6,9,10,11,12,13,17,20,22,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44

8,12,16,26,28,30,31,34,35,36,37
26,27,30,32,35,37,41
36,37,38,39,40,41,42,43,44
+3V
+3VPCU
+5V
+VIN
R515
2A / 80mils
*Short_0805 +VIN_BLIGHT
+VIN_BLIGHT

25
C542
C106 C113
0.1u/16V_4 *22U/6.3V_6
+VIN
C17 C526 0.1u/25V_4 eDP Conn.
0.1u/16V_4 CN2
4.7u/25V_6
C527 0.01u/50V_4 196538-40041-3

42
D D

+VIN_BLIGHT 2A/80mils
C539 0.1u/16V_4 40
39
C540 100p/50V_4 R34 +3VLCD_CON_R_C 38
C53 0.1u/16V_4 INT_eDP_AUXP_C *0_5%_6 37
2 INT_EDP_AUXP +3V 36
+3VLCD_CON R38 *Short_0603 +3VLCD_CON_R
C43 0.1u/16V_4 INT_eDP_AUXN_C 35
2 INT_EDP_AUXN +3V_CCD_PWR1_C 34
R21 *1K_5%_2 BRIGHT R518 *Short_0603
+3V 33
C538 0.1u/16V_4 INT_eDP_TXP0_C R12 *1K_5%_2 PCH_BLON_C
2 INT_EDP_TXP0 CCD DMIC POWER TP_PWR_C 32
+5V R41 *0_5%_6
C537 0.1u/16V_4 INT_eDP_TXN0_C R39 *Short_0402 31
2 INT_EDP_TXN0 TP POWER +3V 30
13,15 Board_ID6 R516 33_5%_2
C536 0.1u/16V_4 INT_eDP_TXP1_C C532 180p/50V_4 R33 *short_4 TS_EN_R 29
2 INT_EDP_TXP1 34 TS_EN 28
C91 180p/50V_4 VADJ1
C535 0.1u/16V_4 INT_eDP_TXN1_C BRIGHT R26 1K_1%_4 VADJ1 BL_ON 27
2 INT_EDP_TXN1 ULT_EDP_HPD_R 26
2 ULT_EDP_HPD R32 33_5%_2
C534 0.1u/16V_4 INT_eDP_TXP2_C R517 33_5%_2 25
2 INT_EDP_TXP2 TP_PWR_C 13,15 Board_ID4 24
C541 180p/50V_4 R22 *100K_1%_4 INT_EDP_AUXP_C
C533 0.1u/16V_4 INT_eDP_TXN2_C C61 33p/50V_4 R18 *100K_1%_4 INT_EDP_AUXN_C 23
2 INT_EDP_TXN2 +3V 22
R27
C531 0.1u/16V_4 INT_eDP_TXP3_C INT_EDP_TXP0_C 21
2 INT_EDP_TXP3 100K_1%_4 20
C62 0.1u/25V_4 INT_EDP_TXN0_C
C530 0.1u/16V_4 INT_eDP_TXN3_C 19
2 INT_EDP_TXN3 INT_EDP_TXP1_C 18
C67 1000p/50V_4
INT_EDP_TXN1_C 17
16
C 15 C
INT_EDP_TXP2_C
R25 10_5%_4 BRIGHT INT_EDP_TXN2_C 14
2 PCH_DPST_PWM 13
INT_EDP_TXP3_C 12
INT_EDP_TXN3_C 11
R536 *short_4 DISP_ON 10
2 PCH_DISP_ON USBP5+_CAM R522 USBP5+_CAM_C 9
11 USBP5+_CAM *Short_0402
USBP5-_CAM R521 *Short_0402 USBP5-_CAM_C 8
11 USBP5-_CAM 7
R520 *Short_0402 USBP8_TS+_C 6

Vinafix.com
11 USBP8+_TS R519 USBP8_TS-_C 5
*Short_0402
11 USBP8-_TS 4
L12 2 1 BLM15AG601SN1D DMIC_DAT_L_C 3
26 DMIC_DAT_L DMIC_CLK_L_C 2
L11 2 1 BLM15AG601SN1D
26 DMIC_CLK_L 1
+3VPCU

41
C528 C529
R23
*100K_5%_4 10P/50V_4 10P/50V_4
LCD back light +3V

LID#
LID# 34,35
1

B R24 R13 B
10K_5%_4 10K_5%_4 D1 LID591#,EC intrnal PU
1N4148WS +3V

BL# BL_ON
2

PCH
3

C545
U23
2.5A / 100mils +3VLCD_CON
R20 *short_4 PCH_BLON_C 5 2 2
2 PCH_LVDS_BLON EC_FPBACK# 34
1u/6.3V_4
R28 *short_4 Q4A Q4B Q3 4 1
34 PCH_BLON_EC R19 VIN#1 VOUT
2N7002KDW 2N7002KDW DDTC144EUA-7-F
4

100K_5%_4 5 2
EC DISP_ON 3
VIN#2

EN
GND
C549 C551 C550
0.01u/50V_4 0.1u/16V_4 10U/6.3V_4

R535 APL3512ABI-TRG

100K_1%_2

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
eDP CONN/LID/CAM/D-MIC/TS
Date: Monday, November 04, 2019 Sheet 25 of 47
5 4 3 2 1
 5 4 3 2 1

Codec(ADO)
HP-R2

HP-L2

LINE1-VREFO-L
26
LINE1-VREFO-R

MIC2-VREFO
Close to codec
CODEC_VREF C616 2.2u/6.3V_4 ADOGND
INT_AMIC-VREFO C620 10u/6.3V_4
D ADOGND +5VA D

C624

C615

C622
Change to 1U from Realtek's suggestion
R686 100K_5%_4
Codec PWR 1.5V(ADO)

1u/10V_6

1u/10V_6
10u/6.3V_6
C623 C627
+1.8V R313 256@0_5%_4 0.1u/16V_4 10u/6.3V_4
+AZA_VDD
DIGITAL ANALOG
Place next to pin 26
L13 HCB1608KF-121T30
1 2 AVDD2 U30
+1.5V R690 255@0_5%_4

36

35

34

33

32

31

30

29

28

27

26

25
ALC255-CG
ADOGND

CPVEE

HP-OUT-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HP-OUT-R

LINE1-VREFO-R

VREF
C619
10u/6.3V_4
ADOGND 37 24
CBP LINE2-L
38 23
ADOGND AVSS2 LINE2-R
Place next to pin 40 C629 10u/6.3V_4 39 22 LINE1-L Close to codec
LDO2-CAP LINE1-L R694 256@0_5%_4 +5VPCU
Analog 40 21 LINE1-R
AVDD2 LINE1-R
Digital L14 1 2 +5V_PVDD 41 20 R695 *short_6 R697 255@0_5%_4
+5V PVDD1 256@5VSTB/255@3V3STB +3VPCU
PBY160808T-600Y-N analog digital
L_SPK+ 42 19 C635 10u/6.3V_4
SPK-L+ MIC-CAP ADOGND
C641 C637 L_SPK- 43 18 SLEEVE
10u/6.3V_4 SPK-L- MIC2-R/SLEEVE trace width of SLEEVE & RING2
0.1u/16V_4
R_SPK- 44 17 RING2 are required at least 40mil and
SPK-R- MIC2-L/RING2 its length should be asshort as possible
R_SPK+ 45 16 C638 [email protected]/16V_4 PCBEEP_EC_C R707 22K_5%_4
Low is power down SPK-R+ 256@PCBEEP/255@MONO-OUT
amplifier output 46 15 Placement near Audio Codec
PVDD2 SPDIFO/FRONT JD/GPIO3
Close to codec R718

GPIO0/DMIC-DATA
PD# 47 14 HP_JD#

GPIO1/DMIC-CLK
R715 200K_1%_4 10K_1%_2
C
PDB MIC2/LIN2 JD C648 C
C650 C647 48 13 SENSEA R360 256@100K_5%_4 R699

SDATA-OUT
SPDIFO/GPIO2 HP/LINE1 JD +1.8V

LDO3-CAP
10u/6.3V_4 100p/50V_4

SDATA-IN
0.1u/16V_4 *Short_0201

DVDD-IO

PCBEEP
RESETB
DC DET
R734 255@100K_5%_4 +3V
DVDD

SYNC
49

BCLK
DGND
Analog
Digital
1

10

11

12
DMIC-DATA34 R338 *256@0_5%_4
TP36
DMIC_DAT

DMIC_CLK

C659
DC-DET

R366 *255@0_5%_4 D34 1N4148WS

TP41 1 2
C660 [email protected]/16V_4
+AZA_VDD ACZ_SPKR 6,10
+3V R780 *Short_0603
10u/6.3V_4

R782 255@0_5%_4
PCH_AZ_CODEC_RST# 13 1 2
PCBEEP_EC 34
R746 256@0_5%_4

Vinafix.com
2ND_MBCLK 9,22,34
C656 C666 D35 1N4148WS
0.1u/16V_4 10u/6.3V_4 R754 256@0_5%_4
2ND_MBDATA 9,22,34
R756 [email protected]_5%_2
+3V +3V +1.5V
R772 [email protected]_5%_2

CPU 3.3V
25 DMIC_DAT_L
DMIC_DAT_L R745

DMIC_CLK_L
*Short_0402
R374 *short_4 Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)
Tied at one point only under R749 22_5%_2 PCH_AZ_CODEC_SYNC 13
25 DMIC_CLK_L
the codec or near the codec
DVDD_IO R373 *0_5%_4 SLEEVE/RING2 trace > 40mils
R281
R289
*short_4
*0_5%_4 Close to codec
C663
33p/50V_4 HP/LINE trace > 10mils
PCH_AZ_CODEC_SDIN0_R R751
R720
R691
*0_5%_4
*0_5%_4
33_5%_2
PCH_AZ_CODEC_SDIN0 13
C661 C385
L/R spacing > 10mils
R275 *0_5%_4 0.1u/16V_4 10u/6.3V_4 MIC2-VREFO R260 2.2K_5%_2
PCH_AZ_CODEC_BITCLK 13
R345 *short_4 R420& R422 change to 62 ohm -> 3/11
C343 *1000p/50V_4 C667 *22p/50V_4 R257 2.2K_5%_2

C643 *0.1u/16V_4 PCH_AZ_CODEC_SDOUT 13 Place next to pin 9 SLEEVE

SLEEVE 35
B B
R375 *Short_0402 RING2
RING2 35
ADOGND
HP-L2 R238 62_1%_4 HP-L3
HP-L3 35
Cap need near R752 *100K_5%_4 +3V
AVDD1 and HP-R2 R232 62_1%_4 HP-R3
HP-R3 35
AVDD2
power source input HP_JD#
HP_JD# 35
R249 R224
LINE1-L C333 4.7u/6.3V_6 *10K_5%_4 *10K_5%_4 C340 C332 C327 C323
100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4
LINE1-VREFO-L R248 4.7K_5%_2

LINE1-VREFO-R R227 4.7K_5%_2

LINE1-R C334 4.7u/6.3V_6 ADOGND

Codec PWR 5V(ADO) Mute(ADO)

+AZA_VDD +1.5V

R364
1K_5%_2
2

DIGITAL ANALOG D37

PCH_AZ_CODEC_RST#
PD# 2 1 3 1

+5V +5VA *RB500V-40 Q45

R355 C377 *PJA138K
1 2 *10K_5%_4 *1u/10V_4
L7 D36
HCB2012KF-220T60 2 1
AMP_MUTE# 34
C378 C379 C375 C366
*0.1u/16V_4 *10u/6.3V_6 *10u/6.3V_6 *0.1u/16V_4 RB500V-40

A A
ADOGND
Internal Speaker 4 ohm : 40mil for each signal
5

40mil for each signal

CN11
51325-00401-001
R_SPK+ R445 *Short_0603 R_SPK+_1 1
R_SPK- R444 *Short_0603 R_SPK-_1 2
L_SPK- R443 *Short_0603 L_SPK-_1 3
L_SPK+ R442 *Short_0603 L_SPK+_1 4

Quanta Computer Inc.

C399 C398 C397 C396
1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4
PROJECT : ZAUI
6

Size Document Number Rev

3A
3/24 Stuff for EMI Audio Codec/HP/SPK/Hole
Date: Monday, November 04, 2019 Sheet 26 of 47
5 4 3 2 1
 5 4 3 2 1

HDMI CONN
IN_D0#
IN_D0
IN_D1#
IN_D1
IN_D2#
R155
R148
R142
R131
R123
HDMI_N@0_5%_2
HDMI_N@0_5%_2
HDMI_N@0_5%_2
HDMI_N@0_5%_2
HDMI_N@0_5%_2
IN_D0#_R
IN_D0_R
IN_D1#_R
IN_D1_R
IN_D2#_R
C572
C571
C570
C569
C568
[email protected]/10V_2
[email protected]/10V_2
[email protected]/10V_2
[email protected]/10V_2
[email protected]/10V_2
C_TX0_HDMI-
C_TX0_HDMI+
C_TX1_HDMI-
C_TX1_HDMI+
C_TX2_HDMI-
C_TX2_HDMI+

C_TX1_HDMI+
EMI Solution
R595

R601
*150_1%_4

*150_1%_4
C_TX2_HDMI-

C_TX1_HDMI-
27
IN_D2 R119 HDMI_N@0_5%_2 IN_D2_R C567 [email protected]/10V_2 C_TX2_HDMI+ C_TX0_HDMI+ R606 *150_1%_4 C_TX0_HDMI-
IN_CLK# R116 HDMI_N@0_5%_2 IN_CLK#_R C562 [email protected]/10V_2 C_IN_CLK# 21 20
IN_CLK R110 HDMI_N@0_5%_2 IN_CLK_R C561 [email protected]/10V_2 C_IN_CLK C_IN_CLK R589 *150_1%_4 C_IN_CLK# CN4

R111

R117

R121

R124

R138

R144

R153

R157
C_TX2_HDMI+ 1 10444-19001
Data2+
2 D2_shield
C_TX2_HDMI- 3 Data2-
C_TX1_HDMI+ 4
D Data1+ D
+3V 5 D1_shield
C_TX1_HDMI- 6 Data1-

HDMI_N@470_1%_2

HDMI_N@470_1%_2

HDMI_N@470_1%_2

HDMI_N@470_1%_2

HDMI_N@470_1%_2

HDMI_N@470_1%_2

HDMI_N@470_1%_2

HDMI_N@470_1%_2
C_TX0_HDMI+ 7 Data0+
HDMI_HPD 8 D0_shield
HDMI_SDATA C_TX0_HDMI- 9 Data0-
HDMI_SCLK C_IN_CLK 10 CLK+
11 CLK_shield
C_IN_CLK# 12
+3V D5 CLK-
SSM14 spec is 40V 1A BAT54AW -L 13 CEC
C560 1 5V_HSMBCK R163 2.2K_5%_2 14
co-layout [email protected]/16V_4 C205
co-layout +5V_HDMIC
3
2
5V_HSMBDT R164 2.2K_5%_2 HDMI_SCLK
HDMI_SDATA
15
16
Reserved
DDC CLK
[email protected]/16V_4 DDC DATA
+5V

3
C249 *10p/50V_4 17
2 Q33 +5V_HDMIC DDC/CEC GND
+3V H=1.4mm(Max) C239 *10p/50V_4 18 +5V
Q34 19 Hot Plug DET
HDMI_N@DMN601K-7 1 +5V_HDMIC
VOUT

1
U3

2
3 HDMI_HPD R98 HDMI_HPD_C
*Short_0402 23 22

24
23
22
21
20
19
18
17
HDMI_R@PTN3366BS VIN C559 D24
2 *220p/50V_4 *AZ5725-01F.R7G

NC#3
NC#2

HPD_SINK
SDA_SINK
SCL_SINK
VDD#2
DDC_EN

OE_N
GND VC1 C183

1
*TVM0G5R5M220R 220p/50V_4
AP2331SA-7
IN_D0# C206 [email protected]/10V_2 C_TX0_HDMI-_R 25 16 INT_HDMITX0P_OUT R160 HDMI_R@0_5%_2 C_TX0_HDMI-
2 IN_D0# IN_D0 C_TX0_HDMI+_R 26 IN_D1- OUT_D1- INT_HDMITX0N_OUT C_TX0_HDMI+
C203 [email protected]/10V_2 15 R150 HDMI_R@0_5%_2
2 IN_D0 IN_D1# C_TX1_HDMI-_R 27 IN_D1+ OUT_D1+ INT_HDMITX1P_OUT C_TX1_HDMI-
2 IN_D1# C201 [email protected]/10V_2 14 R145 HDMI_R@0_5%_2
IN_D1 C200 [email protected]/10V_2 C_TX1_HDMI+_R 28 IN_D2- OUT_D2- 13 INT_HDMITX1N_OUT R137 HDMI_R@0_5%_2 C_TX1_HDMI+ R93
2 IN_D1 IN_D2# C_TX2_HDMI-_R 29 IN_D2+ OUT_D2+ INT_HDMITX2P_OUT C_TX2_HDMI-
2 IN_D2# C198 [email protected]/10V_2 12 R130 HDMI_R@0_5%_2
IN_D2 C197 [email protected]/10V_2 C_TX2_HDMI+_R 30 IN_D3- OUT_D3- 11 INT_HDMITX2N_OUT R122 HDMI_R@0_5%_2 C_TX2_HDMI+ 20K_1%_2
2 IN_D2 IN_CLK# C_IN_CLK#_R IN_D3+ OUT_D3+ INT_HDMICLK+_OUT C_IN_CLK#
C196 [email protected]/10V_2 31 10 R118 HDMI_R@0_5%_2
2 IN_CLK# IN_D4- OUT_D4-
HPD_SOURCE
SDA_SOURCE

IN_CLK C_IN_CLK_R 32 9 INT_HDMICLK-_OUT C_IN_CLK

SCL_SOURCE

2 IN_CLK C187 [email protected]/10V_2 R115 HDMI_R@0_5%_2

IN_D4+ OUT_D4+
33 37 checklist REV 2.0 : PD 20K
GND#1 GND#5 36
VDD#1

C GND#4 C
REXT

35
NC#1
EQ1

EQ0

GND#3 34
GND#2
1
2
3
4
5
6
7
8

+3V
HDMI_MB_HPD_R
HDMI_EQ1

SDVO_DATA
SDVO_CLK
HDMI_EQ0

IN_D0#_R ESD D32 2 1 *PESD5V0H1BSF

C186

Vinafix.com
IN_D0_R D31 2 1 *PESD5V0H1BSF
[email protected]/16V_4
IN_D1#_R D30 2 1 *PESD5V0H1BSF
R104 [email protected]_1%_2
IN_D1_R D29 2 1 *PESD5V0H1BSF

HDMI IN_D2#_R

IN_D2_R

IN_CLK#_R
D28

D27

D26
2

2
1 *PESD5V0H1BSF

1 *PESD5V0H1BSF

1 *PESD5V0H1BSF

IN_CLK_R D25 2 1 *PESD5V0H1BSF

HDMI_SCLK D3 2 1 *PESD5V0H1BSF

HDMI_SDATA D4 2 1 *PESD5V0H1BSF

B B

From PCH

+3V

C212 C558 C210 C182 C222 C180 C181

[email protected]/16V_4 [email protected]/16V_4 [email protected]/16V_4 [email protected]/16V_4 *[email protected]/16V_4*[email protected]/16V_4 *[email protected]/16V_4

+3V +3V
HDMI-detect
R96
HDMI_N@1M_5%_2

2
Q10
HDMI_MB_HPD_R 1 3 HDMI_HPD

S0 S0 HDMI_N@2N7002K
+3V
R97 HDMI_MB_HPD_R
*Short_0402
A 2 HDMI_HPD_CON A

5
Q13A

SDVO_CLK R195 *short_4 DDCCLK_RIN 4 3 HDMI_SCLK

HDMI_EQ1 R100
+3V
*10K_5%_4 HDMI_EQ0 R103 *10K_5%_4
+3V HDMI SMBus Isolation
+3V
R105 0_5%_4 R102 0_5%_4 +3V R106 2.2K_5%_2 SDVO_CLK 2
Quanta Computer Inc.
2

Q13B
+3V R107 2.2K_5%_2 SDVO_DATA 2 SDVO_DATA R194 *short_4 DDCDATA_RIN 1 6 HDMI_SDATA
PROJECT : ZAUI
HDMI_N@SSM6N43FU Size Document Number Rev
3A
HDMI/AMP HPA022642RTJR
Date: Monday, November 04, 2019 Sheet 27 of 47
5 4 3 2 1
 5 4 3 2 1

LAN RTL8111HSH-CG 28
For LDO mode support * Place Cc,Cd,Ce,Cf for RTL8107ESH-CG/RTL8111HSH-CG
RTL8107ESH-CG/RTL8111HSH-CG
close to each VDD10 pin-- 3, 22, 8 , 30
Stuff: La, Ca ,Cb
* Place Cg,Ch for RTL8107ESH-CG/RTL8111HSH-CG LAN_AMBLED#
TP4
close to each VDD10 pin-- 22(reserved) LAN_LED1
TP2
LAN_LED2 if ISOLATEB pin pull-low,
D TP3 D
the LAN chip will not drive it's PCI-E outputs
(excluding PCIE_WAKE# pin )
+1.05V_LAN

+3V
LAN_AMBLED#
Power trace Layout 寬寬> 60mil +1.05V_LAN
R6 2.49K_1%_4

LAN_WLED# R31
+1.05V_LAN_REGOUT La +3V_LAN
R4 *Short_0805 1K_5%_2

LAN_LED1
LAN_LED2
XTAL2
XTAL1
ISOLATEB

RSET
PIN3 PIN8 PIN30 PIN22 PIN22 PIN22

Cc Cd Ce Cf Cg Ch R30
U1 15K_1%_2
C22 C64 C58 C65 C45 C93 C39

32
31
30
29
28
27
26
25
RTL8111HSH-CG
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 1u/6.3V_4 0.1u/16V_4

AVDD33#2

AVDD10#3
CKXTAL2
CKXTAL1
LED0
LED1/GPO
LED2
RSET
33
GND
Add 9 GND VIAs with thermal PAD
LAN_XTAL1 R16 10_5%_4 XTAL1
MDI0+ 1 24 +1.05V_LAN_REGOUT
MDIP0 REGOUT +1.05V_LAN_REGOUT
MDI0- 2 23
Y1 MDIN0 VDDREG +3V_LAN
3 22
R15 +1.05V_LAN AVDD10#1 DVDD10 +1.05V_LAN
1 3 680_5%_4 XTAL2 MDI1+ 4 21
2 4 MDI1- 5 MDIP1 LANWAKEB 20 ISOLATEB PCIE_WAKE# 13,33
MDI2+ 6 MDIN1 ISOLATEB 19 PLTRST#
MDIP2 PERSTB PCIE_RXN_LAN_L PLTRST# 13,19,31,33,35
MDI2- 7 18 C88 0.1u/16V_4
25MHZ/30ppm 8 MDIN2 HSON 17 PCIE_RXP_LAN_L PCIE_RXN9_LAN 11
C33 C32 +1.05V_LAN C94 0.1u/16V_4
AVDD10#2 HSOP PCIE_RXP9_LAN 11
15p/50V_4 15p/50V_4

REFCLK_N
REFCLK_P
AVDD33#1
CLKREQB
For GbE

MDIN3
MDIP3

HSIN
HSIP
Leakage circuit (MPC) * Place RTL8111HSH-CG AL008111014
C +3V +3V For 10/100 C

9
10
11
12
13
14
15
16
* Place RTL8107ESH-CG AL008107000
+3V
CLK_PCIE_REQ4# have PU 10k. R52 R55
*10K_5%_4 10K_5%_4 MDI3+
CLK_PCIE_LANN 12
2 MAIN POWER(3V_S0) MDI3-
PCIE_TXN9_LAN CLK_PCIE_LANP 12
PCIE_REQ_LAN#_R +3V_LAN PCIE_REQ_LAN#_R PCIE_TXP9_LAN PCIE_TXN9_LAN 11
3 1
S0 12 PCIE_CLKREQ_LAN# PCIE_TXP9_LAN 11

Q6
R44 2N7002K
*0_5%_4

* Place Cj and Ck, close to each VDD33 pin-- 11, 32 for

RTL8107ESH-CG/RTL8111HSH-CG

* For surge improvement, place Cm and Cn, close to each

VDD33 pin-- 11, 32(optional)
Vinafix.com RJ45

9 11
For Giga：Ub Ub CN3
2RJ1622-001111F
U21 MDI3-_1 8
MDI2+ 2 23 MDI2+_1 MDI3+_1 7
MDI2- 3 TD1+ MX1+ 22 MDI2-_1 MDI1-_1 6
+3V_LAN MDI3- 5 TD1- MX1- 20 MDI3-_1 MDI2-_1 5
MDI3+ 6 TD2+ MX2+ 19 MDI3+_1 MDI2+_1 4
MDI0- 8 TD2- MX2- 17 MDI0-_1 MDI1+_1 3
MDI0+ 9 TD3+ MX3+ 16 MDI0+_1 MDI0-_1 2
MDI1- 11 TD3- MX3- 14 MDI1-_1 MDI0+_1 1 2018/11/06
PIN11 PIN32 PIN11 PIN32 MDI1+ 12 TD4+ MX4+ 13 MDI1+_1 Need change ther footprint
TD4- MX4-
C42 C51 C30 C31 TRA_V_DAC 1 24 LAN_MCTG0 RaR11 75_1%_8
B TRA_V_DAC 4 TCT1 MCT1 21 LAN_MCTG1 B
0.1u/16V_4 0.1u/16V_4 *4.7u/6.3V_4 *4.7u/6.3V_4 RbR10 75_1%_8 10 12
TRA_V_DAC 7 TCT2 MCT2 18 LAN_MCTG2
Cj Ck Cm Cn RcR8 75_1%_8
TRA_V_DAC 10 TCT3 MCT3 15 LAN_MCTG3 RdR9 75_1%_8
25 TCT4 MCT4
GND
C97 NS892407 For 10/100：Ra,Rb C525
0.01u/50V_4 For GiGA For Giga：Ra,Rb,Rc,Rd 10p/3KV_1808
BOT:GST5009B LF,DB0Z06LAN00
FCE :NS892407 ,DB0LL1LAN00

Reserve IOAC No Stuff Q2

AO3413 +3V_LAN +3V_S5

1 3 R7
+3VPCU
*2.2_1%_8
R5
C28 100K_5%_4 C23 C25 C24 C29
2

0.1u/16V_4 10u/6.3V_6 0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4

34 LANPWR# R14 10K_5%_4

C37
1000p/50V_4

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
LAN RTL8166EH/RTL8111HSH
Date: Monday, November 04, 2019 Sheet 28 of 47
5 4 3 2 1
 5 4 3 2 1

TYPE C and MUX PI2EQX632EXUBE

29
16,24,33,35,37,38,39,40,42,43,44 +5V_S5
8,12,16,25,26,28,30,31,34,35,36,37 +3VPCU
2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43,44 +3V

+1.8V +1.8V_SW +1.8V_SW

R818 *TPC@0_5%_6

+1.8V_S5

R773 *TPC@Short_0603 R824 R775 R781 R822

*[email protected]_5%_2 *[email protected]_5%_2 [email protected]_5%_2 *[email protected]_5%_2
+1.8V_SW

D AP_EQ CON_EQ CON_DE

+TYPEC_VBUS
120mil MV-build ESD mount D
SEL
C426 [email protected]/25V_4

C462 [email protected]/25V_4
CN14
EC8 C690 C691 C692 R817 R785 R774 R823
TPC@22u/6.3V_6 [email protected]/16V_4 [email protected]/16V_4 *[email protected]/16V_4 *[email protected]_5%_2 *[email protected]_5%_2 *[email protected]_5%_2 *[email protected]_5%_2

USB30_TX+_TYPEC2_C C669 USB30_TX+_TYPEC2

[email protected]/16V_4

USB30_TX-_TYPEC2_C C668 USB30_TX-_TYPEC2

[email protected]/16V_4 USB30_TX+_TYPEC1 A2 A4
USB30_TX-_TYPEC1 SSTXp1 VBUS_1
A3 B4
CON_EQ CON_DE USB30_RX+_TYPEC1 SSTXn1 VBUS_3
B11 A9
USB30_TX3+ C684 USB3_SS0TX+ USB30_RX-_TYPEC1 SSRXp1 VBUS_2
[email protected]/16V_4 B10 B9
11 USB30_TX3+ SSRXn1 VBUS_4
USB30_TX3- C675 [email protected]/16V_4 USB3_SS0TX-
11 USB30_TX3- USB30_TX+_TYPEC2 B2 GND_1 A1
USB30_RX3+ C700 USB3_SS0RX+ USB30_TX-_TYPEC2 SSTXp2
[email protected]/16V_4 B3 A12

19
18
17
16
15
11 USB30_RX3+ USB30_RX+_TYPEC2 SSTXn2 GND_2
U34 A11 GND_3 B1
USB30_RX3- C695 USB3_SS0RX- USB30_RX-_TYPEC2 SSRXp2
[email protected]/16V_4 A10 B12

HGND

RX_CON1+ TX_CON2+
CON_EQ

RX_CON1- TX_CON2-
CON_DE
11 USB30_RX3- SSRXn2 GND_4

USB3_SS0TX- 1 14 USB30_RX+_TYPEC2 USBP_TYPC+_C A6 5

USB3_SS0TX+ TX_AP- RX_CON2+ USB30_RX-_TYPEC2 USBP_TYPC-_C Dp1 GND_5
2 13 A7 6
TX_AP+ RX_CON2- USBP_TYPC+_C Dn1 GND_6
3 12 +1.8V_SW B6 Dp2 GND_7 7
USB3_SS0RX- 4 GND VDD 11 USB30_TX-_TYPEC1_C C701 USB30_TX-_TYPEC1
[email protected]/16V_4 USBP_TYPC-_C B7 8
USB3_SS0RX+ RX_AP- TX_CON1- Dn2 GND_8
5 10 USB30_TX+_TYPEC1_C C702 USB30_TX+_TYPEC1
[email protected]/16V_4 9

AP_EQ
RX_AP+ TX_CON1+ GND_9
GND_10 10

SEL
5447_CC1_CON A5
5447_CC2_CON CC1
B5 CC2
TPC@PI2EQX632EXUBE_TQFN18

7
8
9
TP45 TYPEC_SBU1 A8 11
TYPEC_SBU2 SBU1 NC_1
TP98 B8 12
SBU2 NC_2
D38 D41

AP_EQ
TPC@EGA10402V05AH_0.2p

C TPC@EGA10402V05AH_0.2p C

USB30_RX-_TYPEC1

SEL
USB30_RX+_TYPEC1 UCF3M-01N01-0P53

R813 *short_4 25810_POL#

USBP3+_TPC R486 *TPC@Short_0402 USBP_TYPC+_C

11 USBP3+_TPC USBP3-_TPC R489 USBP_TYPC-_C
*TPC@Short_0402
11 USBP3-_TPC

Vinafix.com USB2.0

2
RV3
TPC@MESD05N92ULA

Vinafix.com

3
+3V_S5

TYPE C USB3.0 ESD 25810_FAULT#

25810_LD_DET#
R826
R815
TPC@100K_1%_2
TPC@100K_1%_2
+5V_S5

To USB3 SW,Need pu 1.8V level

C459 TPC@22u/6.3V_6
25810_UFP# R814 *TPC@100K_1%_4
25810_AUO#
25810_DBG#
R821
R829
TPC@100K_1%_2
TPC@100K_1%_2
C458 TPC@22u/6.3V_6 U6503 main source AL025810000
5447_CC1_CON TYPEC_SBU1 +3V_S5
C710 TPC@22u/6.3V_6 2nd source AL005444000 R808 [email protected]_5%_2
TYPEC_SBU2 +TYPEC_VBUS_C +1.8V
C441 [email protected]/16V_4
5447_CC2_CON EC_TYPEC_CHG R840 TPC@100K_1%_2 U36 25810_POL# R809 *[email protected]_5%_4 +1.8V_S5
EC_TYPEC_CHG_HI R838 TPC@100K_1%_2 C704 TPC@47u/6.3V_8 TPC@TPS25810RVCR(QFN)
B B
D39 D19 C708 *TPC@47u/6.3V_8 2 15 C709 TPC@10u/25V_8
EC_TypeC_EN_R R478 TPC@10K_1%_4 3 IN01 OUT01 14
C438 C711 TPC@EGA10402V05AH_0.2p TPC@EGA10402V05AH_0.2p 4 IN02 OUT02
5 IN03 11 5447_CC1_CON
*TPC@390p/50V_4 *TPC@390p/50V_4 VAUX TI CC1 5447_CC2_CON
13
6 CC2
34 EC_TypeC_EN_R EN TPS25810RVC 1 25810_FAULT#
RV2 EC_TYPEC_CHG FAULT# 25810_LD_DET#
7 20
USB30_RX+_TYPEC2 1 RV1 EC_TYPEC_CHG_HI 8 CHG LD_DET# 19 25810_UFP#
IN1 34 EC_TYPEC_CHG_HI CHG_HI UFP#
10 USB30_RX+_TYPEC2 USB30_RX+_TYPEC1 1 18 25810_POL#
USB30_RX-_TYPEC2 2 NC#4 IN1 10 USB30_RX+_TYPEC1 25810_REF 10 POL# 17 25810_AUO#
IN2 9 USB30_RX-_TYPEC2 USB30_RX-_TYPEC1 2 NC#4 REF AUDIO# 16 25810_DBG#
3 NC#3 IN2 9 USB30_RX-_TYPEC1 R839 25810_REF_RTN
TPC@100K_1%_2 9 DEBUG#

GND02
GND03
GND04
GND05
GND06
GND07
GND#1 8 3 NC#3 12 REF_RTN 21
USB30_TX-_TYPEC1 4 GND#2 GND#1 8 GND01 PwPd
IN3 7 USB30_TX-_TYPEC1 USB30_TX-_TYPEC2 4 GND#2
USB30_TX+_TYPEC1 5 NC#2 IN3 7 USB30_TX-_TYPEC2
check power ????

22
23
24
25
26
27
IN4 6 USB30_TX+_TYPEC1 USB30_TX+_TYPEC2 5 NC#2
NC#1 IN4 6 USB30_TX+_TYPEC2 +3V_S5 +3V_S5
NC#1
TPC@MESD3324PCR
TPC@MESD3324PCR
R766
Q23
*[email protected]_5%_2
+TYPEC_VBUS TPC@EMB20P03V
+TYPEC_VBUS_C

2
S

3
2 5 1 3 25810_UFP#
6 PCH_TypeC_UPFb#
1

1
D40 C452
G

R472 + C706 Q42

TPC@P4SMAFJ20A
R494 [email protected]/25V_4
TPC@422K_1%_4 TPC@150u/6.3V_3528H1.4 TPC@2N7002K
4

R493 TPC@10K_1%_4
2

TPC@470_1%_6
1 3

A R499 Q26 +5V_S5 A

Q30
3

*short_4 TPC@MMBT3906-7-F
25810_UFP# 2 R490
2

TPC@2N7002K R482
TPC@100K_1%_4
R447
1

TPC@100K_1%_4
1

TPC@10K_1%_4
C492
Q22A
*[email protected]/25V_4
3

TPC@2N7002KDW
D20
2

5 Q22B
Quanta Computer Inc.
6

TPC@2N7002KDW
T
P
C C444 2 25810_UFP#
PROJECT : ZAUI
4

@
P
D [email protected]/25V_4 Size Document Number Rev
Z
5. 3A
USB SW/TYPE-C RT5447 & Re-driver
1

6
B
Date: Monday, November 04, 2019 Sheet 29 of 47
5 4 3 2 1
 5 4 3 2 1

KEYBOARD (KBC)
Touch Pad
30
Q21A
2N7002KDW

30
R450 *0_5%_4 4 3 TP_SMB_CLK
30

MY16 9,17,31 SMB_RUN_CLK

MY16 28 MY17 R449 *Short_0402 R469 4.7K_5%_2
28 MY17 MY16 34 27 MY0 6 TP_I2C_CLK Dual
MY17 34

5
27 MY0 26 MY1
26 MY0 34 25 +3V_S5 +3V_S5
MY1 MY2
25 MY1 34 24

2
MY2 MY3 R433 *Short_0402 R429 4.7K_5%_2
24 MY3 MY2 34 23 MY4 6 TP_I2C_DATA
23 MY4 MY3 34 22 MY5 1 6 TP_SMB_DATA
R437 *0_5%_4
22 MY5 MY4 34 21 MY6 9,17,31 SMB_RUN_DAT
21 MY5 34 20
D MY6 MY7 D
20 MY7 MY6 34 19 MY8 +3V_S5 Q21B
19 MY8 MY7 34 18 MY9 2N7002KDW
18 MY9 MY8 34 17 MY10
17 MY9 34 16 TP_I2C_DATA
MY10 MY11 R424 *10K_5%_4
16 MY10 34 15 TP_I2C_CLK
MY11 MY12 R434 *10K_5%_4 C682 0.1u/16V_4
15 MY11 34 14 +3V_S5
MY12 MY13 R787 4.7K_5%_2TPCLK
14 MY12 34 13 +3V_S5
MY13 MY14 R784 4.7K_5%_2TPDATA
13 MY14 MY13 34 12 MY15
12 MY14 34 11
MY15 MX0 CN12

9
11 MX0 MY15 34 10 MX1 C681 10p/50V_4 51653-0080N-V02
10 MX0 34 9
MX1 MX2 R798 *short_4
9 MX2 MX1 34 8 MX3 1 2 HCB1005KF-330T30 TPCLK-1 1
34 TPCLK L16
8 MX3 MX2 34 7 MX4 1 2 HCB1005KF-330T30 TPDAT-1 2
34 TPDATA L15
7 MX3 34 6 3
MX4 MX5 C680 10p/50V_4
6 MX5 MX4 34 5 MX6 TP_SMB_DATA 4
5 MX5 34 4 TP_SMB_CLK 5
MX6 MX7
4 MX7 MX6 34 3 Q43 TP_INTH#_L 6
3 MX7 34 2 NBSWON# *BSS138BK 7
R796 *short_4
2 NBSWON# 1 TP_INTH#_L 34 TPD_EN 8
R430 33_5%_2 1 3 R820 *short_4
1 NBSWON# 34 TPD_INT# 6
C439 C460

29

10
*10P/50V_4 *10P/50V_4 R795
29

FOR14@196153-28021-35 R797 R807 *Short_0402

2
TPD_INT#_EC 34
FOR15_17@196153-28021-35 D17 CN8 *10K_5%_4 dummy pin, please confirm need GND
CN10 AZ5725-01F.R7G *10K_5%_4
For 14"
1
1

Prevent ESD/EOS +3V_S5

For 15" D18 Layout near +3V_S5
*VPORT_0603_220K-V05device
2

C C

MY5
MY6
MY3
C414
C415
C410
220p/25V_2
220p/25V_2
220p/25V_2
FAN check pin define
MY7 C416 220p/25V_2

MY8 C417 220p/25V_2

Vinafix.com
MY9 C419 220p/25V_2 +3V +5V +3V +5V
MY10 C418 220p/25V_2
MY11 C420 220p/25V_2

R365 R370 R371

1K_5%_2
MY1 C408 220p/25V_2 10K_5%_4 10K_5%_4
MY2 C409 220p/25V_2 FAN1

5
MY4 C411 220p/25V_2 50278-00401-001

2
MY0 C407 220p/25V_2
1
1 3 34 FAN1_RPM FAN_PWM_C 2
MX4 C405 220p/25V_2
MX6 C402 220p/25V_2 34 FAN_PWM 3
MX3 C404 220p/25V_2 Q16 4
30mil
MX2 C406 220p/25V_2 METR3904-G

6
MX7 C403 220p/25V_2
MX0 C412 220p/25V_2
B MX5 B
C401 220p/25V_2
MX1 C424 220p/25V_2

MY12 C421 220p/25V_2

MY13 C422 220p/25V_2
MY14 C423 220p/25V_2
MY15 C427 220p/25V_2
MY16 C400 220p/25V_2
MY17 C394 220p/25V_2

for EMI request

KB_BL LED (KBL@)
+3VPCU C382 *0.1u/16V_4
+5V +5V

C705 *[email protected]/6.3V_6
R827
KBL@10K_5%_4
1

Q47
2 KBL@DMP2130L-7
6
3

CN16
A 20mil 20mil A
3

KBL@50505-00401-v01-4p-l
2 +5V_KB 4
34 KB_BL_LED 3
Q44 2
KBL@DDTC144EUA-7-F C714 C713 1
1

[email protected]/6.3V_6 [email protected]/50V_4

Quanta Computer Inc.

5

PROJECT : ZAUI
Size Document Number Rev
3A
KB/TP/FAN
Date: Monday, November 04, 2019 Sheet 30 of 47
5 4 3 2 1
 5 4 3 2 1

31
TPM NPCT750

D
G-sensor (GS@) D

+3V3_TPM +3V3_TPM_VSB

+3VSPI R431 *GS@Short_0402 +G_SEN_PW

+3V
+3VSPI
U16
R448 TPM@10K_1%_2 PCH_SPI1_SO R452 *TPM@0_5%_6 C447 C436 1 2
+3VSPI Vdd_IO NC#1
R432 *TPM@0_5%_6 [email protected]/10V_2 GS@10u/6.3V_4 14 3
VDD NC#2
R411 TPM@10K_1%_2 SPI_TPM_CS#
+3VSPI +3V
+3V
OPTIONAL: 10
Required if the Chipset link HDD connector ACCEL_INTA_R RES
R420 *TPM@Short_0603 R453 *TPM@Short_0603 to CPU GS@RB500V-40 1 2 D14 11 15
6 ACCEL_INTA INT1 ADC2
does not have an internal to SATA HDD 32 ACCEL_INT2
GS@RB500V-40 1 2 D15 ACCEL_INT2_R 9
INT2
pull-up on SPI CS# and/or 7
R464 *short_4
MISO signals. C391 TPM@10u/6.3V_6 R475 *GS@Short_0201 G_MBDATA_R 6 SDO/SA0 5
9,17,30 SMB_RUN_DAT R484 SDA/SDI/SDO GND#1
C432 [email protected]/10V_2 *GS@Short_0201 G_MBCLK_R 4 12
9,17,30 SMB_RUN_CLK SCL/SPC GND#2
C392 [email protected]/10V_2 C446 TPM@10u/6.3V_6 13
C413 [email protected]/10V_2 C445 [email protected]/10V_2 ACCEL_INTA +G_SEN_PW 8 ADC3 16
+G_SEN_PW CS ADC1

22
8

1
G_MBDATA_R C464 GS@33p/50V_4
ZAAR 22p

VHIO#2
VHIO#1

VSB
G_MBCLK_R C467 GS@33p/50V_4 GS@LIS3DHTR
30 2 C395
29 SCL/GPIO1 NC#1 3
SDA/GPIO0 NC#2 [email protected]/10V_2
PIRQA# R400 *TPM@Short_0201 18 5 R468 *GS@10K_1%_2 G_MBDATA_R
13 PIRQA# PIRQ/GPIO2 NC#3 +G_SEN_PW
7 R483 *GS@10K_1%_2 G_MBCLK_R
C NC#4 9 C
PCH_SPI1_CLK R403 TPM@33_5%_2 19 NC#5 10
9,34 PCH_SPI1_CLK PCH_SPI1_SI 21 SCLK NC#6 11
R417 TPM@33_5%_2
9,10,34 PCH_SPI1_SI PCH_SPI1_SO MOSI/GPIO7 NC#7
R458 TPM@33_5%_2 24 12
9,34 PCH_SPI1_SO SPI_TPM_CS# R412 *TPM@Short_0201 20 MISO NC#8 14
9 SPI_TPM_CS# SCS/GPIO5 NC#9 15
NC#11 25
6 NC#12 26
option if design PP 13 GPIO3 NC#13 27
D16 1 2 *TPM@PESD5V0F1BL R423 *[email protected]_5%_2 PP 4 GPIO4 NC#14 28
PP/GPIO6 NC#15 31
NC#16 32

GND#2
GND#1
Vinafix.com
R398 TPM_LRESET# 17 NC#17

EPAD
*TPM@Short_0201
13,19,28,33,35 PLTRST# PLTRST

U15

33
23
16
TPM@NPCT750AAAYX

PBA (PBA@) PBA_PWR

Change Power to +3VPCU 4/26

+3VPCU PBA_PWR
B C425 *[email protected]/16V_6 B
R422 *Short_0402
1

R438
Q19 *PBA@0_5%_4
R418 PBA@10K_5%_4 2 PBA@DMP2130L-7
34 PBA_FP_PWREN#

PBA_PWR_C
3

20mil PBA_PWR_R R804 20mil

C393 *short_4

*[email protected]/50V_4
C456
C455
[email protected]/6.3V_4
[email protected]/50V_4

10
USBP7+_FP 8
11 USBP7+_FP 7
USBP7-_FP
11 USBP7-_FP 6
5
4
3
2
1
A CN13 A

9
PBA@196241-08021-3
USBP7-_FP
USBP7+_FP
2

EC6 EC7 Quanta Computer Inc.

[email protected] [email protected]
PROJECT : ZAUI
1

Size Document Number Rev

3A
TPM/G-Sensor/PBA
Date: Monday, November 04, 2019 Sheet 31 of 47
5 4 3 2 1
 5 4 3 2 1

SATA HDD & LED 16,24,29,33,35,37,38,39,40,42,43,44

25,26,27,30,35,37,41
2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,33,34,35,37,38,39,40,41,42,43,44
2,6,8,10,11,13,14,15,16,28,29,30,33,34,37,40,41
+5V_S5
+5V
+3V
+3V_S5 32
R834 GS_N@0_5%_2
13
D R835 *Short_0201 D
1 ACCEL_INT2 31
2 +5V
3
4 DEVSLP0_R R837 *Short_0201
5 DEVSLP0 11
6 SATA_RXP0_CN
7 SATA_RXN0_CN
8
9 SATA_TXN0_CN
10 SATA_TXP0_CN
11
12 +5V
14

51625-01201-001 C465 *10u/6.3V_4

HD1 +601_VCC

C461 10u/6.3V_4
R471 [email protected]_5%_2EQ2 R470 *[email protected]_5%_2

C454 0.1u/16V_4
SATA HDD Re-driver R477 [email protected]_5%_2EQ1 R476 *[email protected]_5%_2

Co-Layout Co-Layout EQ2 R466 [email protected]_5%_2DE1 R465 *[email protected]_5%_2

H - 14dB R460 [email protected]_5%_2DE2 R461 *[email protected]_5%_2
X - 0dB
R428 HDD_N@0_5%_2 SATA_TXP0_C SATA_TXP0_CN L - 7dB
C475 [email protected]/10V_2
11 SATA_TXP0_HDD R427 HDD_N@0_5%_2 SATA_TXN0_C SATA_TXN0_CN
C474 [email protected]/10V_2 R485 DEW1
*[email protected]_5%_2 R481 [email protected]_5%_2
11 SATA_TXN0_HDD R426 HDD_N@0_5%_2 SATA_RXN0_C SATA_RXN0_CN
C473 [email protected]/10V_2 EQ1 R436 DEW2
*[email protected]_5%_2 R435 [email protected]_5%_2
C 11 SATA_RXN0_HDD R425 HDD_N@0_5%_2 SATA_RXP0_C SATA_RXP0_CN H - 14dB C
C472 [email protected]/10V_2 R446 EN R451
*[email protected]_5%_2 [email protected]_5%_2
11 SATA_RXP0_HDD X - 0dB
C431 SATA_TXP0_IN
[email protected]/10V_2 SATA_TXP_OUT C471 [email protected]/10V_2 L - 7dB
C430 SATA_TXN0_IN
[email protected]/10V_2 SATA_TXN_OUT C470 [email protected]/10V_2
C429 SATA_RXN0_IN
[email protected]/10V_2 Re-Driver SATA_RXN_OUT C469 [email protected]/10V_2 DEW1
+3V +601_VCC C428 SATA_RXP0_IN
[email protected]/10V_2 SATA_RXP_OUT C468 [email protected]/10V_2 H - Long Duration
X - NC (Long)

DEW1
L - Short Duration

EQ2

EQ1
R488 *HDD_R@Short_0402
Near to U24 pin-10 and pin-20 as close as possible DE1
H - -2dB +601_VCC
C479 C450 C449 C476 C451 C466 X - -4dB

Vinafix.com
HDD_R@10u/6.3V_4 L - 0dB

20
19
18
17
16
[email protected]/10V_2
[email protected]/10V_2
[email protected]/10V_2
[email protected]/10V_2
[email protected]/10V_2
DE2

VCC#2
EQ2
GND#3
EQ1
DEW1
H - -2dB 21
X - -4dB SATA_TXP0_IN 1 PPAD
L - 0dB SATA_TXN0_IN 2 RX1P 15 SATA_TXP_OUT
3 RX1N TX1P 14 SATA_TXN_OUT
DEW2 SATA_RXN0_IN 4 GND#1 TX1N 13
H - Long Duration SATA_RXP0_IN 5 TX2N GND#2 12 SATA_RXN_OUT
X - NC (Long) TX2P RX2N 11 SATA_RXP_OUT
L - Short Duration DEW2 6 RX2P
EN 7 DEW 2 22
SW7 - EN DE2 8 EN GND#4 23
H - Enabled DE1 9 DE2 GND#5 24
L - Standby Mode 10 DE1 GND#6 25
+601_VCC VCC#1 GND#7 26
GND#8

B B
U17
HDD_R@SN75LVCP601RTJR

SATA ODD (ODD@)

20

ODD@132F18-100000-A2-R
CN15
18
17 EC_ODD_EJ# 34
16 R463 ODD@10K_5%_4 +3V
15 +5VODD R810 *ODD@Short_0805 +5V
14
13 C689 C688 C687 C686 C685 C683
12
11 [email protected]/50V_4
[email protected]/50V_4
*[email protected]/16V_4
*[email protected]/16V_4
ODD@10u/6.3V_6*ODD@100u/6.3V_12
10
9 C699 *ODD@15p/50V_4
ODD_PRSNT#_C ODD_PRSNT# 6
8 R812 ODD@33_5%_2
A 7 R806 *ODD@10K_5%_4 C703 ODD@180p/50V_4 A
+3V
6 SATA_RXP1A_C C696 [email protected]/50V_4
5 SATA_RXN1A_C C697 SATA_RXP1A_ODD 11
[email protected]/50V_4
SATA_RXN1A_ODD 11
4
3 SATA_TXP1A_C C693 [email protected]/50V_4 SATA_TXP1A_ODD 11
2 SATA_TXN1A_C C694 [email protected]/50V_4 SATA_TXN1A_ODD 11
1
Quanta Computer Inc.
PROJECT : ZAUI
19

Size Document Number Rev

3A
HDD/ ODD
Date: Monday, November 04, 2019 Sheet 32 of 47
5 4 3 2 1
 5 4 3 2 1

11
11
PCIE_RXN13_SSD
PCIE_RXP13_SSD
R852
R851
PCIE_RXN13_SSD_C
*SSD@Short_0201
PCIE_RXP13_SSD_C
*SSD@Short_0201
1
3
5
7
CN18

GND#1
GND#3
PETN3
NGFF MKEY
3.3Vaux_1
3.3Vaux_2
NC#10
2
4
6
8
100 mils
+3V_SSD 1.4A
+3V_SSD
2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,34,35,37,38,39,40,41,42,43,44
25,26,27,30,32,35,37,41
8,12,16,25,26,28,30,31,34,35,36,37
+3V
+5V
+3VPCU
33
9 PETP3 NC#11 10
C486 [email protected]/10V_4PCIE_TXN13_SSD_C 11 GND#7 DAS/DSS#(I)(OD) 12
11 PCIE_TXN13_SSD PERN3 3.3Vaux_3
C485 [email protected]/10V_4PCIE_TXP13_SSD_C 13 14
11 PCIE_TXP13_SSD PERP3 3.3Vaux_4 +3V_SSD +3V
15 16
R846 PCIE_RXN14_SSD_C
*SSD@Short_0201 17 GND#8 3.3Vaux_5 18
11 PCIE_RXN14_SSD PETN2 3.3Vaux_6
R845 PCIE_RXP14_SSD_C
*SSD@Short_0201 19 20 EC3 SSD@10u/6.3V_4 R500 *SSD@Short_0805
EC4 SSD@10u/6.3V_4
11 PCIE_RXP14_SSD PETP2 NC#12
21 22
C484 [email protected]/10V_4PCIE_TXN14_SSD_C 23 GND#2 NC#13 24 C490 [email protected]/16V_2 EC5 [email protected]/16V_2
11 PCIE_TXN14_SSD PERN2 NC#14
C483 [email protected]/10V_4PCIE_TXP14_SSD_C 25 26
11 PCIE_TXP14_SSD PERP2 NC#15
27 28 C491 *[email protected]/16V_2
R844 PCIE_RXN15_SSD_C
*SSD@Short_0201 29 GND#9 NC#16 30
11 PCIE_RXN15_SSD PCIE_RXP15_SSD_C PETN1 NC#17
11 PCIE_RXP15_SSD R843 *SSD@Short_0201 31 32 C489 *[email protected]/16V_2
33 PETP1 NC#2 34
C482 [email protected]/10V_4PCIE_TXN15_SSD_C 35 GND#10 NC#3 36
D 11 PCIE_TXN15_SSD PERN1 NC#4 D
C481 [email protected]/10V_4PCIE_TXP15_SSD_C 37 38 R498 *SSD@Short_0201 DEVSLP2 11
11 PCIE_TXP15_SSD PERP1 DEVSLP
39 40
R850 PCIE_RXP16_SSD_C
*SSD@Short_0201 41 GND#11 NC#5 42 R501 *SSD@100K_5%_4
+ & - match SATA side 11 PCIE_RXP16_SSD SATA B+/PETN0 NC#6
11 PCIE_RXN16_SSD R849 PCIE_RXN16_SSD_C
*SSD@Short_0201 43 44
45 SATA B-/PETP0 NC#7 46
C488 [email protected]/10V_4PCIE_TXN16_SSD_C 47 GND#12 NC#8 48
11 PCIE_TXN16_SSD SATA A-/PERN0 NC#9
11 PCIE_TXP16_SSD C487 [email protected]/10V_4PCIE_TXP16_SSD_C 49 50 R497 *SSD@Short_0201
PLTRST#
51 SATA A+/PERP0 PERST#/NC 52
CLK_PCIE_SSDN_C GND#13 CLKREQ#/NC PCIE_CLKREQ_SSD# 12
R848 *SSD@Short_0201 53 54
12 CLK_PCIE_SSDN CLK_PCIE_SSDP_C REFCLKN PEWAKE#/NC
R847 *SSD@Short_0201 55 56
12 CLK_PCIE_SSDP REFCLKP NC#18
57 58
GND#14 NC#19

+3V_SSD

67 68 +3V_WLAN_P +3V +3V_S5 +3V_WLAN_P

NC#1 SUSCLK TP49
PEDET 69
71 PEDET(OC-PCIE/GND-SATA) 70
GND#4 3.3Vaux_7 +3V_SSD
R492 73 72 R738 *CNV_N@0_5%_8 C646 10u/6.3V_4
Colay SATA SSD SSD@100K_1%_4 75 GND#5
GND#6
3.3Vaux_8
3.3Vaux_9
74
100mils R769 *CNV@Short_0805 C715 0.1u/16V_2

76
77
78
79
11 NGFF_SATA_DET R495 *SSD@Short_0201
C707 0.1u/16V_2

76
77
78
79
SSD@NASM0-S6701-TSH4 C719 C716 C645 C644
0.1u/16V_2 0.1u/16V_2 *0.1u/16V_2 C717 *0.1u/16V_2
Q27 R491 M key 10u/6.3V_4

SSD@2N7002K *SSD@0_5%_2 C718 *0.1u/16V_2

3
2

only SATA-->GND

1
PCIE_WAKE# EC9 *220p/50V_4

WLAN +3V_WLAN_P +1.8V_DEEP_SUS

CN9
NASE0-S6701-TS40
C C
NGFF EKEY
1 2
USBP10+_BT 3 GND#3 3.3Vaux#1 4 R799 *CNV@20K_1%_2 CNV_BRI_DT
11 USBP10+_BT USBP10-_BT USB_D+ 3.3Vaux#2 WIGIG_LED
11 USBP10-_BT 5 6 TP83
+3V_WLAN_P +3V_WLAN_P 7 USB_D- LED#1 8
CNV_WR_LANE1_DN 9 GND#4 PCM_CLK 10 CNV_RF_RESET#_L
12 CNV_WR_LANE1_DN CNV_WR_LANE1_DP SDIO CLK(O) PCM_SYNC
12 CNV_WR_LANE1_DP 11 12
13 SDIO CMD(IO) PCM_IN 14 MODEM_CLKREQ_L
R816 CNV_WR_LANE0_DN 15 SDIO DAT0(IO) PCM_OUT 16
12 CNV_WR_LANE0_DN CNV_WR_LANE0_DP SDIO DAT1(IO) LED#2
10K_5%_2 12 CNV_WR_LANE0_DP 17 18
19 SDIO DAT2(IO) GND#13 20
2

CNV_WR_CLK_DN 21 SDIO DAT3(IO) UART Wake 22 CNV_BRI_RSP_L R761 CNV@22_1%_2

REQ_WLAN# 12 CNV_WR_CLK_DN CNV_WR_CLK_DP SDIO Wake(I) UART Rx CNV_BRI_RSP 12
1 3 PCIE_CLKREQ_WLAN# 12 12 CNV_WR_CLK_DP 23
SDIO Reset
Q18
2N7002KTB
+3V_WLAN_P +3V_WLAN_P 32
UART Tx CNV_RGI_RSP_L CNV_RGI_DT 12
33 34 R793 CNV@22_1%_2

Vinafix.com
GND#5 UART RTS CNV_RGI_RSP 12
C678 0.1u/16V_2 PCIE_TXP10_WLAN_C 35 36 CNV_BRI_DT 10,12
11 PCIE_TXP10_WLAN PETp0 UART CTS +3V_WLAN_P
R833 11 PCIE_TXN10_WLAN C677 0.1u/16V_2 PCIE_TXN10_WLAN_C 37 38
39 PETn0 Clink RESET 40
200K_1%_2
41 GND#6 CLink DATA 42 BT_EN R825 *10K_1%_2
2

11 PCIE_RXP10_WLAN PERp0 CLink CLK RF_EN

11 PCIE_RXN10_WLAN 43 44 R828 *10K_1%_2
MINICAR_PME# 1 3 45 PERn0 COEX3 46
PCIE_WAKE# 13,28 GND#7 COEX2
12 CLK_PCIE_WLANP 47 48
Q46 49 REFCLKP0 COEX1 50 SUSCLK_32KHZ R802 *Short_0402
12 CLK_PCIE_WLANN REFCLKN0 SUSCLK(32KHz) WLAN_RST# SUSCLK_32K 12
*2N7002KTB 51 52 R819 *Short_0201 PLTRST# 13,19,28,31,33,35
REQ_WLAN# 53 GND#8 PERST0# 54
MINICAR_PME# CLKREQ0# W_DISABLE2# BT_EN 34
55 56 RF_EN 34
57 PEWake0# W_DISABLE1# 58 LAD0_R R830 0_5%_2 80PORT_DAT
CNV_WT_LANE1_DN GND#9 NFC_I2C_SM_DATA CLK_24M_DEBUG_R 80PORT_CLK 80PORT_DAT 34,35
12 CNV_WT_LANE1_DN 59 60 R831 0_5%_2
CNV_WT_LANE1_DP PETp1 NFC_I2C_SM_CLK LFRAME#_R 80PORT_CLK 34,35
12 CNV_WT_LANE1_DP 61 62 R832 0_5%_2 PLTRST#
PETn1 NFC_I2C_IRQ PULSAR_38P4M_REFCLK PLTRST# 13,19,28,31,33,35
+5V_S5
63 64 TP99
CNV_WT_LANE0_DN 65 GND#10 GPIO0_NFC_RESET# 66 LAD1 R836 *Short_0402
12 CNV_WT_LANE0_DN PERp1 UIM_SWP/PERST1#
R349 0_5%_2 R455 0_5%_2 CNV_WT_LANE0_DP 67 68 LAD2
12 CNV_WT_LANE0_DP PERn1 UIM_POWER_SNK TP101
69 70 LAD3 TP100
CNV_WT_CLK_DN 71 GND#11 UIM_POWER_SRC 72
12 CNV_WT_CLK_DN CNV_WT_CLK_DP Reserved1 3.3Vaux#3
73 74

GND#1
GND#2
12 CNV_WT_CLK_DP Reserved2 3.3Vaux#4
75

NC#2
NC#1
GND#12
U12 U14
3

*CNV@NL17SZ08DFT2G *CNV@NL17SZ08DFT2G

79
78
76
77
2 2
CNV_RF_RESET#_L 4 MODEM_CLKREQ_L 4
CNV_RF_RESET# 13 MODEM_CLKREQ 13
B
1 1 B
5

R439
R350 R396 R404 *[email protected]_1%_4
CNV@75K_1%_2 *CNV@75K_1%_2 CNV@75K_1%_2

+1.8V_DEEP_SUS +1.8V_DEEP_SUS
BU5 :10k

+1.8V_DEEP_SUS

R786
100K_5%_2
M.2 CNVI MODES
LOW-> INTEGRATED CNVI ENABLE
HIGH-> INTEGRATED CNVI DISABLE
CNV_RGI_DT

R328
*4.7K_5%_2

2/7 add for HW STRAP

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
HDD/WLAN(NGFF)
Date: Monday, November 04, 2019 Sheet 33 of 47
5 4 3 2 1
 5 4 3 2 1

R331 *0_5%_4

34
+3V_LDO_EC
1 2 +A3VPCU
L10 BLM15AG121SN1D +3VPCU_ECPLL 1 2 R344 *short_4 TPD_INT#_EC R309 *10K_1%_2
EC(KBC) C434
C433 11/11 FAE L6 BLM15AG121SN1D
+3VPCU_EC +3V_S5 VSTBY_FSPI +3VPCU

0.1u/16V_4 suggestion +3V

1000p/50V_4 pin106 +3V_RTC C372 (For PLL Power)
ECAGND change to 0.1u/10V_2
DGPU_OVT#_EC R791 10K_1%_2
+3VPCU_EC
12 mils +3VPCU_EC 80PORT_DAT AC_PRESENT_EC 13 Prevent ESD/EOS Layout near device
GPU_CHOKE_THERMAL
+3V_LDO_EC R401 2.2_5%_6 R325 *10K_1%_2
80PORT_DAT 33,35
R402 33_5%_2
BT_EN 33
+3VPCU_EC and +3V_RTC C478 C386 C364 C365 C477 C443 C442 CLR_CMOS 12
0.1u/10V_20.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 DGPU_OVT#_EC C387 +3V_LDO_EC
minimum trace width 12mils. DGPU_OVT#_EC 22
180p/50V_4
EC_TypeC_CHG_HI 29 Prevent ESD/EOS Layout near device
VSTBY_FSPI USBON# 24,35 S5_ON
R318 33_5%_2 R333 10K_1%_2
+3V_EC TPD_EN 30
+3V R794 *2.2_5%_6
USB_CHARGE_ON USB_BC_ON 24
+1.8V_S5 USB_CHARGE_ON 24 NBSWON# R362 10K_1%_2
R803 2.2_5%_6 C367
9 ESPI_0 C679 180p/50V_4
D
9 ESPI_1 0.1u/10V_2 U13 MAINON R462 100K_5%_2 D

114
121

106

127
11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
9 ESPI_2 IT5571E-I-128/CX

3
9 ESPI_3 SUSON R348 100K_5%_2
10 110 MBCLK

VCC

VFSPI
AVCC
VSTBY#1
VSTBY#2
VSTBY#3
VSTBY#4
VSTBY#5

VSTBY#6

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

SMCLK4/L80HLAT/BAO/GPE0
SMDAT4/L80LLAT/GPE7

GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/GPH0/ID0
9 EIO0/LAD0/GPM0 SMCLK0/GPB3 111 MBCLK 36 LID#_C
C437 180p/50V_4 MBDATA VRON R459 100K_5%_2
MBDATA 36
SM BUS SMDAT0/GPB4
EIO1/LAD1/GPM1 2ND_MBCLK
8 115
+3V_LDO_EC EIO2/LAD2/GPM2 SMCLK1/GPC1 2ND_MBDATA 2ND_MBCLK 9,22,26 PCH_SPI1_SI
7 116 R698 *10K_1%_2
PLTRST#_EC EIO3/LAD3/GPM3 SMDAT1/GPC2 EC_PECR_R 2ND_MBDATA 9,22,26
R441 *Short_0201 22 117 R354 43_5%_2 EC_PECI 4 D10
9 ESPI_RESET# 13 ERST#/LPCRST#/GPD2 SMCLK2/PECI/GPF6 118 LID#_C R368 PCH_SPI1_SO
33_5%_2 TVM0G5R5M220R_22p R700 *10K_1%_2
9 ESPI_CLK 6 ESCK/LPCCLK/GPM4 SMDAT2/PECIRQT#/GPF7 LID# 25,35
9 ESPI_CS# ECS#/LFRAME#/GPM5
C381 180p/50V_4
PROCHOT_EC 17
Near EC LPCPD#/GPE6 Prevent ESD/EOS Layout near EC
1

C440 0.1u/16V_4
R399 D13 GPU_CHOKE_THERMAL 126 PS/2
100K_5%_4 RB500V-40
42 GPU_CHOKE_THERMAL
TP42 SERIRQ 5
15
GA20/GPB5
ALERT#/SERIRQ/GPM6 LPC / eSPI PS2CLK0/TMB0/GPF0/CEC
85
86 SYS_SHDN# 4,37,41 TVS PN: SM BUS PU(KBC)
9 PCH_SUSPWRDNACK
23 PLTRST#/ECSMI#/GPD4 PS2DAT0/TMB1/GPF1 89 EC_FPBACK# 25 Priority1: CY000220Z00
6 SIO_EXT_SCI# TPCLK 30 Priority2: CY402220B00
2

WRST# 14 ECSCI#/GPD3 PS2CLK2/GPF4 90

WRST# GPIO PS2DAT2/GPF5 TPDATA 30
TP40 4 +3V_LDO_EC
C435 16 KBRST#/GPB6
28 LANPWR# PWUREQ#/BBO/SMCLK2ALT/GPC7
1u/6.3V_4
IT5571 PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
24
25
28 SUSLED#
PWRLED#
BATLED1# 35
SUSLED#
35

35
Battery module
MBCLK
MBDATA
R805
R811
4.7K_5%_2
4.7K_5%_2

25 TS_EN
R410 33_5%_2
30
13
KB_BL_LED
DNBSWON#
113
123 CRX0/GPC0
CTX0/TMA0/GPB2 CIR LQFP PWM3/GPA3
SMCLK5/PWM4/GPA4
SMDAT5/PWM5/GPA5
29
30
31 80PORT_CLK
BATLED0# 35
MAINON 16,37,38,40,41
80PORT_CLK 33,35 PU at CPU side
+3V_S5

TS_EN_C Pin 80 EC_APWROK reserve TP 2ND_MBCLK R315 4.7K_5%_2

EC_TypeC_EN
PWM 2ND_MBDATA R314
C390 180p/50V_4 80 UMA& VGA SKU 4.7K_5%_2
119 DAC4/DCD0#/GPJ4 47
Prevent ESD/EOS Layout near device 13,16 SUSB# FDIO3/DSR0#/GPG6 TACH0A/GPD6 FAN1_RPM 30 Need Stuff
33 48
13 EC_PWROK 88 GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7 TP46
25 PCH_BLON_EC TS_EN_C 81 PS2DAT1/RTS0#/GPF3 120 SUSON
87 DAC5/RIG0#/GPJ5 GPC4 124 SYS_HWPG SUSON 14,16,38,40
TP43
109 PS2CLK1/DTR0#/GPF2 GPC6
10 ME_WR# 108 TXD/SOUT0/GPB1
26 AMP_MUTE# RXD/SIN0/GPB0
dGPU_OPP# 71 107 NBSWON#
22 dGPU_OPP# ADC5/DCD1#/GPI5 PWRSW/GPE4 NBSWON# 30
72 UART port 18
36 ACIN ADC6/DSR1#/GPI6 RI1#/GPD0 SUSC# 13,16
73 WAKE UP 21 HWPG
36 TEMP_MBAT# 35 ADC7/CTS1#/GPI7 RI2#/GPD1 HWPG 13,16
TP48 WLANPWR#
34 RTS1#/GPE5 H_PROCHOT# 4,14,36,39
26 PCBEEP_EC 122 PWM7/RIG1#/GPA7 112
38 DDR4_SUSON_2V5 +1V_S5_ON 95 FDIO2/DTR1#/SBUSY/GPG1/ID7 RING#/CK32KOUT/LPCRST#/GPB7 RSMRST# 8,13
C Prevent ESD/EOS Layout near device 16,40 +1V_S5_ON EC_ODD_EJ_R# CTX1/SOUT1/GPH2/SMDAT3/ID2 C
R393 33_5%_2 94

3
Prevent ESD/EOS Layout near device Q20
32 EC_ODD_EJ# CRX1/SIN1/SMCLK3/GPH1/ID1 PROCHOT_EC 2
C384 180p/50V_4 R319 75_1%_4 105 R487 33_5%_2 2N7002K
9,31 PCH_SPI1_CLK 101 FSCK RF_EN 33
R322 0_5%_4
9 PCH_SPI_CS0# 102 FSCE#
R321 75_1%_4 EXTERNAL SERIAL FLASH ICMNT R440

1
9,10,31 PCH_SPI1_SI 103 FMOSI 66 ICMNT 36
R320 75_1%_4 C480 100K_5%_4
9,31 PCH_SPI1_SO FMISO ADC0/GPI0 67 ECAGND
C457 10u/6.3V_6 180p/50V_4
56 ADC1/GPI1 68
30 MY16 57 KSO16/SMOSI/GPC3 ADC2/GPI2 69 IDCHG_R 36
30 MY17 32 KSO17/SMISO/GPC5 ADC3/GPI3 70 VRON 39
30 FAN_PWM PWM6/SSCK/GPA6 ADC4/GPI4 KL_NO_EC 37
C453 100p/50V_4
S5_ON 100 +3VPCU
37,41 S5_ON PTP_PWR_EN# SSCE0#/GPG2 A/D D/A
TP35 125 SPI ENABLE
SSCE1#/GPG0 76
ESPI_CLK 36 TACH2A/GPJ0 77 TypeC_Strap PBA_FP_PWREN# 31
30 MY0 37 KSO0/PD0 TACH2B/GPJ1 78
30 MY1 38 KSO1/PD1 DAC2/TACH0B/GPJ2 79 PCH_PWROK 13,16
R407
30 MY2 39 KSO2/PD2 DAC3/TACH1B/GPJ3 USB_CLT1 24
TPC@100K_5%_4 +3V
30 MY3 KSO3/PD3

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R419 40
*22_5%_4
30
30
MY4
MY5
41
42
KSO4/PD4
KSO5/PD5
TypeC_Strap HWPG(KBC)
30 MY6 KSO6/PD6 KBMX DDR=1.5V, D1 DNP and D2 POP
43 High A5 ( w/ type C ) R369
30 MY7 44 KSO7/PD7 Low A3 ( w/o type C) R421
DDR=1.35V, D1 POP and D2 DNP
30 MY8 KSO8/ACK# 10K_5%_4
45 TPC_N@100K_5%_4
30 MY9 46 KSO9/BUSY
C389
30 MY10 51 KSO10/PE 2 GC6FBEN_Q_EC
*10p/50V_4 R336 *short_4 HWPG
30 MY11 41 HWPG_1.5V
KSI3/SLIN#

KSO11/ERR# GPJ7
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

52 CLOCK 128 R310 33_5%_2 TP39

30 MY12 53 KSO12/SLCT GPJ6 TPD_INT#_EC 30 2 *RB500V-40
D11 1
VCORE
VSS#1

VSS#2
VSS#3
VSS#4
VSS#5

30 MY13 KSO13 41 HWPG_1.8VS5

AVSS

54 Prevent ESD/EOS Layout near device

KSI4
KSI5
KSI6
KSI7

30 MY14 55 KSO14 2 *RB500V-40

C371 D12 1
30 MY15 KSO15 34,38 HWPG_VDDR
180p/50V_4 SM BUS ARRANGEMENT TABLE
58
59
60
61
62
63
64
65

27
49
91
104

1ECAGND 75

12

SM Bus 1 Battery D9 1 2 *RB500V-40

37 SYS_HWPG
30 MX0
30 MX1
C388 AJ089870F02 IT8987E/CX SM Bus 2 PCH/VGA/DDR D8 1 2 *RB500V-40
30 MX2 34,38 HWPG_VDDR
30 MX3 0.1u/10V_2
30 MX4
30 MX5 SM Bus 3
L9
30 MX6
30 MX7 BLM15AG121SN1D
SM Bus 4
2

B B
TP47
TP44

Output for type-c Apling ridge

reset timming"Low " Active
EC_TypeC_EN R416 *Short_0201
EC_TypeC_EN_R 29

Reset SW (FSW) 8,12,16,25,26,28,30,31,35,36,37 +3VPCU

2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,35,37,38,39,40,41,42,43,44 +3V
Battery Detect Switch 2,6,8,10,11,13,14,15,16,28,29,30,33,37,40,41 +3V_S5

R622 0_5%_2 +3V_RTC

Reserve switch for test

(MP remove) 36 BI 2 4
R37
1 3
100K_5%_4
11/29 unsutff SW1 SW3
6

Vgs = 1.5V
SW1 *NDT016-G1A-KKKT
3

*T3AL-23S-Q-T/R Q7 2
PJA138K
NBSWON# 1 3
A SW2 A
1

3
4

2 4 C112 RESET_SW
C676 *0.1u/25V_6 5
0.1u/10V_2

Reserve switch for test 6

(MP remove)
2
1

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
KBC IT8987
Date: Monday, November 04, 2019 Sheet 34 of 47
5 4 3 2 1
 5 4 3 2 1

USB Board ADOGND

CN6
35

41
51619-04001-V04
1
26 HP-R3 2
3
D 26 HP-L3 D
4
5
6
7
26 RING2 8
9
10
26 SLEEVE 11
12
26 HP_JD# 13

11
11
USBP4-_DB
USBP4+_DB
14
15
16
USB2.0 DB (UB2) +5V_S5

17
11 USBP6-_CR 18
11 USBP6+_CR 19
20 C698 U35 USBPW RD2
34 SUSLED# 21
34 PW RLED# 22 1u/6.3V_4 Close USB3.0
5 1
34 BATLED1# 23 IN OUT

check pin link to EC pin control with USB3

34 BATLED0# 24 2
25 GND
26 USBON# 4 3 C672 C673 C671
27 24,34 USBON# /EN /OC
28 470p/50V_4 0.1u/16V_4 *100u/6.3V_12
29 G524B2T11U
+3V 30
31 2 USB_OC2#
+3VPCU 32
33 Enable: Low Active /1.5A
C 34 GMT:AL000524009(A3 &A5) C
35
USBPW RD2 36
C674 *0.1U/16V_4 37
C670 *22U/6.3V_6 38
39
40
42

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B Hall Sensor DMIC B

CN1
20mils *50208-00401-V02
+3VPCU R507 2.2_5%_6 LID#
LID# 25,34

6
2

+3V_DMIC 4
2

D22 D21 C498

13 DMIC_CLK_2 3
*0.1u/6.3V_2
S VCC

OUTPUT

13 DMIC_DAT_2 2
*VPORT_0603_220K-V05 *VPORT_0603_220K-V05
1

1
GND

5
N

C508 HE1
3

APX8132AI-TRG
0.1u/16V_4

R514 *Short_0402
+3V +3V_DMIC

CN17
51614-00601-V01

7
A A
1 PLTRST#
2 80PORT_CLK PLTRST# 13,19,28,31,33
3
4
5
80PORT_DAT
+5V
80PORT_CLK 33,34
80PORT_DAT 33,34 Debug port
6
8 Quanta Computer Inc.
PROJECT : ZAUI
Size Document Number Rev
3A
USB DB/Hall sensor/DMIC
Date: Monday, November 04, 2019 Sheet 35 of 47
5 4 3 2 1
 5 4 3 2 1

PJ6
3
ADP_ID 36
VA PQ3
AONS32314
VA2 PQ4
AONS32314 PR12
0.01_1%_0612
+VIN
PQ11
AONS32314 36

D
SIGNAL
3 3 3

S
(+) PIN
1 5 2 2 5 5 2
5 1 1 1

0.047u/50V_6
4

P4SMAFJ20A

G
1

G
2 PR19

PC6

*0.01u/50V_4
PC143 PC8 24780_ACN

PD2
(-) SPRING & SHELL

4
0.1u/50V_4 1000p/50V_4 *Short_2 PC118 PC117

PC91
D 30706-00042-001 PR18 0.1u/50V_4 2200p/50V_4 D
24780_ACP

2
*Short_2
PC145 PC14
0.1u/50V_4 2200p/50V_4

PR247 PR248
4.02K_1%_4 4.02K_1%_4
PR99
*Short_6

BAT-V
24780_ACP

24780_ACN

1
PR108
VA PD4 PC76 PC237 PC74 10_1%_6
BAT54CW 0.1u/50V_4 0.1u/50V_4 0.1u/50V_4

24780_CMSRC
3
PR71 24780_ACDET
1M_5%_6

1
PU12
PR81 3 18 24780_BATDRV

ACP

ACN
CMSRC BATDRV
3

20_5%_12
2 17 24780_BATSRC
36 ADP_ID PQ9 BATSRC
C 2N7002KW 24780_ACDRV 4 REGN6V +VIN C
PR69 PR245 ACDRV
1

1M_5%_6 866K_1%_4 24780_VCC 28

REGN6V VCC 24 PC80
ACDET=16.4V REGN 2.2u/10V_4
PC238
0.47u/25V_6
PR75 PR246 PC86 PC240
100K_1%_4 137K_1%_4 PR254 2200p/50V_4 10u/25V_8
24780_ACDET 6 25 24780_BST PQ26
ACDET BTST

5
AON7410
PR80 *Short_2 5 *Short_6 PC243 D
34 ACIN ACOK 0.047u/50V_6 G

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MBDATA PR253 *Short_2 11 26 24780_DH 4
PR74 SDA HIDRV S
100K_1%_4 MBCLK PR255 *Short_2 12 PR266 BAT-V

1
2
3
SCL PL11 0.01_1%_0612
ICMNT PR249 *Short_2 7 6.8uH/4.5A_7x7x3
34 ICMNT IADP 27 24780_LX BAT-V
IDCHG_R PR250 *Short_2 8 PHASE
34 IDCHG_R IDCHG
(1) BQ24780S : 1 μA/W (default)
PMON PR251 *Short_2 9 PQ27
(2) RT3612EB : PSYS = 1.6V PMON

5
39 PMON AON7410 PR268
D *4.7_5%_6
PC77

PC73

PC235
100p/50V_4

100p/50V_4
*100p/50V_4

CS32052FB21 RES CHIP 20.5K 1/16W +-1%(0402) For 78W G PR270 PR271
PR76 23 24780_DL 4 *Short_2 *Short_2
LODRV S
CS31692FB11 RES CHIP 16.9K 1/16W +-1% (0402) For 95W [email protected]_1%_4

1
2
3
CS31372FB11 RES CHIP 13.7K 1/16W +-1%(0402) For 116W 24780_BM# 16
+3VPCU TB_STAT 24780_SRP
PR264 10K_5%_4 PC248 PC249 PC236 PC246 PC241
24780_CMPOUT 14 0.1u/25V_4 *680p/50V_6 2200p/50V_4 22u/25V_8 22u/25V_8
PR265 *10K_5%_4 CMPOUT 20 PR261 *Short_2 24780_SRP 24780_SRN
B 24780_ILIM 21 SRP B
BAT-V PR98 316K_1%_4 ILIM PC253
24780_CMPIN 13 CMPIN 0.1u/25V_4

PROCHOT

BATPRES
GND#10
GND#11
PC256 PC258 19 PR267 *Short_2 24780_SRN

GND#8
GND#9

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
PJ11 0.1u/50V_4 *100p/50V_4 PR97 PR85 SRN
50458-00801-V02 100K_1%_4 100K_5%_4 PC254
0.1u/25V_4
BI 34 BQ24780SRUYR
35
36
37
38
10

15

22
29
30
31
32
33
34
10

PR112 *0_5%_2 PC96

8 Double Check if BI pin PU Low 0.01u/50V_4
7
6

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TEMP_MBAT#
5 TEMP_MBAT# 34
PR113 100_5%_2

*Short_2
4
PR88

PR86
*0_5%_2
3 +3VPCU
2 PR90
1 1M_5%_2
TEMP_MBAT#
9

C-[10/15]
PR119 PR120 0402->0201
100_5%_2 100_5%_2
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
1

H_PROCHOT#
H_PROCHOT# 4,14,34,39
PC122 PD5 PD6 PC123
ILIM=0.793V
A *47p/50V_4 PDZ5.6B PDZ5.6B *47p/50V_4 Rsr = 0.01ohm A
2

PR252
PC242 *100K_1%_2
*0.1u/16V_4
MBCLK 34

MBDATA 34
Quanta Computer Inc.
+VCCST
PROJECT : ZAUI
Size Document Number Rev
3A
Charger (BQ24780S)
Date: Monday, November 04, 2019 Sheet 36 of 47
5 4 3 2 1
 5 4 3 2 1

+VIN 25,36,38,39,40,41,42,43,44
+3VPCU 8,12,16,25,26,28,30,31,34,35,36
+5VPCU 24,26,44

37
VL 41

+5V 25,26,27,30,32,35,41
+5V_S5 16,24,29,33,35,38,39,40,42,43,44
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,38,39,40,41,42,43,44
+VIN
+3V_S5 2,6,8,10,11,13,14,15,16,28,29,30,33,34,40,41
C-[10/15] PR239 PC229
0805->0603 10_1%_6 0.1u/25V_4
V3A_BOOT_R

+3VPCU

10u/25V_6

10u/25V_8
2200p/50V_4
0.1u/25V_4

0.1u/25V_4
PR258

PC245

PC221

PC244

PC239

PC233
D
*4.7_5%_6 3.3 Volt +/- 5% D

TDC : 6A
V3A_BOOT +V3A_LX_R
Width : 240mil
PC247 FSW : 500KHZ
*680p/50V_6
To Thermal Protection (1) USM : 0.8V-1.7V
V3A_EN (2) Normal Mode : >2.3V PU11

1
RT6256BGQUF +3VPCU
PL10

BOOT
VIN
SYS_SHDN# PR77 1uH/11A_7x7x3
4,34,41 SYS_SHDN# +V3A_LX +V3A_OUT
*Short_2 6 2 PJ2
PR234 10K_1%_4 EN LX#1 *short3720
+3VPCU

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

0.1u/16V_4
*22u/6.3V_6

*22u/6.3V_6
SYS_HWPG PR237 *Short_2 PR244 V3A_PWRGD 7 3

PC66

PC67

PC69

PC72
PC224

PC225

PC226
34 SYS_HWPG PGOOD LX#2
PR83 PC79 *Short_2
10K_1%_4 0.1u/16V_4 PR230 100K_1%_4
PR236
LDO=3.3V/100mA 11 10 V3A_VOUT +3VPCU +3VPCU
LDO3 VOUT
PR92
MAINON *0_5%_2 8 4 *Short_2
V3A_VOUT AGND PGND TDC : 5.26A TDC : 3.27A

VCC
PEAK : 7A PEAK : 4.36A

FF
PC71 PC88 PC90
3

34,37 KL_NO_EC
PR96 2 0.1u/16V_4 Width : 220mil 1u/25V_4 1u/25V_4 Width : 140mil

12

7
*Short_2 SYS_SHDN# V3A_VBYP PR72 PR78
PQ12 1K_1%_4 *1K_1%_4 +3V_S5 +3V

VIN1#1

VIN1#2

VIN2#1

VIN2#2
PR110 PR107
2N7002K PR70
1

PR82 10K_1%_4 +VCC_V3A

*100K_1%_4 PC227 *Short_8 *Short_8
4.7u/6.3V_4 PC234 13
PC70 1u/10V_4 PC106 PC108 14 VOUT1#1 8 PC109 PC112
C-[10/15]
0402->0201 10p/50V_4 10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6
PU7 OUT2#2
JW7110DFNC_TRPBF
C +5VPCU PR260 4 11 C
PR84 PC251 VBIAS GND#1
*10K_1%_4 *short_4 15
VCC=5V GND#2
High frequency noise eliminate circuit Power Auto Recovery (DON'T Connect to External Load) 0.1u/16V_4
S5_ON PR257 3 5 PR259 MAINON MAINON 16,34,38,40,41
34,41 S5_ON ON1

CT1

CT2
*Short_2 ON2 *Short_2
+3V_LDO_EC
PC252 PC250
PR68

12

10
*0.1u/16V_4 *0.1u/16V_4
+3V_LDO_EC V3A_VBYP

*Short_6
34 +3V_LDO_EC
PC111 PC110

Vinafix.com
1000p/50V_4 1000p/50V_4

+VIN Soft-Start

PR115 PC116
10_1%_6 0.1u/25V_4
10u/25V_8

10u/25V_8

2200p/50V_4
0.1u/25V_4

0.1u/25V_4

V5P5A_BOOT_R
PC262

PC263

PC264

PC270

PC261

PR114
*4.7_5%_6
+5VPCU
SYS_SHDN# PR276
*Short_2
5 Volt +/- 5% +5VPCU +5VPCU

+V5P5A_LX_R TDC : 8A
PR279 PC271 PC115
Width : 320mil TDC : 4.13A TDC : 3.53A
B B
10K_1%_4 0.1u/16V_4 *680p/50V_6 FSW : 750KHZ PEAK : 5.5A PEAK : 4.7A
PC101 PC82
PR121 V5P5A_BOOT Width : 180mil 1u/25V_4 1u/25V_4 Width : 160mil

7
MAINON *0_5%_2
PU15 +5VPCU +5V_S5 +5V

VIN1#1

VIN1#2

VIN2#1

VIN2#2
PR111 PR87
5

(1) USM : 0.8V-1.7V RT6258CGQUF

(2) Normal Mode : >2.3V PL13
3

BOOT
VIN

34,37 KL_NO_EC PR122 2 1uH/11A_7x7x3 *Short_8 *Short_8

*Short_2 V5P5A_EN 6 2 +V5P5A_LX +V5P5A_OUT PJ4 13
PQ13 EN LX#1 *short3720 PC105 PC103 14 VOUT1#1 8 PC78 PC81
2N7002K 3 10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6
1

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

0.1u/16V_4
*22u/6.3V_6

*22u/6.3V_6
PR118 SYS_HWPG PR273 V5P5A_PWRGD 7 LX#2 PU6 OUT2#2

PC113

PC119

PC269

PC121

PC114

PC120

PC268
*100K_1%_4 *Short_2 PGOOD JW7110DFNC_TRPBF
+5VPCU PR93 4 11
PR277 VBIAS GND#1
*Short_2 PC93
VL PR117 12 10 V5P5A_VOUT 15
VL LDO5 VOUT GND#2
*Short_6 0.1u/16V_4
8 4 *Short_2 S5_ON 3 5 PR89 MAINON
AGND PGND ON1

CT1

CT2
PR100 ON2 *Short_2
LDO=5V/100mA
VCC

PC266 PC267 *short_4

FF

4.7u/10V_4 0.1u/16V_4 PC99 PC87

12

10
C-[10/15] *0.1u/16V_4 *0.1u/16V_4
9

11

0603->0402
+VCC_V5P5A

V5P5A_VOUT
PC98 PC92
1000p/50V_4 1000p/50V_4

PR278 PR274
1K_1%_4 *1K_1%_4 PC265
1u/10V_4 Soft-Start

A
PC272 A
10p/50V_4
VCC=5V
(DON'T Connect to External Load)
PR275
*10K_1%_4

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
SYSTEM 5V/3V (RT6256B/RT6258C)
Date: Monday, November 04, 2019 Sheet 37 of 47
5 4 3 2 1
 5 4 3 2 1

+VIN 25,36,37,39,40,41,42,43,44 +5V_S5 16,24,29,33,35,37,39,40,42,43,44

38
+1.2VSUS 3,5,16,17,18,44 +3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,39,40,41,42,43,44
+2.5V_SUS 17,18
+VDDQ_VTT 17,18
D +VDDQ 18 D

+2.5V_SUS
2.5Volt +/- 5%
TDC : 0.75A
PEAK : 1A
+VIN
Width : 40mil
C-[10/15] +2.5V_SUS
delet PJ1
C-[10/15] +1.2VSUS
shortpad
PL1 PR127
1.2 Volt +/- 5%
PC138 PC10 PC12 PC11 PC140 4.7uH/1.08A_2.5x2.0x1.2 *Short_8 TDC : 7.2A
2200p/50V_4 0.1u/25V_4 10u/25V_6 10u/25V_6 10u/25V_6
Isat=1.4A
PEAK : 9.5A
PR123 PC129 PC128
Width : 300mil
22u/6.3V_6 *22u/6.3V_6
+5V_S5 *Short_2
C C
PU1
PR2 VDDQ_PVIN 7 15 VDDQ_SW_VPP +1.2VSUS
*short_4 PC2 PC3 PVIN SW _VPP
C-[10/15] 10u/10V_4 0.1u/25V_4 VDDQ_VCC 14 12 VQQD_VPPSNS
PVIN_VPP VPPSNS
shortpad C-[10/15]
PC1 1u/10V_4 PR132 PC139 delet PJ5
18 VDDQ_BOOT +VDDQ_BOOT1
BST
13
VCC_5V 5.1_1%_6 0.1u/25V_4 PL2

Vinafix.com
C-[10/15] 0.68uH/15.5A_7x7x3
PC16 10u/6.3V_4 VDDQ_VLDOIN 1 17 VDDQ_SW
change net VLDOIN SW
name Isat=25A
PR131 +1.2VSUS
100K_1%_4 PR6 *Short_6 5 VDDQ_VDDQSNS PR129

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
C-[10/15]

*22u/6.3V_6
+3V VDDQSNS

PC7
PC131

PC130

PC132

PC133

PC137
shortpad C-[10/15] *4.7_5%_6 PR7
PR128 *Short_2 shortpad VDDQ_PG 8 PR130 C-[10/15] *Short_2
34 HWPG_VDDR VDDQ_SLP_S4 PGOOD
11 *Short_6 shortpad
PR124 *Short_2 10 SLP_S4 2 VDDQ_VTT +VDDQ_SR
34 DDR4_SUSON_2V5 VTT_CNTL VTT +VDDQ_VTT
PR126 *0_5%_2 4 VDDQ_VTTSNS PR8 PC136

10u/6.3V_4

*10u/6.3V_4
14,16,34,40 SUSON VTTSNS

PC18

PC142
*Short_2 *680p/50V_6
3 C-[10/15] TDC : 0.45A
AGND
16,34,37,40,41 MAINON PR125 *Short_2 VDDQ_VTT_CNTL 16
9 PGND_VPP 6 VDDQ_VTTREF
shortpad
PR9
PEAK : 0.6A
+VDDQ
B C-[10/15]
PGND VTTREF *short_4 Width : 20mil B
shortpad PC125 PC126 TPS51486RJER
*1u/10V_4 *1u/10V_4 PC15
0.47u/10V_4 TDC : 0.38A
PEAK : 0.5A
Width : 20mil

VTT_CNTL SLP_S4 +1.2VSUS +2.5VSUS REF VTT

S0 1 1 ON ON ON ON

S3 0 1 ON ON ON OFF
A A
S4/S5 0 0 OFF OFF OFF OFF

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
DDR4_+1.2VSUS (TPS51486)
Date: Monday, November 04, 2019 Sheet 38 of 47
5 4 3 2 1
 5 4 3 2 1

39
+VCCST +VIN 25,36,37,38,40,41,42,43,44
+VCCIN 5

+VCCST 4,5,13,16,36
+5V_S5 16,24,29,33,35,37,38,40,42,43,44
C-[10/15] PR200 PU4 +3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,40,41,42,43,44
*short_4 +5V_S5
shortpad
PR207 PR172
6.2_5%_6 2.2_5%_6
RT3612_VCC 10 22 RT3612_VIN
VCC VIN

PR205 PR204 PR206 PR203 PC200 PC61 PC191 C-[10/15]

100_1%_2 *75_1%_2 45.3_1%_2 *10K_1%_2 0.1u/6.3V_2 4.7u/6.3V_4 0.22u/25V_4 +VIN
delet PJ9
D D
RT3612EBGQW-03 C-[10/15]

*15u/25V_3528H1.9
VR_SVID_DATA PR186

10u/25V_8

10u/25V_8

10u/25V_8

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
*10u/25V_8
VR_SVID_ALERT#
0603->0402

PC197

PC189

PC177

PC181

PC174

PC190

PC173
2.2_5%_6
VR_SVID_CLK RT3612_PVCC 29

PC180
+
H_PROCHOT# PVCC

3
4
9
PQ20
PC58 AOE6936 D1
2.2u/10V_4
PR170
1_5%_6 DCR=1.1m-ohm+/-7%
26 RT3612_UG1 RT3612_UG1_R 1 G1
UGATE1
D2/S1 5 PL7 +VCCIN
25 RT3612_BOOT1 PC55 2 S1/D2 6 0.24uH/28A_7x7x3 Isat=35A
BOOT1 0.1u/25V_4 7 RT3612_PHASE1

22u/6.3V_6
Don't Connect Pin2 to Phase

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
RT3612_PHASE1

PC52

PC50
27

PC162

PC203

PC201
+VREF06_RT3612 PHASE1 PR165 PR164
+VREF06_RT3612 PR57 PR173 *Short_2 *Short_2
3.9_5%_4 28 RT3612_LG1 8 G2 *2.2_5%_6
VREF_RC 12 LGATE1
VREF06 S2 SN_VCORE1
ISEN1P

10
PC60 PC188 ISEN1N
PR208 PR201 PR199 PR178 0.47u/6.3V_4 *2200p/25V_2
52.3K_1%_2 9.31K_1%_2 22.1K_1%_2 10K_1%_2

Close to Phase1 Mosfet +VIN

SET1_1 SET2_1 SET3_1 TSEN_1
PR160

10u/25V_8

10u/25V_8

10u/25V_8

2200p/50V_4
*10u/25V_8

0.1u/25V_4

0.1u/25V_4
2 1

PC196

PC204

PC207

PC202

PC193

PC182

PC205
C-[10/15]

3
4
9
C PR209 PR202 PR194 PR181 PQ21 C
0402->0201
110_1%_2 182_1%_2 200_1%_2 348_1%_2 100K_NTC_4_1% AOE6936 D1
For temp level adjust
PR187
PINSET_TSEN PR47 PR52 RT3612_TSEN 21 1_5%_6 DCR=1.1m-ohm+/-7% Recommand output cap:
10_1%_2 110K_1%_2 TSEN 32 RT3612_UG2 RT3612_UG2_R 1 G1 a. 1pcs 330uF/2.5V_9m cap
RT3612_SET1 8 UGATE2 b. 13pcs 22uF/6.3V MLCC includ EE side
SET1 D2/S1 5 PL8 c. Reserve 4pcs 22uF/6.3V MLCC
RT3612_SET2 7 1 RT3612_BOOT2 PC59 2 S1/D2 6 0.24uH/28A_7x7x3
SET2 BOOT2 Isat=35A
0.1u/25V_4 7 RT3612_PHASE2
RT3612_SET3 6

22u/6.3V_6
Don't Connect Pin2 to Phase

330u/2.5V_7343H1.9
*330u/2.5V_7343H1.9

*330u/2.5V_7343H1.9

*330u/2.5V_7343H1.9
SET3 31 RT3612_PHASE2

PC54

PC166
C-[10/15]
0402->0201 PHASE2

PC164

PC163

PC165
PR183 PR182 + + + +

Vinafix.com
PR179 *Short_2 *Short_2
PR196 PR198 PR197 PR177 30 RT3612_LG2 8 G2 *2.2_5%_6
15K_1%_2 8.06K_1%_2 20K_1%_2 40.2K_1%_2 LGATE2
S2 SN_VCORE2
SET1_2 SET2_2 SET3_2 TSEN_2

10
PC194
*2200p/25V_2
PR189 PR193 PR192 PR180
348_1%_2 60.4_1%_2 301_1%_2 402_1%_2

PR174 PR171
2.43K_1%_4 3.32K_1%_4
20 RT3612_ISEN1P ISEN1P_1 ISEN1P
ISEN1P

PR49 PR48 PC51

PR55 680_1%_2 3.83K_1%_4 0.1u/25V_4
10K_1%_2 19 RT3612_ISEN1N ISEN1N
+3V C-[10/15]
ISEN1N +VCC_CORE
B
PR53
shortpad
*Short_2 RT3612_VR_READY 24
C-[10/15] PC186
0.1u/25V_4
ICE-L U42 Performance (15W) B

4,13 IMVP_PWRGD VR_READY 0402->0201

PR60 *Short_2 RT3612_VRHOT 2 PR176 PR175
4,14,34,36 H_PROCHOT# VRHOT 2.43K_1%_4 3.32K_1%_4 TDC：39A
5 VR_SVID_CLK
PR63 *Short_2 RT3612_VCLK 5
VCLK ISEN2P
17 RT3612_ISEN2P ISEN2P_1 ISEN2P ICCMAX：70A
5 VR_SVID_DATA PR62 *Short_2 RT3612_VDIO 4 LL=2m
VDIO
PR61 *Short_2 RT3612_ALERT# 3
PR50
680_1%_2
PR51
3.83K_1%_4
PC49
0.1u/25V_4
VBOOT= 1.8V
5 VR_SVID_ALERT# ALERT RT3612_ISEN2N
18 ISEN2N
PR46 *Short_2 RT3612_VRON 23 ISEN2N
34 VRON VRON
C-[10/15] PC187
*0.1u/6.3V_2
PC192

0402->0201 0.1u/25V_4
PC195
(1) RT3612EB : PSYS = 1.6V *100p/50V_4
(2) Double Check PMON Setting
with charger PR195 14 RT3612_VSEN
*Short_2 VSEN
LL/IMON Compesation C-[10/15]
RT3612_PSYS 9 PR159
36 PMON PSYS RT3612_COMP
0402->0201
15 PC56 82p/50V_4 PC53 330p/50V_4 100_1%_2
COMP PR184
C-[10/15] +VCCIN
0402->0201 *Short_2
PR188 PC199 PR56 21.5K_1%_4 PR54 10K_1%_4
VCCSENSE 5
*10K_1%_2 *0.1u/6.3V_2
Close to Phase1 VSSSENSE 5
+VREF06_RT3612 Inductor RT3612_FB
16 PC57 PR185
PR58 FB *100p/50V_4 *Short_2
PR161
15.8K_1%_4 PR162
PR191 IMONCPU_1 2 1 NTC1N_R RT3612_IMON 11 13 RT3612_RGND 100_1%_2
A IMON RGND C-[10/15] A
6.49K_1%_4 0402->0201
100K_NTC_4_1% 33
EPAD PC198
*100p/50V_4
PR190
17.4K_1%_4

Quanta Computer Inc.

PROJECT :
Size Document Number Rev
3A
CPU VR IC (RT3612EBGQW-03)
Date: Monday, November 04, 2019 Sheet 39 of 47
5 4 3 2 1
 5 4 3 2 1

+3V_S5

C-[10/15]
shortpad
PR211
*short_4
+VIN 25,36,37,38,39,41,42,43,44
+VCCIN_AUX 14

+5V_S5 16,24,29,33,35,37,38,39,42,43,44
+3V_S5 2,6,8,10,11,13,14,15,16,28,29,30,33,34,37,41
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,41,42,43,44
40
D D

PR218 PR217
100K_1%_2 100K_1%_2
+VIN
+VIN_VCCIN_AUX
VCCAUX_VID0 VCCAUX_VID1 PR220 PJ10
2.2_5%_6 *short3720
RT6543_VSYS

2200p/50V_4
10u/25V_8

10u/25V_8

10u/25V_8

*10u/25V_8

0.1u/25V_4

0.1u/25V_4
+VCCIN_AUX

PC222

PC223

PC216

PC215

PC232

PC230

PC228
PR212 PR219 C-[10/15]
*100K_1%_2 *100K_1%_2 PC211 PR223 shortpad ICL U42 (15W)
OCP~38A@LMOS=5.2m 0.1u/25V_4 *100K_1%_6
TDC：14A
PU10 PQ24 ICCMAX：32A

20

5
PR224 RT6543AGQW AONS36380
340K_1%_4 D LL=0

VSYS
RT6543_CS_DSI 1
CS_DIS G VBOOT=1.8V
11 RT6543_UG PR228 4
UGATE 1_5%_6 S
PR216 PC214 Recommand output cap：

1
2
3
C 5.1_1%_6 10 RT6543_BOOT a. 1pcs 330uF_2.5V_9m cap +VCCIN_AUX C
RT6543_VCC 15 BOOT PL9 b. 4pcs 22uF/6.3V MLCC includ EE side
+5V_S5 PVCC c. Reserve 4pcs 22uF/6.3V MLCC
PC210 0.1u/25V_4 0.22uH/23A_7x7x3
RT6543_PH

330u/2.5V_7343H1.9
1u/6.3V_4 12
16 PH
VCC Isat=41A

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
+3V PR225 10K_1%_2 DCR=2.1m-ohm+/-7%

5
RT6543_LG

PC208

PC212

PC219

PC218
PC64
13 PQ22 PR210 +
TP78 AUX_PWRGD PR227 *Short_2 RT6543_PG 4 LGATE AON6354 *2.2_5%_6 PC231
PGOOD
D
G 0.1u/16V_4

Vinafix.com
14 4
PR221 *Short_2 RT6543_VID1 17 PGND S
14,16 VCCAUX_VID1 VID1
C-[10/15]

1
2
3
RT6543_VID0 RT6543_ISP

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
14,16 VCCAUX_VID0 PR222 *Short_2 18 2 PC206 6.3V->16V
VID0 ISENSEP

PC179

PC176
PC63

PC65
C-[10/15] C-[10/15] *2200p/25V_2
shortpad shortpad
PR213 *10K_1%_4 RT6543_EN 19 3 RT6543_ISN PR226
14,16,34,38 SUSON EN ISENSEN *short_4 PR233 C-[10/15]
Double Check LMOS(max)=5.2m *short_4 shortpad +VCCIN_AUX
EN Sequence PR215 *Short_2 PC209 8 RT6543_VOUT
with HW 16,34 +1V_S5_ON *0.1u/16V_4 VOUT
C-[10/15]
shortpad PC213 PC220
PR214 *0_5%_2 5 RT6543_COMP PR229 PR235 PR241 C-[10/15]
16,34,37,38,41 MAINON COMP
B 10K_1%_4 *1.4K_1%_4 100_1%_2 shortpad B
RT6543_FSWSEL 9 2200p/50V_4 *470p/50V_4 PR243
+5V_S5 FSWSEL 6 *Short_2
PR66 FB PC217 PR231
VCC_AUX_SENSE 14
100K_1%_4 27p/50V_4 6.34K_1%_4
AGND

PR65 7
RGND RT6543_FB VSS_AUX_SENSE 14
100K_1%_4 PC62
*0.1u/25V_4 PR242
PR240 *Short_2
21

100_1%_2 C-[10/15]
RT6543_RGND shortpad

A A

Quanta Computer Inc.

PROJECT :
Size Document Number Rev
3A
VCCIN_AUX IC (RT6543AGQW)
Date: Monday, November 04, 2019 Sheet 40 of 47
5 4 3 2 1
 5 4 3 2 1

41
+3V_S5 2,6,8,10,11,13,14,15,16,28,29,30,33,34,37,40 +VIN 25,36,37,38,39,40,42,43,44
+1.8V_S5 14,29,34,44 +5V 25,26,27,30,32,35,37
+1.8V 26,29
+1.5V 26
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,42,43,44
VL 37

+1.8V_S5
D 1.8Volt +/- 5% D

TDC : 3A
PEAK : 4A
Width : 120mil +1.5V
1.5Volt +/- 5%
Double check PU high with HW Double check PU high with HW +3V_S5
TDC : 0.39A
+1.8V_S5 +1.8V_S5
+3V +3V PC257
PEAK : 0.52A
PC75 PR79 4.7u/6.3V_4 Width : 20mil
*2200p/50V_6 *2.2_5%_6
PJ3
*short3720 +1.5V
PR101 PU5 PR102 PU14

4
100K_1%_2 PL3 *100K_1%_2 JW5222RSOTB_TRPBF PL12
1uH/3.35A_2.5x2.0x1.2 2.2uH/1.67A_2.5x2.0x1.2

VIN
PR91 5213PG_1.8V 2 6 5213LX_1.8V MAIND 2 PQ10 34 HWPG_1.5V PR109 5 3 G5719LX1.5V
34 HWPG_1.8VS5 *Short_2 POK SW 5213FB_1.8V_S AOSS32334C *Short_2 POK SW
PR95 *Short_2

22u/6.3V_6

22u/6.3V_6
0.1u/6.3V_2

*22u/6.3V_6
3 5 PR272

PC95

PC97

PC83

PC84
+3V_S5

1
VIN NC PR116 1 2 *Short_2

10u/6.3V_6

10u/6.3V_6

0.1u/16V_4
16,34,37,38,40 MAINON EN GND
PC100 PR103

PC259

PC107

PC260
1 5213FB_1.8V *22p/50V_4 20K_1%_2 *short_4

FB
10u/6.3V_4
0.01u/50V_4

C FB +1.8V C
4 PC104
PC89

PC85

8 PGND R1 0.47u/6.3V_4 PC102

C-[10/15]

6
9 SGND 7 5213EN_1.8V *22p/50V_4
EPAD EN 0402->0201 TDC : 0.3A
R2
*0.1u/6.3V_2

PEAK : 0.4A
PC94

JW5213DFND_TRPBF PR104
10K_1%_4 Vo=0.6*(R1+R2)/R2 Width : 20mil R1
=1.8V

Vinafix.com
PR106
R2 22.6K_1%_4
PR105
15K_1%_2
Vo=(0.6(R1+R2)/R2)
PR94 *Short_2
C-[10/15] =1.504V
S5_ON 34,37 0402->0201

Thermal protection PR126 Change to

220 ohm for bo bo
sound issue.

B (1) Need fine tune +VIN +3V +5V +1.8V +VIN B

PR262
150_5%_4
for thermal protect point
VL (2) Note placement position PR64 PR232 PR256 PR238 PR67
1M_5%_6 *22_5%_8 *220_5%_8 22_5%_8 1M_5%_6
PC255 TEMP=80C
0.1u/16V_4
MAINON_ON_G MAIND
5

PQ7
PR269 *Short_2 DDTC144EUA-7-F
VCC

3
3 SYS_SHDN#
OT SYS_SHDN# 4,34,37

3
PR73
PU13 MAINON 2 1M_5%_6 2 2 2 2
PR263 TMP708AIDBVR PC68
32.4K_1%_4 PQ23 PQ28 PQ25 PQ8 2200p/50V_4
1 PR59 *2N7002K *2N7002K 2N7002K 2N7002K

1
1
SET
HYST

*100K_1%_6
GND

ZAV:Stuff
Rset(Kohm)=0.0012T*T-0.9308T+96.147
2

=29.4K ohm HYST=VCC for 10

degree Hys.
HYST=GND for 30
A degree Hys. A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
3A
+1.8V_S5/+1.5V/Thermal Protect
Date: Monday, November 04, 2019 Sheet 41 of 47
5 4 3 2 1
 5 4 3 2 1

VGPU_CORE
PR143
PU2 EV@RT8813DGQW

PR135
C-[10/15]
0805->0603
+VIN
42
EV@1_5%_6 EV@1_5%_6
+VIN 25,36,37,38,39,40,41,43,44 8813UGATE1_1
8813PVCC 21 2 8813UGATE1

EV@2200p/50V_4
[email protected]/25V_4
*EV@10u/25V_8
+VGPU_CORE 19 +5V_S5 PVCC UGATE1

EV@10u/25V_6

EV@10u/25V_6
+5V_S5 16,24,29,33,35,37,38,39,40,43,44 +

PC13

PC5

PC4

PC124

PC127
+1V8_AON 19,21,22,44

3
4
9
PC25 PC134
D +1V8_GFX_MAIN 19,20,21,44 D1 D
[email protected]/10V_4 *EV@15u/25V_3528H1.9
GPU_CHOKE_THERMAL 34,42 Fsw: 300KHz C-[10/15]
PR16 PR21 PC23 0603->0402
EV@1_5%_6 EV@499K_1%_4 [email protected]/25V_4 +VGPU_CORE
8813TON 9 1 8813BOOT1 1 G1
+VIN TON BOOT1 PL4
D2/S1 5 [email protected]/23A_7x7x3
PC19 24 8813PHASE1 PQ14 2 S1/D2 6 8813PHASE1
PR17 PHASE1
EV@1u/25V_4 EV@AOE6936 7 Isat=40A
C-[10/15] DCR(MAX)=2.8mohm

EV@470u/2V_7343H1.9

EV@470u/2V_7343H1.9
+1V8_GFX_MAIN
+ +

PC9
PC135
*short_4 0603->0402 Don't Connect Pin2 to Phase PR10
*[email protected]_5%_6 PC144
PD1 EV@22U/6.3V_6
*EV@RB500V-40 PR29 *Short_2 8813PG 16 23 8813LGAT1 8 G2 C-[10/15]
1 2 20,44 GPU_PWR_GD PGOOD LGATE1
0805->0603
PR32 EV@10K_1%_2 PR134 S2
+3V
[email protected]_1%_4 PC17

10
PR11 *EV@2200p/50V_4
*EV@1K_1%_4
8813EN 3 15 8813ISEN1
22,44 1V8_MAIN_EN EN VCC/ISEN1
Rds(on)=3mohm(MAX) +VIN
PR31 +5V_S5
PC20 PC29 EV@10K_1%_4
[email protected]/10V_4 *[email protected]/10V_4

EV@10u/25V_8

EV@10u/25V_8

[email protected]/25V_4
*EV@10u/25V_8
3
4
9
17 8813UGATE2 8813UGATE2_1
PR13 UGATE2 D1

PC153

PC152

PC154

PC149
8813PSI 4 PR33 PC148
22 DGPU_PSI PSI
C *short_4 EV@1_5%_6 EV@2200p/50V_4 C
PR22 *Short_2 +VGPU_CORE
22 PWM-VID 5 1 G1
PR14 8813VID C-[10/15]
*EV@12K_1%_4 PR20 *Short_2 VID PC28 0603->0402 PL5
TP1 [email protected]/25V_4 D2/S1 5 [email protected]/23A_7x7x3
+1V8_AON
18 8813BOOT2 PQ16 2 S1/D2 6 8813PHASE2

EV@470u/2V_7343H1.9
BOOT2 EV@AOE6936 7
8813VREF
Isat=40A
PR15
*EV@10K_1%_4 19 8813PHASE2 PR27
DCR(MAX)=2.8mohm +

PC150
VREF=2V Don't Connect Pin2 to Phase
8813VREF 8 PHASE2 *[email protected]_5%_6 PC141
VREF EV@22U/6.3V_6
R2 8 G2 C-[10/15]

Vinafix.com
PR140 PC21
[email protected]_1%_4
R1 [email protected]/16V_4 S2
0805->0603
PR139 20 8813LGAT2 PC30

10
[email protected]_1%_4 LGATE2 *EV@2200p/50V_4
8813REFADJ 6
EV@4700p/25V_4

RT8813DGQW REFADJ PR30

*EV@0_5%_2
Rds(on)=3mohm(MAX)
PC146

PSI Mode C R3 PR137 N17S-G3

[email protected]_1%_4 14 8813ISEN2 C-[10/15]
TALERT/ISEN2 GPU_CHOKE_THERMAL 34,42
0402->0201
1 Phase DCM PR28
0V ~ 0.4V 8813REFIN 7 EV@100_1%_2
REFIN OpenVreg Config : Type2+
EV@1500p/50V_4

+VGPU_CORE
11
PC22

1 Phase CCM 8813VOUT1

0.8V ~ 1V PR138 VSNS PC27 Vboot : 0.8V
R4 [email protected]_1%_4 PR26 *Short_2
PC26 VGA_VCCSENSE 19
EV@56p/50V_4 *EV@100p/50V_4 PR24 *Short_2
B VGA_VSSSENSE 19 EDP-C:28.6A B

2 /3Phase CCM 10 8813RGN

1.4V-5.5V PR136 RGND PC24 routing in parallel
EDP-P:60.3A
R5 EV@309_1%_4 PR23
EV@100_1%_2 OCP:85A
EV@56p/50V_4 C-[10/15]
0402->0201
FSW:300KHz
PC147
12 8813ILIM *EV@56p/50V_4
SS
8813VREF
PR144 [email protected]_1%_4 OCP=85A
N17S-G2-A1(25W/GDDR5) N17S-G5
22 PR25 *Short_2
PR142 PWM3 =MX250
EV@10K_1%_2
OpenVreg Config : Type2+ OpenVreg Config : Type2+
13 25
TSNS/ISEN3 GND Vboot : 0.8V Vboot : 0.8V
NV17 Config : Type2+
N17S-G0-A1(25W/GDDR5) EDP-C:28.6A EDP-C:35A
1

R1 6.19K PR133 =MX230 EDP-P:60.3A EDP-P:69.6A

20.5K
100K_NTC_4_1% OCP:85A OCP:85A
R2 OpenVreg Config : Type2+
FSW:300KHz FSW:300KHz
2

A
4.32K
Vboot : 0.8V A

R3

R4 16.5K EDP-C:27.8A
0.309K
EDP-P:42A Quanta Computer Inc.
R5
OCP:85A
4.7nF
PROJECT : ZAUI
C FSW:300KHz Size Document Number Rev
3A
+NVVDD (RT8813DGQW)
Date: Monday, November 04, 2019 Sheet 42 of 47
5 4 3 2 1
 5 4 3 2 1

+VIN 25,36,37,38,39,40,41,42,44
+1.35V_GFX 20,23
N17S-G0-A1(25W/GDDR5)
43
+5V_S5 16,24,29,33,35,37,38,39,40,42,44
+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,44

Fsw=550KHz PC185 =MX230

D
1.35V_GFX G5335-TON-2
PR168
EV@100K_1%_4
*[email protected]/50V_4
+VIN
N17S-G2-A1(25W/GDDR5)
=MX250
D

EV@2200p/50V_4
*[email protected]/25V_4
C-[10/15]
0805->0603
N17S-G3 N17S-G5

PC47

PC48
PU9
7 8 PC184

TON
+5V_S5 PR155 NC V+#1 9 EV@10u/25V_6
EV@10_5%_6 V+#2 22
G5335-VCC-2 21
VCC
V+#3
V+#4
24 EDP-C:5.8A EDP-C:7.1A
Double check PU high with HW
+3V
PC170 EDP-P:7.4A EDP-P:7.6A
EV@10u/6.3V_6

PR154 PC171
[email protected]_5%_6 [email protected]/25V_4 +1.35V_GFX
20 G5335-BST-2
PR158 BST
EV@100K_1%_2 PR157
*Short_2 10 PL6 PJ8
C 1
G5335-PWRGD-2 LX#2 11 [email protected]/15.5A_7x7x3 *short3720 C
22 HWPG_1.35VGFX PGOOD LX#3 16 G5335-LX-2
+5V_S5 PR43 LX#4 17
LX#5 Isat=25A

EV@22u/6.3V_6

EV@22u/6.3V_6

[email protected]/16V_4
*EV@0_5%_2 18 PR41 *Short_2

*EV@22u/6.3V_6
G5335-PFM-2 3 LX#6 25 PR156 DCR(typ)=5mohm
PFM LX#1

PC169

PC44

PC42

PC43
*[email protected]_5%_6
G5335-AGND-2 12 PC183
G5335-EN-2 2 PGND#1 13 *EV@1000p/50V_4

Vinafix.com
PR44 EN PGND#2 14
*Short_2 PGND#3 15
Pulse-Skipping Mode PGND#4 19 PC172 PR167
PGND#5 4 *EV@680p/50V_6 [email protected]_1%_4
AGND G5335-AGND-2

EV@22u/6.3V_6

EV@22u/6.3V_6

EV@22u/6.3V_6

*EV@22u/6.3V_6
C-[10/15]
0402->0201
R1

PC168

PC45

PC46

PC167
PR163 [email protected]_5%_2
20 FBVDDQ_EN
G5335-SS-2 23 5 G5335-FB-2
PR166 *EV@0_5%_4 SS FB
44 1.03_GFX_PGD R2
B EV@G5335QT2U B
PC178 PC175 PR169
[email protected]/10V_4 [email protected]/6.3V_2 [email protected]_1%_2
PR45 Vo=0.8*(R1+R2)/R2 C-[10/15]

G5335-AGND-2 G5335-AGND-2
=1.357V 0402->0201

*Short_4 G5335-AGND-2

G5335-AGND-2 VFB=0.8V
+1.35V_GFX +5V_S5

w w w . t e k n i s i - i n d o n e s i a . c o m
PR39 PR40
EV@22_5%_8 EV@100K_1%_4
3

2
3

A C-[10/15] A
PQ5 0402->0201 2 G5335-EN-2
EV@2N7002K PR42
EV@1M_5%_2
Quanta Computer Inc.
1

PQ6
PROJECT : ZAUI
1

EV@DMG1012T-7
Size Document Number Rev
3A
+FBVDDQ_MEM (G5335QT2U)
Date: Monday, November 04, 2019 Sheet 43 of 47
5 4 3 2 1
 1 2 3 4 5 6 7 8

+3V 2,6,9,10,11,12,13,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,41,42,43
+1.8V_S5 14,29,34,41

44
+1V8_GFX_MAIN 19,20,21,42
+1V8_AON 19,21,22,42
+5VPCU 24,26,37 +1.8V_S5 +1.8V_S5
+VIN 25,36,37,38,39,40,41,42,43
+1.2VSUS 3,5,16,17,18,38
+1.03_GFX 19
+5V_S5 16,24,29,33,35,37,38,39,40,42,43
PC38 PC37
EV@1u/25V_4 EV@1u/25V_4
A +1V8_GFX_MAIN +1V8_AON A

N17S-G0 N17S-G0

7
N17S-G2 PR34 1V8_AON_S PR35 N17S-G2

VIN1#1

VIN1#2

VIN2#1

VIN2#2
*Short_8 *Short_8

+1.8V_MAIN 13
+1.8V_AON
TDC : 0.9A PC31 PC32 14 VOUT1#1 8 PC36 PC35 TDC : 0.75A
PEAK : 1.2A EV@10u/6.3V_6 [email protected]/16V_4 VOUT1#2 OUT2#1 9 [email protected]/16V_4 EV@10u/6.3V_6 PEAK : 1A
OUT2#2
Width : 40mil Width : 40mil
PU3
+5VPCU PR37 4 11
PC40 VBIAS GND#1
15
*Short_0402 GND#2
PR38
[email protected]/16V_4
3 5
ON1 ON2 DGPU_PWR_EN 6,20

CT1

CT2
*Short_0402
PR36
22,42 1V8_MAIN_EN EV@JW7110DFNC_TRPBF PC41

12

10
*Short_0402 [email protected]/16V_4

PC39
*EV@820p/50V_4 PC33 PC34
EV@1000p/50V_4 EV@1000p/50V_4
B B

+VIN +1V8_GFX_MAIN +1.2VSUS N17S-G0 +1.03_GFX

N17S-G2
PR1 PR5 +1V
EV@1M_5%_6 EV@22_5%_8 PJ7
TDC : 0.9A

Vinafix.com
*short3720
PQ19 PEAK : 1.1A
PQ1 +1V8_MAIN_EN_G EV@AON7408 Width : 40mil
3

EV@LTC044EUBFS8TL
3

S
1V8_MAIN_EN
3

2 5 2
2 1

[email protected]/16V_4

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

[email protected]/16V_4
PQ2 +5V_S5

G
PC159

PC160

PC157

PC155

PC156
EV@2N7002KW
1

PR4 PR3
1

4
*EV@100K_1%_6 EV@1M_5%_6 PR141
[email protected]_5%_8

9336DRV
PR145
+3V EV@100K_1%_2
C-[10/15]

3
Double check PU high with HW 0402->0201
C 2 C
PQ17 PQ18
+1V8_AON PR151 EV@2N7002K EV@DMG1012T-7

3
EV@10K_1%_4

1
PD7 2
EV@1SS355 PR146
PR148 1 2 EV@1M_5%_2
EV@10K_1%_2 C-[10/15]

1
PU8 0402->0201
PR147 EV@G9336ADJTP1U PQ15
*Short_0201 PR152 PC161 EV@2N7002K

3
43 1.03_GFX_PGD 3 EV@47_1%_4 [email protected]/50V_4
PGD 6 2
4 DRV
20,42 GPU_PWR_GD EN PR149
PR153 EV@133_1%_4

1
*Short_0402 1 5 9336ADJ
GND

+5VPCU VCC ADJ +1.03_GFX

PC158 R1
*[email protected]/16V_4 PC151 PR150
2

[email protected]/16V_4 R2 EV@124_1%_4

N17S : Vo=(1+R1/R2)*0.5=1.03V

D D

R1 R2
Quanta Computer Inc.
N17S 133 ohm 124 ohm PROJECT : ZAUI
Size Document Number Rev
3A
+1.8V_AON/+1V_GFX (AOZ1331DI)
Date: Monday, November 04, 2019 Sheet 44 of 47
1 2 3 4 5 6 7 8
 5 4 3 2 1

HOLE14
*h-tic157bc276d150p2
HOLE19
*h-tic157bc276d150p2
HOLE17
*h-tic157bc276d150p2
HOLE10 HOLE15 HOLE12
EV@H-C256I186D102P2 EV@H-C256I186D102P2 *SPAD-RE138X197
HOLE20
*h-c75d75n
45 HOLE8
D
Hole *H-DAVIDOFF-3
7
8
6
5
D

9 4

1
HOLE21

1
2
3
h-davidoff-1

HOLE1
HOLE9 HOLE3 HOLE4 HOLE6 HOLE7 HOLE5 *spad-davidoff-1
*h-c98d98n *h-s157d157n *spad-c315np *spad-c354np *spad-c354np *spad-re209x315np
1

WiFi Nut

1
1

1
C C

HOLE22 HOLE11 HOLE23 HOLE18

HOLE16 *hg-c354i274d220p2 *hg-o335x315d252x232p2 *H-DAVIDOFF-1-1 *HG-C276D126P2
*hg-c354i158d118p2 7 6 7 6 7 6 7 6
7 6 8 5 8 5 8 5 8 5
8 5 9 4 9 4 9 4 9 4
9 4
1
2
Vinafix.com
3

1
2
3

1
2
3

1
2
3
1
2
3

B B
HOLE2 HOLE13
*h-c98d98n *h-s157d157n
1

A
Quanta Computer Inc. A

PROJECT : ZAUI
Size Document Number Rev
3A
Hole
Date: Monday, November 04, 2019 Sheet 45 of 47
5 4 3 2 1
 1
USB 3.0 port*1 with USB Charger USB 3.0 port*2, USB2.0*1 : 2.5A
TDC : 8A TypeC*1 : 3A
+5VPCU PEAK : 5.5A
+5V_S5 TDC : 0.98A

VA
BQ24780SRUYR
PU12
+VIN
SYS_SHDN#
RT6258CGQUF
PU15
S5_ON
JW7110DFNC_TRPBF
PU6
PANEL_LED_EN
TPS51486RJER
PU1 p38
+2.5V_SUS
MAIND
46
+5V PEAK : 4.7A Realtek ALC255 : 1A
p37 SATA HDD & ODD*1pcs : 2.5A
p37
MAINON
BAT-V

VL
D
p36 D

Touch Pad
WIFI
TDC : 6A +3V_S5 PEAK : 7A EC
+3VPCU
S5_ON JW7110DFNC_TRPBF DDR4_SUSON_2V5
PU7
RT6256BGQUF TDC : 2.48A
PU11 JW5213DFND_TRPBF +1.8V_S5 AO3404
MAINON
+3V +1.8V PEAK : 0.4A
SYS_SHDN# p37 PEAK : 4.36A S5_ON PU5 p41 MAIND PQ10 p41
p37 NGFF SSD *1pcs : 2A

AO3404 +1V8_GFX_MAIN TDC : 0.9A

3V_LDO EC 1V8_MAIN_EN PU3 p44

+1V8_AON TDC : 0.75A

DGPU_PWR_EN

JW5222RSOTB_TRPBF
MAINON PU14 p41 +1.5V TDC : 0.39A

TDC : 7.2A
C
+1.2VSUS C
G9336ADJTP1U
GPU_PWR_GD PU9003
+1.03_GFX TDC : 0.9A
p46
S3/MAINON TPS51486RJER
S5/SUSON_R PU1 TDC : 0.45A
+VDDQ_VTT
+2.5V_SUS TDC : 0.98A

+VDDQ TDC : 0.38A

p38

VRON
RT3612EBGQW-03
PU4,PQ20 Vinafix.com+VCCIN Icc Max：70A

p39

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Vinafix.com
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G5335QT2U
FBVDDQ_EN PU9 +1.35V_GFX EDP-P:7.6A Quanta Computer Inc.
p43 PROJECT : ZAUI
Size Document Number Rev
Power Tree 3A
Date: Monday, November 04, 2019 Sheet 46 of 47
1
 5 4 3 2 1

Stage
A
Date
10/31 1. change HDD redriver net name page 32
2.DEVSLP2 unstuff R551 page 12
CHANGE LIST
47
3.Change Q9 (PCIE_CLKREQ_VGA#) design follow ZAAR page 19

11/01 1. change VGA VMA_CLK1# VMA_CLK0# VMA_CLK0 VMA_CLK1 80.6 ohm page 23

11/05 1.DGPU_PROCHOT_EC# PU 10K follow ZAAR page 22

2. PR9026 and PR9031 LAYOUT should be place at power side page 44
D D
11/12 1.remove FAN2_RPM no used page 34
2.remove RP1 and RP2 no used page 30

11/13 1.Add C6618 , C6621, C6620, C6619,C6622,C6623 page 30

11/19 1.Add R735 and R25371 for codec R255 page 26

11/22 2.R294 unstuff for DDR

2. Add HOLE20 and HOLE21 page 47 for ME

3. PR9267 stuff for POWER

12/18 1. stuff R558 R560 , unstuff R557 R561 for touch pad
C
2.R68 short pad and C3 unstuff and SW1 unstuff for cost down

12/28 1.Mount PR9085 by 0 ohm and Del PR9012 for POWER

2. Add Board_ID6 for BIOS

1/04 1.Unstuff R220 R221 R222 C248 for cost down

1/07 1.PU EC_TYPEC_EN_R 10K for TYPE-C SPEC

2.remove UFP# PU +3VPCU for TYPE-C SPEC

01/17 1. Add net name CNV_RGI_DT_R and CNV_BRI_DT_R for layout constrain
C
MP C

01/21 1.25810_POL# change to PU 1.8V and remove 25810_POL# PU 3V_S5 for type-c SPEC

02/01 1. Add R25513 , R25514 for A3 and A5 TPC for bom option

02/19 1.change R25517 and R25518 to 0201 for layout

2. Unstuff CN38 and CN24 no used for cost down

02/21 1.R215 unstuff for leakage current

2.Add R25519 (2.2_5%_6) for Leason Learn

02/25 1.change R25500 Value toTPC@ , change R25499 Value to TPC_N@ for BOM option

02/26 1.R951 change to 45.3K.follow ZAU

Vinafix.com
2.HDMI EMI Res unstuff.for for cost down
3.R212 unstuff , R213stuff for leakage issue
4.R98 unstuff for leakage issue
5.R77,R78,R80 short pad for cost
6. Reserve R25520 SERIRQ +3V_S5 Pull high 10K. for Leakage issue
7.change R25485 value to GS_N@ for BOM option
8.R378 unstuff EC push pull this pin for leakage issue

1.Add C20001 C20002 , R25521 , R25522 , D13091 , D13092 for lesson learn
03/05
2.R663 R662 unstuff intel SPEC no require
3.Update it unstuff D33 , stuff D34 for keyboard ESD
4.unstuff R25436 because Bios internal PU so for cost down
5. unstuff R378 & R212 & R94 & R98 & R134 for leakage current

B B

1. change R507 to 11.3k for HDMI redriver

03/06
2. stuff R748/R749 and un-stuff R746/R74 for HDMI equalizer setting

03/12 1.change PR3021 to 32.4K for thermal temp

2.Unstuff PR6416 because already PU at EC side
3.Remove D61 , short R25523 for cost down
4.change R507 10.5K for HDMI setting

06/13 1.change R25321 from short pad to 0 ohm

06/26 1.Update on board RAM table add samsung 8GB

A A

Quanta Computer Inc.

PROJECT : ZAUI
Size Document Number Rev
Change List_1 3A

Date: Monday, November 04, 2019 Sheet 47 of 47

5 4 3 2 1