GHANA TECHNOLOGY UNIVERSITY COLLEGE

FACULTY OF COMPUTING AND INFORMATION SYSTEM

DIGITAL COMPUTER DESIGN - IT 232

END OF SECOND SEMESTER EXAMINATION / TAKE HOME EXAMINATION

NAME:

INDEX NUMBER:

PROGRAM:
LEVEL:
SESSION:
CAMPUS:
Examiner’s Name: Appiah Kubi

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 ANSWER ALL QUESTIONS
1. A coin-operated cold drink dispenser will provide cold drink (D) under the following conditions:
 The correct coin (C) is inserted AND
 A paper cup is in position (P) AND
 The selector is set t Orange (O) OR Sprite (S) OR Lemonade (L)

i. Write the Boolean expression for the output of the dispenser.

ii. Represent the operation of the dispenser in logic circuit
SOLUTION:
i) Boolean expression  Cold Drink(D) = Correct Coin(C) AND Paper Cup(P) AND Orange(O)
OR Sprite(S) OR Lemonade(L)

D = (C.P) . (O+S+L)
ii)

2. Construct logic circuit diagram for the following Boolean Expression by using the basic gates
a. A.B+(A.B).(B.C+B.C) (5 marks)
 AB+ (AB).(BC)
 AB.(1 + BC)
 AB

b. (A+B).(A+C).(A+B) (5 marks)

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  (A+B)(A+C)  (Distributive Law)
 A + BC

3. Prepare a truth table for the Boolean function f(X,Y,Z) = XZ+Y (10 marks)
SOLUTION:
f(X,Y,Z) = XZ+Y
x yz 00 01 11 10
0 0 0 1 1
1 0 1 1 1

SOP = xyz + xyz + xyz + xyz + xyz

x y z xz xz + y
0 0 0 0 0
0 0 1 0 0
0 1 0 0 1
0 1 1 0 1
1 0 0 0 0
1 0 1 1 1
1 1 0 0 1
1 1 1 1 1

4. a. Write the ASCII – 7 coding for the word GIRL in both binary and hexadecimal notations.(8 marks)
SOLUTION:

ASCII DECIMAL HEX VALUE BINARY

G 71 47 01000111
I 73 49 01001001
R 82 52 01010010
L 76 4C 01001100

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 a. How many bytes are required to store this word using this coding? (2 marks)
SOLUTION:
The number of bytes required to store the word “GIRL” is 4 bytes

5. Using K-map, simplify the Boolean function f(A,B,C)= II(0,1,8,9,10,12,13) and draw logic diagrams for
the simplified expression by using; (4 marks)

f(A,B,C)= II(0,1,8,9,10,12,13)
 f(A,B,C,D)= Σ(2,3,4,5,6,7,11,14,15)
2 = 0010
3 = 0011
4 = 0100
5 = 0101
6 = 0110
7 = 0111
11 = 1011
14 = 1110
15 = 1111

Karnaugh map:
AB CD 00 01 11 10
00 0 0 1 1

01 1 1 1 1  AB+AC+BC+ACD
11 0 0 1 1

10 0 0 1 0

a. AND-OR-NOT gates (3 marks)

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 b. NOR gates only (3 marks)
SOLUTION:
POS Expression = (A’+C).(B+C).(A’+B+D)

6. Which type of logic will be preferred in designing dynamic CMOS gates? P –logic gate or N –logic gate.
Why? (10 marks)
SOLUTION:
N-logic blocks are normally used to implement dynamic CMOS logic. Only in case of single phase clock
one has to use alternately P-logic blocks and N-logic blocks alternately.
The NMos logic is superior to the PMOS logic as the NMOS transistor is better than the PMOS transistor.
The major advantage comes from the electron mobility is much greater than the hole mobility. un= 2.5
up.
Therefore the nNOS transistors are much faster than the PMOS transistor which is very required for
performing the logic operation. In addition there are two types of NMOS transistors: the enhancement
and depletion where for the PMOS transistor there is only the enhancement type.
In fact the MOS transistor logic has evolved from the PMOS, then the NMOS, and finally the CMOS.
With the introduction of the CMOS, one could reduce the static power consumption especially on the pull
down state. That is both the pull up and pull down transistors are acting as switches.

N-logic blocks are normally used to implement dynamic CMOS logic. Only in case of single phase clock
one has to use alternately P-logic blocks and N-logic blocks alternately. The NMos logic is superior to the
PMOS logic as the NMOS transistor is better than the PMOS transistor.

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7. What are the most recent advances and standard performance metric in performance analysis on
convolutional encoder based on FPGA? (10 marks)
SOLUTION:
Forward Error Correction (FEC) schemes square measure a necessary a part of wireless communication
systems. The number of symbols inside the availability encoded message is enlarged in a passing
controlled manner thus on facilitate a pair of basic demands at the receiver one is Error detection and
alternative is Error correction. In telecommunication and data theory, forward error correction (FEC)
(also referred to as channel coding]) may be a system of error management for knowledge transmission,
whereby the sender adds consistently generated redundant knowledge to its messages, additionally
referred to as associate error-correcting code (ECC). In digital electronic systems, data is painted in
binary format (1's and 0's).

When binary data is passed from one purpose to a different, there's continually some likelihood that a
slip-up are often made; a one understood as a zero or a 0 taken to be a 1. This can be caused by media
defects, electronic noise, component failures, poor connections, deterioration due to age, and other
factors. When a bit is mistakenly interpreted, a bit error has occurred. Error correction is the process of
detecting bit errors and correcting them and can be done in software or hardware. For high data rates,
error correction must be done in special-purpose hardware because software is too slow.

A group of bits in a computer has conventionally been referred to as a "word.” Each bit can be thought of
as one of two "letters,” 0 or 1. Error correcting systems add extra or "redundant" letters to computer
words. The extra letters (bits) add a certain structure to each word. If that structure is altered by errors, the
changes can be detected and corrected.

8. What will be the output of the following logic gate? Use the result to prepare a truth table.

a.

(10 marks)

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 SOLUTION:

The output of the logic gate would be  ((A·C) + (A·B)) + ((C+D)·(B·D))

Truth Table for the results

A B C D A.B AC BD C+D AC+AB (C+D).BD (AC+AB) + ((C+D). BD)
0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1 0 0 0
0 0 1 0 0 0 0 1 0 0 0
0 0 1 1 0 0 0 1 0 0 0
0 1 0 0 0 0 0 0 0 0 0
0 1 0 1 0 0 1 1 0 1 1
0 1 1 0 0 0 0 1 0 0 0
0 1 1 1 0 0 1 1 0 1 1
1 0 0 0 0 0 0 0 0 0 0
1 0 0 1 0 0 0 1 0 0 0
1 0 1 0 0 1 0 1 1 0 1
1 0 1 1 0 1 0 1 1 0 1
1 1 0 0 1 0 0 0 1 0 1
1 1 0 1 1 0 1 1 1 1 1
1 1 1 0 1 1 0 1 1 0 1
1 1 1 1 1 1 1 1 1 1 1

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 9. Explain the functionality of the circuit in Fig B4 using truth table. Write a Boolean expression for X.

Fig. B4 (10 Marks)

SOLUTION:

A M C X
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1

-The first AND gate produces = A.M

-The second AND gate produces=M.C
-The third AND gate produces=A.C
-The fourth AND gate produces=A.M.C
-The first OR gate produces = M+M.C
-The second OR gate produces= A.M + A.C +A.M.C
-The third OR gate produces= A.M + A.C +A.M.C +M+MC
Let’s deduce the Boolean expression:

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 A.M + A.C +A.M.C +M+MC
=A.M + A.C +A.M.C +M
=A.M +M +A.C +A.M.C
= M + AC +A.M.C
=M + AC (1+ M) since anything+ 1= 1
= M+ AC
The final expression is M+A.C

10. Fig. B5 is logic circuit for a warning system for a greenhouse. Once the gardener or caretaker has
switched the system on, he wants to be warned by the following conditions:
i. if the greenhouse gets too cold or
ii. if someone has opened the door.

Fig B5

Use the figure to answer the flowing questions:

i. Verify using truth table the conditions that may trigger a warning light.
ii. Develop a Boolean expression for the system in fig B5 (10 marks)

SOLUTION:
i. Verify using the truth table the conditions that may trigger a warning light
System off
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1
When the system is off, it implies that C = 0.
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So, (A+B).C
A+B C (A+B).C
0 0 0
1 0 0
1 0 0
1 0 0

Conclusion: When the system is off, none of the conditions can trigger warning light.
System on
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1

When the system is on, it is implies that C=1.

(A+B).C
A+B C (A+B).C
0 1 0
1 1 1
1 1 1
1 1 1

From the above truth table we can easily deduce the conditions that may trigger warning light
-Case 1:
A=0; B=1; C=1;
So:
-Door closed (1) (when it passes through the NOT gate, it becomes 0)
-Temperature cold (0) (when it passes through the NOT gate, it becomes 1)
=> Door closed + Temperature cold + system on= warning light.
-Case 2:
A= 1; B= 0; C=1;
So:
-Door open (0) (when it passes through the NOT gate, it becomes 1)
-Temperature hot (1) (when it passes through the NOT gate, it becomes 0)
=> Door open + temperature hot + system on= warning light.
-Case 3:
A=1; B=1; C=1;
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So:
-Door open (0) (when it passes the NOT gate, it becomes 1)
-Temperature cold (0) (when it passes the NOT gate it becomes 1)
=> Door open + Temperature cold + system on= warning light.
ii. Develop a Boolean expression for the system in fig
Let’s develop a Boolean expression for the system above:
The Boolean expression could be: [(A’+B)+(A+B’)+(A+B)].C

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