T Type Control Final
T Type Control Final
https://doi.org/10.1007/s40313-023-00992-9
Abstract
In this research, a practical solution is proposed to enhance the performance of the single-phase DC/AC converter, which is
usually used as an interface between the renewable energy source and the power grid in residential applications. In order to
meet the strict requirements of the grid code, various solutions have been applied. In detail, the multilevel T-type topology
is employed to further reduce the distortion of the output current. In control design, adaptive sliding mode control designed
in discrete-time domain is adopted to enhance the robustness of the inner current control-loop against parameter variations.
For the dc bus voltage control loop, multiple objectives such as negligible overshoot and limited inrush current during the
startup process, and reduced voltage oscillation with the sudden change of the transferred power, can be fulfilled by using
state-machine programming and Fuzzy-PI controller. The effectiveness of the proposed solution is verified by numerical
simulations where all control algorithms are implemented in C-language. This technique guarantees consistency between
simulations and practical implementations based on digital platforms.
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variation in voltage and frequency range, harmonic currents By considering all the above-mentioned issues, various
(order-h) limits, maximum current total harmonic distortion solutions have been proposed in this research to improve the
(THD), DC current injection (Tsili & Papathanassiou, 2009), performance of the single-phase grid-tied converter. First,
must be met by each of grid-connected converters. Remark- adaptive sliding mode control (ASMC) is adopted for the
able efforts focusing on control design have been carried out inductor current control loop. This approach not only gives
to assure that those grid-connected converters can meet the a quick transient response but also removes the chattering
grid-code requirements (Zeb et al., 2018). Conventionally, phenomenon since the switching control action is not nec-
the two cascaded loops control system is usually adopted, essary. In addition, the controller is also robust against the
including an outer DC bus voltage-loop, and an inner current- tolerance of inductance during operation caused by tempera-
loop. Particularly, the current controller design attracts great ture variation. Second, a combined solution where fuzzy-PI,
attention since it has a decisive influence on the transient and state-machine techniques are employed to guarantee that
response as well as the THD of the grid-connected cur- the overshoot of the DC-bus voltage during start-up is neg-
rent. Most commercial devices use voltage-oriented control ligible, the inrush current is restricted, whilst the transient
(VOC), where a synchronous rotating reference frame and response caused by load-variation in normal operation is
conventional PI are utilized. This approach is simple and improved. The validity of the proposed solution is confirmed
straightforward in control design as well as parameter tuning. by numerical simulations in which all control algorithms are
However, limited bandwidth and coupling between the direct implemented by standard C-language. This technique is very
and quadrature current are the main issues of this method. In important since it guarantees consistency between simula-
(Wang et al., 2014; Silwal et al., 2019; Guo & Guerrero, tions and practical implementations.
2016), the proportional-resonant (PR) controller designed in
static reference frame αβ is discussed. By utilizing the high
gain at its resonance frequency, this method not only can 2 System Description
minimize the coupling effect but also can improve the THD
of the output current by using PR with multiple resonant fre- The typical topology of a T-type converter used in PV
quencies (Elkayam & Kuperman, 2019). Even though, the applications is shown in Fig. 1, which consists of IGBT
use of a second-order generalized integrator (SOGI) (Song switches and a boost reactor. With the pulse width modu-
et al., 2016) as a coordinate transformation may cause a neg- lation (PWM) technique, the converter can be treated as an
ative effect on the dynamic of the control system. Sliding ideal voltage source. This means the system can be described
mode control (SMC) with excellent tracking performance, by:
appears to be a promising candidate to solve the problems of
the grid current control loop. With superior fast dynamic, the di L (t)
L = u s (t) − R L i L (t) − mUdc (1)
SMC can be designed to track the alternating (AC) current dt
directly (Linh & Phuong, 2021; Binh et al., 2020). Hence, dVdc (t)
a coordinate transformation can be neglected. Nevertheless, C = mi L (t) − i o (t) (2)
dt
practical issues such as modeling error, parameter variation,
and especially the chattering effect of SMC itself must be in which, u s (t), i L (t) and i o (t) are line voltage, inductor
taken into account in control design (Hao et al., 2013; Komur- current, and DC load current, respectively; −1 ≤ m ≤ 1 is
cugil et al., 2016). For single-phase grid-tie converters, the the modulation index; C = CC11+C C2
2
, and L are the DC-link
THD of the output current is strongly affected by the second capacitor and output inductor.
harmonic ripple across the DC bus. Because the reference A discrete-time version of (1) and (2) is derived by apply-
of the grid-tie current is computed by the DC bus voltage ing Forward-Euler with sampling time Ts , and results in:
regulator, properly designed for this outer-loop control also
plays a very important role (Li et al., 2017). Otherwise, the RL Ts Ts
i L,k+1 = 1− Ts i L,k + u s,k − Vdc,k m k (3)
generated current may be polluted by this second-order har- L L L
monic. Besides, inrush current limit and voltage oscillation
mTs Ts
are also problems needed to be solved to extend the life- Vdc,k+1 = Vdc,k + i L,k − i o,k (4)
C C
time of DC-link capacitors. Another issue of the neural point
clamp (NPC)-based topologies is the unbalance problems Based on (3) and (4), a fully digital controller is designed
between the dc link capacitors. This issue has been consid- to satisfy the strict requirements of a grid-connected con-
ered in another research of us (Linh & Phuong, 2021), and verter.
hence is not going to be discussed in this paper in detail.
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Journal of Control, Automation and Electrical Systems
in which, vg (t) = Vg cos(ωt) is the grid voltage, vinv (t) is where ek can be calculated by:
the voltage generated by the inverter. The phasor diagram of
the system as cos ϕ = ±1 is shown in Fig. 2. ∗
ek = i Lk − i Lk (7)
As cos ϕ = ±1, the current generated by the inverter
always aligns with the grid voltage, i.e., i L (t) = I Ld cos(ωt) Then, by solving the following equation, the equivalent con-
with cos ϕ = 1 and i L (t) = I Ld cos(ωt + π ) with cos ϕ = trol signal which maintains the Sk on the sliding manifold
−1. Thus, by using a phase-lock-loop (PLL) to get the infor- can be found.
mation from the grid side, i.e., cos(ωt), then the reference
for the current controller is in fact the amplitude I Ld of the Sk+1 = 0 (8)
grid-connected current. Consequently, the block diagram of
the control system is as in Fig. 3, which consists of a PLL to By considering (7) in one step-ahead and substituting it into
synchronize with the grid, a DC-bus voltage regulator, and an (8), it gives
inner current controller. In addition, a notch filter is used to
∗
extract the average dc voltage (Vdc Filter) from the double- i L,k+1 − i L,k+1 − λek = 0 (9)
frequency oscillation hidden in its measurement (Vdc Fb).
The design procedure of each controller is going to be clari- Now, substitute (3) into (9), a simple manipulation yields
fied in the next subsections.
L ∗ R
m k,eq = − i L,k+1 − 1 − Ts i L,k
3.1 Inductor Current Controller Ts Vdc,k L
(10)
L Ts
It can be said that the inductor current control loop plays a − − u s,k − λek
Ts Vdc,k L
key role in improving the performance of the grid-connected
converters. With a high accuracy and quick response current where −1 ≤ m k,eq ≤ 1 is an equivalent control signal.
controller, the power transfer between the renewable energy Practically, (10) cannot eliminate the tracking error due to
source and the grid can be achieved quickly and smoothly. the inevitable modeling error. Hence, an additional switching
Which results in a low THD inductor current whilst the fluc- control action is often used. Following that is the existence
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Journal of Control, Automation and Electrical Systems
of the chattering phenomenon. Besides, the amplitude of the The right-hand side of (11) can be rewritten in details as
switching control signal must be designed based on the upper
bound of the perturbation which is normally unknown, also. ∗ ∗ RL
i L,k+1 − λi L,k = − Ts − 1 + λ i L,k
Hence, adaptive sliding mode control (ASMC) which can L
(12)
effectively deal with the parameter variation is employed in Ts
+ u s,k − Vdc,k m k
this situation. To design the ASMC, rewrite (9) as follows L
In order to apply the adaptive control design, (12) is trans-
∗ ∗
i L,k+1 − λi L,k = i L,k+1 − λi L,k (11) ferred into vector form as following
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Journal of Control, Automation and Electrical Systems
∗ ∗
i L,k+1 − λi L,k = kT θ0 (13) N
k−1
T
k−1
2
k
(b) lim 2
<∞ (24)
N →∞ c + k−1
T
k=1 k−1
in which,
N
T (c) lim ||θ̂k − θ̂k−1 ||2 < ∞ (25)
θ0 = RL
Ts − 1 + λ Ts
(14) N →∞
L L k=1
kT = −i L,k u s,k − Vdc,k m k (15)
N
(d) lim ||θ̂k − θ̂k−i ||2 < ∞ (26)
N →∞
k=n
If we could choose a control signal m k such that (13) is ful-
filled, it is obvious that the tracking error would be identically (e) lim ||θ̂k − θ̂k−i || = 0 (27)
k→∞
zero. In this situation, since θ0 is unknown, an estimation of
θ0 , i.e., θ̂k generated by an adaptive algorithm is used instead. where i is a finite positive integer.
Consequently, an adaptive control law can be obtained by
solving the following equivalence equation 3.3 Stability Analysis of the Current Control-Loop
∗ ∗
i L,k+1 − λi L,k = kT θ̂k (16) By considering (6), (13) and (17), a simple manipulation
gives:
Define k as:
Sk =k−1
T
θ̂k−1 − k−1
T
θ0
(28)
k = i L,k − λi L,k−1 − k−1
T
θ̂k−1 (17) =− k
Then by using the projection algorithm (Goodwin & Sin, Substituting (28) into (23) and squaring both sides, it yields
1984), it results in
Sk2
lim =0 (29)
αk−1 k→∞ c + k−1 k−1
T
θ̂k = θ̂k−1 + k (18)
c + k−1 Pk−1 k−1
T
To guarantee that the system is stable and the tracking error
with θ̂0 given; 0 < α ≤ 2, c > 0 are two constants, and approaches zero asymptotically, we must prove that ||k−1 ||
is bounded.
T Suppose that the original SMC can stabilize the control
θ̂k = θ̂1,k θ̂2,k (19) system by (10), which means there always exists constants
0 < ai < ∞; (i = 1, 2) such that the following relation
Based on (16), (18), and (19), the adaptive control law between the modulation index m and the output current i L :
applied to the power converter is
m k−1 ≤ a1 + a2 max|i L,τ − λi L,τ −1 |
1 ∗ ∗ (30)
mk = −i L,k θ̂1,k + θ̂2,k u s,k − i L,k+1 + λi L,k 1 ≤ k ≤ N; 1 ≤ τ ≤ N
Vdc,k θ̂2,k
(20) Based on (30), ||k−1 || can be rewritten as
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Journal of Control, Automation and Electrical Systems
A < 4 u 2s,k + Vdc,k
2 a2
1 3.4 DC Bus Voltage Control
2 2 2 2
+ 4 i L,k + Vdc,k a2 max|i L,τ − λi L,τ −1 | (34) Suppose that there are no losses in the AC inductances and
the converter, the variation of the magnetic energy is ignored,
It should be noted that as well as the proposed ASMC is perfect to guarantee that
cos ϕ = ±1, the variation of the DC side capacitor energy
|i L,τ − λi L,τ −1 | < |i L,τ | + λ|i L,τ −1 | can be expressed by
→max|i L,τ − λi L,τ −1 | < 2max|i L,τ |
2 (t)
2 2 1 dVdc
→ max|i L,τ − λi L,τ −1 | < 4 max|i L,τ | (35) C = Pac (t) − Pdc (t) (41)
2 dt
Then, it can be derived from (34) and (35) that Define Req as the equivalent load of the DC bus, then the AC
power Pac and the DC power Pdc can be computed by
2
A < 4 u 2s,k + Vdc,k
2
a12 + 4 1 + 4Vdc,k
2
a22 max|i L,τ |
1
(36) Pac (t) = Vg I Ld (t)
2
(42)
V 2 (t)
Because the following conditions always hold in practice: Pdc = dc
Req
Vdc,k > 0, u s,k > 0
(37) 2 (t) by V (t),
Now, based on (41), (42), and substitute Vdc
0 < a1 < ∞, 0 < a2 < ∞
it yields
Then, the inequality (36) can be rewritten as 1 d V (t) 1 1
C =− V (t) + Vg I Ld (t) (43)
2 dt Req 2
√
A < 2 u s,k + Vdc,k a1 + 1 + 4Vdc,k
2 a2
2 max|i L,τ |
By applying Forward-Euler to (43), the discrete-time transfer
(38) function between the input I Ld,k and the output Vk can easily
be found as follows
Now, rewriting (6) in detail, it results in
Vg T s −1
Vk C z
∗ ∗ = (44)
− Sk = i L,k − λi L,k−1 − i L,k − λi L,k−1 I Ld,k 1− 1 − R2T s
z −1
eq C
∗ ∗
→ |Sk | ≥ |i L,k − λi L,k−1 | − |i L,k − λi L,k−1 |
∗ ∗
→ |i L,k − λi L,k−1 | ≤ |Sk | + |i L,k − λi L,k−1 | (39)
Theoretically, a simple proportional-integral (PI) controller
can be designed to stabilize the DC bus based on (44). The
→ max|i L,k − λi L,k−1 | ≤ 2max|i L,τ | ≤ |Sk | + a3
transfer function of the PI controller in the discrete-time
1 domain with sampling time Ts , proportional coefficient K P
→ max|i L,τ | ≤ (|Sk | + a3 )
2 and integral time constant TI is
with 0 < a3 < ∞.
1 − Dz −1
Substitute (39) into (38), it gives WP I = K P (45)
1 − z −1
√ with,
A < 2 u s,k + Vdc,k a1 + 1 + 4Vdc,k
2 a 2 max (|S | + a )
2 k 3
(40) Ts
D =1− (46)
TI
Based on (40) and the key technical lemma√ 6.2.1. in Goodwin
and Sin (1984), it can be concluded that A = ||k−1 || is The closed-loop transfer function of the DC bus voltage loop
bounded. Then Sk → 0, following that the tracking error with PI controller is
ek approaches zero asymptotically. It also follows from (22)
that the square of the tracking error is summable, and (27) b1 K P z −1 − b1 K P Dz −2
WC L =
shows that the estimated parameters are slow time-varying 1 + (b1 K P − a1 − 1) z −1 + (a1 − b1 K P D) z −2
as k → ∞. (47)
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Journal of Control, Automation and Electrical Systems
V T
where b1 = gC s and a1 = 1 − R2T s
eq C
are parameters of PI controller is activated. This proposed controller eliminates
(44). the tracking error at the end of the second phase instantly with
Once the closed-loop transfer function is established, the negligible overshoot, as well as minimizes the dc-bus voltage
parameters of the controller can be obtained by various oscillation caused by the variation of the equivalent load Req .
model-based control techniques, such as pole-placement, and The tuning rule applied to the PI controller is inspired by the
optimization. However, it should be noted that the equivalent pole-placement method as follows.
load Req is unknown in practice, although its bound can be Assume that Req is known, the integral time constant Ti
obtained based on the rated power Prated of the converter and should be chosen such that the zero of PI controller (45) and
the loss power P0 = η Prated , where η is the efficiency of the the pole of the control object (44) cancel each other. Which
converter. means
2 2 Req C
Vdc,rated Vdc,rated Ti = (52)
≤ Req ≤ (48) 2
Prated P0
Consequently, the closed-loop transfer function of the DC
The problem caused by the unknown Req can be solved voltage control system is order-reduced as follows
as follows. Practically, the operation of the converter can be
classified into three phases. Suppose that the system is in an Ts K p Vg −1
C z
idle state, which means all the dc-bus capacitors are empty. To WC L = Ts K p Vg −1
(53)
(1 − −1
z )+ C z
startup, the DC bus capacitor C is charged via a serial resistor
and the diode rectifier in the first phase. The inrush current
In this ideal case, the dynamic of the voltage loop is mainly
in this phase is restricted by an appropriate resistor, and this
decided by K p , i.e., the larger the K p , the faster the transient
simple approach is widely used in commercial devices.
response. However, Req changes with the transferred power
As the dc voltage reaches its natural stable value Vg , the
in practice. Therefore, it is impossible to achieve pole-zero
serial resistor is bypassed, and the system moves to the second
cancellation. On the other hand, choosing fixed Ti may sta-
phase where the controllers are activated to boost the voltage
bilize the control system, but the performance may not be
to its desired value. During this phase, the load is not allowed
satisfactory. For example, small Ti in the light-load condi-
to connect to the dc-bus, following that (44) can be regarded
tion may cause a large overshoot in the transient state, or
as a pure integrator. Using the PI controller in this phase may
large Ti yields a slow dynamic response to a sudden change
cause a large overshoot and fluctuation in the DC bus due to
of power transferred. Hence, a fuzzy-based PI controller is
the existence of the integral. Hence, a proportional controller
proposed in this case to adjust both parameters K p and Ti
is sufficient in this phase. The inrush current amplitude can
according to working conditions.
be limited by choosing the proportional gain K p as follows.
Inspiring by the pole-placement method, it can be seen
Assume that E v,max is the maximum error when the volt-
from (52) and (48) that the integral time constant should also
age control-loop is activated:
be bounded by
E v,max = V ∗ − Vm2 (49) 2 2
C Vdc,rated C Vdc,rated
≤ Ti ≤ (54)
Obviously, the inrush current is maximum at this instance. 2Prated 2P0
Since a proportional controller is employed, the maximum In steady-state, the main goal is to eliminate the tracking
∗
reference value I Ld,max can easily be computed by error. Hence, a small gain K P and large integral time Ti is
sufficient. In the transient state where a sudden change of
∗
I Ld,max = K p E v,max (50) transferred power occurs, large gain K p and small Ti should
be used to quickly suppress the fluctuation of the dc voltage.
As a results, the current used to boost the capacitor voltage The aforementioned discussion, in combination with restric-
is limited by selecting K p as tions (48) and (54), is formularized by Mamdani fuzzy rule
∗
with triangle membership function (MF) as follows
I Ld,max
Kp = (51)
E v,max rule 1: If |ek | is PZ Then K p is PZ and Ti is PH
rule 2: If |ek | is PS Then K p is PS and Ti is PL
With the proposed proportional controller, the dc-bus volt-
age reaches its set point asymptotically. And at the end of the rule 3: If |ek | is PM Then K p is PM and Ti is PM (55)
second phase when the tracking error is sufficiently small, the rule 4: If |ek | is PL Then K p is PL and Ti is PS
control system moves to the third phase where a fuzzy-based rule 5: If |ek | is PH Then K p is PH and Ti is PZ
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desired one instantly. Meanwhile, all the parameters quickly Table 2 Parameters of the LCL filter
converge as shown in Fig. 9. Element Value Element Value
The most important feature of any controller is robustness
against parameter variation, which shows its ability to be Vac 220 V r ms f res 5000 Hz
used in practice, Particularly for grid-connected converters, Li 1.5 mH Lg 0.11 mH
the inductance and DC bus capacitance are always decreased Cf 10 μF
after a long time of operation. The tolerance may be up
to 10% → 20%. Hence, simulation in the worst situation,
where both sudden changes of parameters and harmonics of LCL filter is designed (Reznik et al., 2014) and the results
line voltage occur simultaneously, is carried out to verify are provided in Table 2.
the robustness of the proposed control strategy. As shown in which, C f is the filter capacitor, L i and L g are inverter
in Fig. 10, the stability of the control system is guaranteed, side and grid side inductor, respectively.
although i L is distorted due to the inductance attenuation. The simulation results with output LCL filter are shown in
Since most of the output filter. With input constraints such Figs. 11 and 12, with initial inductance for the ASMC is half
that: current ripple i is below 5% of the rated current, reac- of the sum of L i + L g . It can be observed from Fig. 12 that
tive power exchange when the inverter is not operating is 5% with the designed LCL filter, the THD of the grid-connected
of the rated power, and the resonance frequency of the grid- current is improved, i.e., 3.41% in comparison with 5.25%.
side filter f res satisfies 10 f sw < f res < f2res , the standard The response of both the voltage and current controllers is
Injected current(A)
400 60
Line voltage(V)
Line voltage
output LCL filter 200 Injected current 30
0 0
-200 -30
-400 -60
0 0.1 0.2 0.3 0.4 0.5 0.6
Time(s)
Dc bus voltage(V)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Time(s)
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Journal of Control, Automation and Electrical Systems
Capacitor voltage(V)
205
150
200
195
100
0.424 0.426 0.428
50
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time(s)
similar to which getting from the configuration with the sim- Acknowledgements This research is funded by the Hanoi University of
ple L filter. This property can be explained based on the fact Science and Technology (HUST) under project number T2022-PC-005.
that a well-designed L g C f forms a low-pass filter that fil-
ters out the switching frequency. Thus, the impedance of the Declarations
filter capacitor at grid frequency is large, following that the
influences of the current flowing through the capacitor can Conflict of interest The author declares no conflict of interest.
be neglected. Whilst the parameters of the ASMC are con-
tinuously adjusted to minimize the tracking error. Hence, the
proposed ASMC can operate with both simple L and LC L
filters without any changes in the control design. Finally, References
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