MMA7260QT
MMA7260QT
YOUT
ZOUT
N/C
N/C
N/C
N/C
g-Select1
g-Select2
Clock X-Temp
Oscillator XOUT
Generator Comp
G-Cell Gain
Sleep Mode C to V Y-Temp
Sensor + YOUT
Converter Comp
Filter
VSS
MMA7260Q
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2 Freescale Semiconductor
Table 2. Operating Characteristics
Unless otherwise noted: –20°C < TA < 85°C, 2.2 V < VDD < 3.6 V, Acceleration = 0g, Loaded output(1)
Operating Range(2)
Supply Voltage(3) VDD 2.2 3.3 3.6 V
Supply Current IDD — 500 800 µA
Supply Current at Sleep Mode(4) IDD — 3.0 10 µA
Operating Temperature Range TA –20 — +85 °C
Acceleration Range, X-Axis, Y-Axis, Z-Axis
g-Select1 & 2: 00 gFS — ±1.5 — g
g-Select1 & 2: 10 gFS — ±2.0 — g
g-Select1 & 2: 01 gFS — ±4.0 — g
g-Select1 & 2: 11 gFS — ±6.0 — g
Output Signal
Zero g (TA = 25°C, VDD = 3.3 V)(5) VOFF 1.485 1.65 1.815 V
Zero g(4) VOFF, TA — ±2.0 — mg/°C
Sensitivity (TA = 25°C, VDD = 3.3 V)
1.5g S1.5g 740 800 860 mV/g
2g S2g 555 600 645 mV/g
4g S4g 277.5 300 322.5 mV/g
6g S6g 185 200 215 mV/g
Sensitivity(4) S,TA — ±0.03 — %/°C
Bandwidth Response
XY f-3dB — 350 — Hz
Z f-3dB — 150 — Hz
Noise
RMS (0.1 Hz – 1 kHz)(4) nRMS — 4.7 — mVrms
Power Spectral Density RMS (0.1 Hz – 1 kHz)(4) nPSD — 350 — µg/ Hz
Control Timing
Power-Up Response Time(6) tRESPONSE — 1.0 2.0 ms
Enable Response Time(7) tENABLE — 0.5 2.0 ms
Sensing Element Resonant Frequency
XY fGCELL — 6.0 — kHz
Z fGCELL — 3.4 — kHz
Internal Sampling Frequency fCLK — 11 — kHz
1. For a loaded output, the measurements are observed after an RC filter consisting of a 1.0 kΩ resistor and a 0.1 µF capacitor on VDD-GND.
2. These limits define the range of operation for which the part will meet specification.
3. Within the supply range of 2.2 and 3.6 V, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits the device
may operate as a linear device but is not guaranteed to be in calibration.
4. This value is measured with g-Select in 1.5g mode.
5. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the output
will increase above VDD/2. For negative acceleration, the output will decrease below VDD/2.
6. The response time between 10% of full scale Vdd input voltage and 90% of the final operating output voltage.
7. The response time between 10% of full scale Sleep Mode input voltage and 90% of the final operating output voltage.
8. A measure of the device’s ability to reject an acceleration applied 90° from the true axis of sensitivity.
MMA7260Q
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Freescale Semiconductor 3
PRINCIPLE OF OPERATION
The Freescale accelerometer is a surface-micromachined SPECIAL FEATURES
integrated-circuit accelerometer.
The device consists of two surface micromachined g-Select
capacitive sensing cells (g-cell) and a signal conditioning The g-Select feature allows for the selection among 4
ASIC contained in a single integrated circuit package. The sensitivities present in the device. Depending on the logic
sensing elements are sealed hermetically at the wafer level input placed on pins 1 and 2, the device internal gain will be
using a bulk micromachined cap wafer. changed allowing it to function with a 1.5g, 2g, 4g, or 6g
The g-cell is a mechanical structure formed from sensitivity (Table 3). This feature is ideal when a product has
semiconductor materials (polysilicon) using semiconductor applications requiring different sensitivities for optimum
processes (masking and etching). It can be modeled as a set performance. The sensitivity can be changed at anytime
of beams attached to a movable central mass that move during the operation of the product. The g-Select1 and
between fixed beams. The movable beams can be deflected g-Select2 pins can be left unconnected for applications
from their rest position by subjecting the system to an requiring only a 1.5g sensitivity as the device has an internal
acceleration (Figure 3). pull-down to keep it at that sensitivity (800mV/g).
As the beams attached to the central mass move, the
Table 3. g-Select pin Descriptions
distance from them to the fixed beams on one side will
increase by the same amount that the distance to the fixed g-Select2 g-Select1 g-Range Sensitivity
beams on the other side decreases. The change in distance 0 0 1.5g 800 mV/g
is a measure of acceleration.
The g-cell beams form two back-to-back capacitors 0 1 2g 600 mV/g
(Figure 3). As the center beam moves with acceleration, the 1 0 4g 300 mV/g
distance between the beams changes and each capacitor's
1 1 6g 200 mV/g
value will change, (C = Aε/D). Where A is the area of the
beam, ε is the dielectric constant, and D is the distance
between the beams.
Sleep Mode
The ASIC uses switched capacitor techniques to measure
the g-cell capacitors and extract the acceleration data from The 3 axis accelerometer provides a Sleep Mode that is
the difference between the two capacitors. The ASIC also ideal for battery operated products. When Sleep Mode is
signal conditions and filters (switched capacitor) the signal, active, the device outputs are turned off, providing significant
providing a high level output voltage that is ratiometric and reduction of operating current. A low input signal on pin 12
proportional to acceleration. (Sleep Mode) will place the device in this mode and reduce
the current to 3 µA typ. For lower power consumption, it is
recommended to set g-Select1 and g-Select2 to 1.5g mode.
Acceleration
By placing a high input signal on pin 12, the device will
resume to normal mode of operation.
Filtering
The 3 axis accelerometer contains onboard single-pole
switched capacitor filters. Because the filter is realized using
switched capacitor techniques, there is no requirement for
external passive components (resistors and capacitors) to set
the cut-off frequency.
MMA7260Q
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4 Freescale Semiconductor
BASIC CONNECTIONS
Top View
POWER SUPPLY
XOUT
YOUT
ZOUT
N/C
16 15 14 13
VDD
g-Select1 1 12 Sleep Mode VRH VDD
C C
VSS C
g-Select2 2 11 N/C VSS
Sleep Mode P0
VDD 3 10 N/C g-Select1
Microcontroller
P1
Accelerometer
VSS 4 9 N/C g-Select2 P2
XOUT R A/DIN
5 6 7 8
C
N/C
N/C
N/C
N/C
YOUT R A/DIN
Figure 4. Pinout Description C
ZOUT R A/DIN
Table 4. Pin Descriptions C
Pin No. Pin Name Description
1 g-Select1 Logic input pin to select g level. Figure 6. Recommended PCB Layout for Interfacing
2 g-Select2 Logic input pin to select g level. Accelerometer to Microcontroller
3 VDD Power Supply Input
4 VSS Power Supply Ground NOTES:
1. Use 0.1 µF capacitor on VDD to decouple the power
5-7 N/C No internal connection.
source. Do not exceed capacitor values of 2.2 or
Leave unconnected.
3.3 µF.
8 - 11 N/C Unused for factory trim.
Leave unconnected. 2. Physical coupling distance of the accelerometer to
the microcontroller should be minimal.
12 Sleep Mode Logic input pin to enable product or
Sleep Mode. 3. The flag underneath the package is internally
13 ZOUT Z direction output voltage. connected to ground. It is not recommended for the
flag to be soldered down.
14 YOUT Y direction output voltage.
4. Place a ground plane beneath the accelerometer to
15 XOUT X direction output voltage.
reduce noise, the ground plane should be attached to
16 N/C No internal connection. all of the open ended terminals shown in Figure 6.
Leave unconnected.
5. Use an RC filter with 1.0 kΩ and 0.1 µF on the
Logic
outputs of the accelerometer to minimize clock noise
Inputs (from the switched capacitor filter circuit).
1 13 1 kΩ
g-Select1 ZOUT 6. PCB layout of power and ground should not couple
power supply noise.
2 g-Select2 0.1 µF
VDD 7. Accelerometer and microcontroller should not be a
MMA7260QT high current path.
3 14 1 kΩ 8. A/D sampling rate and any external power supply
VDD YOUT
switching frequency should be selected such that
0.1 µF 0.1 µF they do not interfere with the internal accelerometer
4
sampling frequency (11 kHz for the sampling
VSS frequency). This will prevent aliasing errors.
1 kΩ
12 XOUT 15 9. PCB layout should not run traces or vias under the
Sleep Mode
Logic QFN part. This could lead to ground shorting to the
Input 0.1 µF
accelerometer flag.
Figure 5. Accelerometer with Recommended
Connection Diagram
MMA7260Q
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Freescale Semiconductor 5
DYNAMIC ACCELERATION
Top View
+Y Side View
16 15 14 13
1 12
2 11
Bottom
+X -X -Z +Z
Top
3 10
4 9
5 6 7 8
-Y
STATIC ACCELERATION
Side View
XOUT@ 0g = 1.65 V
YOUT @ -1g = 0.85 V XOUT @ 0g = 1.65 V
ZOUT@ 0g = 1.65 V YOUT @ 0g = 1.65 V
ZOUT@ +1g = 2.45 V
XOUT @ 0g = 1.65 V
YOUT @ +1g = 2.45 V
ZOUT@ 0g = 1.65 V
* When positioned as shown, the Earth’s gravity will result in a positive 1g output.
MMA7260Q
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6 Freescale Semiconductor
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the surface mount packages must be
the correct size to ensure proper solder connection interface 6.0
between the board and the package. 0.55
4.25
With the correct footprint, the packages will self-align when
subjected to a solder reflow process. It is always 12 9
recommended to design boards with a solder mask layer to
avoid bridging and shorting between solder pads.
13
8
The flag underneath the package is internally connected to
ground. It is not recommended for the flag to be soldered
6.0
1.00
down.
0.50
16
5
1 4 Flag
MMA7260Q
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Freescale Semiconductor 7
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 1622-02
ISSUE B
16-LEAD QFN
MMA7260Q
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8 Freescale Semiconductor
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 1622-02
ISSUE B
16-LEAD QFN
MMA7260Q
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Freescale Semiconductor 9
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 1622-02
ISSUE B
16-LEAD QFN
MMA7260Q
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10 Freescale Semiconductor
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MMA7260QT
Rev. 0
10/2006