IRF9383MPbF

DirectFET® P-Channel Power MOSFET ‚

Typical values (unless otherwise specified)
Applications
l Isolation Switch for Input Power or Battery Application VDSS VGS RDS(on) RDS(on)
l High Side Switch for Inverter Applications -30V max ±20V max 2.3mΩ@-10V 3.8mΩ@-4.5V
Qg tot Qgd Qgs2 Qrr Qoss Vgs(th)
Features and Benefits
67nC 29nC 9.4nC 315nC 59nC -1.8V
l Environmentaly Friendly Product
l RoHs Compliant Containing no Lead,
no Bromide and no Halogen
S
l Common-Drain P-Channel MOSFETs Provides G
D S D
High Level of Integration and Very Low RDS(on)

MX DirectFET™ ISOMETRIC

Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST MQ MX MT MP MC
Description
The IRF9383MTRPbF combines the latest HEXFET ® P-Channel Power MOSFET Silicon technology with the advanced DirectFET ®
packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET®
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.

Standard Pack
Orderable part number Package Type Note
Form Quantity
®
IRF9383MTRPbF DirectFET Medium Can Tape and Reel 4800
®
IRF9383MTR1PbF DirectFET Medium Can Tape and Reel 1000 "TR1" suffix EOL notice #264

Absolute Maximum Ratings

Parameter Max. Units
VDS Drain-to-Source Voltage -30
V
VGS Gate-to-Source Voltage ±20
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V e -22
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V e -17
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V f -160
A

IDM Pulsed Drain Current g -180

-VGS, Gate-to-Source Voltage (V)

12 14.0
ID = -22A ID= -18A
10 12.0 VDS= -24V
Typical RDS(on) (mΩ)

VDS= -15V
8 10.0
VDS= -6.0V
8.0
6
TJ = 125°C 6.0
4
4.0
2
T J = 25°C 2.0
0 0.0
2 4 6 8 10 12 14 16 18 20 0 20 40 60 80 100 120 140 160 180

-VGS, Gate -to -Source Voltage (V) QG Total Gate Charge (nC)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Notes:
 Click on this section to link to the appropriate technical paper. „ TC measured with thermocouple mounted to top (Drain) of part.
‚ Click on this section to link to the DirectFET® Website. Repetitive rating; pulse width limited by max. junction temperature.
ƒ Surface mounted on 1 in. square Cu board, steady state.

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Static @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
BVDSS Drain-to-Source Breakdown Voltage -30 ––– ––– V VGS = 0V, ID = -250μA
ΔΒVDSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.0159 ––– V/°C Reference to 25°C, ID = -1.0mA
RDS(on) Static Drain-to-Source On-Resistance ––– 2.3 2.9 VGS = -10V, ID = -22A h
––– 3.8 4.8
mΩ
VGS = -4.5V, ID = -18A h
VGS(th) Gate Threshold Voltage -1.3 -1.8 -2.4 V
VDS = VGS, ID = -150μA
ΔVGS(th)/ΔTJ Gate Threshold Voltage Coefficient ––– -5.9 ––– mV/°C
IDSS Drain-to-Source Leakage Current ––– ––– -1.0 VDS = -24V, VGS = 0V
μA
––– ––– -150 VDS = -24V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– -100 VGS = -20V
nA
Gate-to-Source Reverse Leakage ––– ––– 100 VGS = 20V
gfs Forward Transconductance 56 ––– ––– S VDS = -10V, ID = -18A
Qg Total Gate Charge ––– 130 ––– VDS = -15V, VGS = -10V, ID = -18A
Qg Total Gate Charge ––– 67 –––
Qgs1 Pre- Vth Gate-to-Source Charge ––– 12 ––– VDS = -15V
Qgs2 Post -Vth Gate-to-Source Charge ––– 9.4 ––– nC VGS = -4.5V
Qgd Gate-to-Drain Charge ––– 29 ––– ID = -18A
Qgodr Gate Charge Overdrive ––– 16.6 ––– See Fig.15
Qsw Switch charge (Qgs2 + Qgd) ––– 38.4 –––
Qoss Output Charge ––– 59 ––– nC VDS = -24V, VGS = 0V
RG Gate Resistance ––– 6.5 ––– Ω
td(on) Turn-On Delay Time ––– 29 ––– VDD = -15V, VGS = -4.5V h
tr Rise Time ––– 160 ––– ID = -18A
ns
td(off) Turn-Off Delay Time ––– 115 ––– RG = 1.8Ω
tf Fall Time ––– 110 ––– See Fig.17
Ciss Input Capacitance ––– 7305 ––– VGS = 0V
Coss Output Capacitance ––– 1780 ––– pF VDS = -15V
Crss Reverse Transfer Capacitance ––– 1030 ––– ƒ = 1.0KHz
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D
––– ––– -114
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– -180

(Body Diode) g p-n junction diode. S

VSD Diode Forward Voltage ––– ––– -1.2 V TJ = 25°C, IS = -18A, VGS = 0V h
trr Reverse Recovery Time ––– 52 78 ns TJ = 25°C, IF = -18A, ,VDD = -15V
Qrr Reverse Recovery Charge ––– 315 470 nC di/dt = 500A/μs h
Notes:
† Pulse width ≤ 400μs; duty cycle ≤ 2%.

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Absolute Maximum Ratings

Parameter Max. Units
PD @TA = 25°C e
Power Dissipation 2.1
PD @TA = 70°C e
Power Dissipation 1.3 W
PD @TC = 25°C f
Power Dissipation 113
TP Peak Soldering Temperature 270
TJ Operating Junction and -40 to + 150 °C
TSTG Storage Temperature Range

Thermal Resistance
Parameter Typ. Max. Units
RθJA e
Junction-to-Ambient ––– 60
RθJA i
Junction-to-Ambient 12.5 –––
RθJA j
Junction-to-Ambient 20 ––– °C/W
RθJC fk
Junction-to-Case , ––– 1.1
RθJ-PCB Junction-to-PCB Mounted 1.0 –––
Linear Derating Factore 0.02 W/°C

100
D = 0.50
10 0.20
0.10
Thermal Response ( Z thJA )

0.05
1 0.02
0.01
R1 R2 R3 R4
R1 R2 R3 R4 Ri (°C/W) τi (sec)
0.1 τJ τA 2.7194 0.0138004
τJ τA
τ1 τ2 τ3 τ4 23.1599 55.766563
τ1 τ2 τ3 τ4
0.01 10.2579 0.6520047
Ci= τi/Ri
Ci= τi/Ri 23.6469 7.7259631

0.001 SINGLE PULSE Notes:

( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 1000
t1 , Rectangular Pulse Duration (sec)

Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 

Notes:
‡ Used double sided cooling, mounting pad with large heatsink. ‰ Rθ is measured at TJ of approximately 90°C.
ˆ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.

‰ Mounted on minimum footprint full size

ƒ Surface mounted on 1 in. square Cu ‰ Mounted to a PCB with small board with metalized back and with small
board (still air). clip heatsink (still air) clip heatsink (still air)

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1000 1000
VGS VGS
TOP -10V TOP -10V
-5.0V -5.0V
-4.5V -4.5V
-I D, Drain-to-Source Current (A)

-ID, Drain-to-Source Current (A)

100 -3.5V -3.5V
-3.25V -3.25V
-3.0V -3.0V
-2.75V 100 -2.75V
BOTTOM -2.5V BOTTOM -2.5V
10

1
10
-2.5V
0.1 -2.5V
≤60μs PULSE WIDTH ≤60μs PULSE WIDTH
Tj = 25°C Tj = 150°C
0.01 1
0.1 1 10 100 0.1 1 10 100
-V DS, Drain-to-Source Voltage (V) -V DS, Drain-to-Source Voltage (V)

Fig 4. Typical Output Characteristics Fig 5. Typical Output Characteristics

1000 1.6
VDS = -15V ID = -22A
≤60μs PULSE WIDTH
-I D, Drain-to-Source Current (A)

1.4
Typical RDS(on) (Normalized)
V GS = -10V
V GS = -4.5V
100
1.2

1.0
10
T J = 150°C
0.8
T J = 25°C
T J = -40°C

1.0 0.6
1 2 3 4 5 -60 -40 -20 0 20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
-VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics Fig 7. Normalized On-Resistance vs. Temperature

100000 12
VGS = 0V, f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
T J = 25°C
C rss = C gd Vgs = -3.5V
C oss = C ds + C gd
10 Vgs = -4.5V
Vgs = -5.0V
Typical RDS(on) ( mΩ)
C, Capacitance(pF)

10000 Ciss Vgs = -6.0V

8 Vgs = -8.0V
Coss Vgs = -10V
Vgs = -12V
Crss 6 Vgs = -15V
1000

100 2
1 10 100 0 20 40 60 80 100 120 140 160 180
-VDS, Drain-to-Source Voltage (V)
-I D, Drain Current (A)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage

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1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

-I D, Drain-to-Source Current (A)

-I SD, Reverse Drain Current (A)

100 100μsec
100 1msec
T J = 150°C
T J = 25°C
10
T J = -40°C
10 10msec

1
DC
1
0.1
Tc = 25°C
Tj = 150°C
VGS = 0V Single Pulse
0 0.01
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.01 0.1 1 10 100
-VSD, Source-to-Drain Voltage (V) -V DS, Drain-to-Source Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage Fig 11. Maximum Safe Operating Area

25 2.6

-Typical VGS(th) Gate threshold Voltage (V)

2.4
20
2.2
-I D, Drain Current (A)

2.0
15
1.8 ID = -150μA
10 ID = -250μA
1.6
ID = -1.0mA
1.4 ID = -1.0A
5
1.2

0 1.0
25 50 75 100 125 150 -75 -50 -25 0 25 50 75 100 125 150

T C , Case Temperature (°C) T J , Temperature ( °C )

Fig 12. Maximum Drain Current vs. Case Temperature Fig 13. Typical Threshold Voltage vs. Junction
Temperature
2500
EAS , Single Pulse Avalanche Energy (mJ)

ID
TOP -1.6A
2000 -2.3A
BOTTOM -18A

1500

1000

500

0
25 50 75 100 125 150
Starting T J , Junction Temperature (°C)

Fig 14. Maximum Avalanche Energy vs. Drain Current

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Id
Vds

Vgs

L
VCC
DUT
0
Vgs(th)
1K
SS
20K

Qgodr Qgd Qgs2 Qgs1

Fig 17a. Gate Charge Test Circuit Fig 17b. Gate Charge Waveform

VDS L
I AS

RG D.U.T
VDD
IAS A
-V
-20V
GS DRIVER
tp 0.01Ω

tp
V(BR)DSS
15V

Fig 18a. Unclamped Inductive Test Circuit Fig 18b. Unclamped Inductive Waveforms

RD
VDS
td(on) tr t d(off) tf
VGS VGS
D.U.T.
RG
10%
-
+ V DD

-V GS
Pulse Width ≤ 1 µs
90%
Duty Factor ≤ 0.1 % VDS

Fig 19a. Switching Time Test Circuit Fig 19b. Switching Time Waveforms

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Driver Gate Drive

P.W.
D.U.T * + P.W.
Period D=
Period

ƒ *
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • di/dt controlled by RG V DD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - InductorCurent
Inductor Current
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* Reverse Polarity of D.U.T for P-Channel

* VGS = 5V for Logic Level Devices

Fig 20. Diode Reverse Recovery Test Circuit for P-Channel HEXFET® Power MOSFETs

DirectFET® Board Footprint, MX Outline

(Medium Size Can, X-Designation).
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®.
This includes all recommendations for stencil and substrate designs.

G=GATE
D=DRAIN
S=SOURCE

D D
S
G
S
D D

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 IRF9383MPbF
DirectFET® Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®. This includes
all recommendations for stencil and substrate designs.

DIMENSIONS
METRIC IMPERIAL
CODE MIN MAX MIN MAX
A 6.25 6.35 0.246 0.250
B 4.80 5.05 0.189 0.199
C 3.85 3.95 0.152 0.156
D 0.35 0.45 0.014 0.018
E 0.68 0.72 0.027 0.028
F 0.68 0.72 0.027 0.028
G 1.38 1.42 0.054 0.056
H 0.80 0.84 0.031 0.033
J 0.38 0.42 0.015 0.017
K 0.88 1.02 0.035 0.040
L 2.28 2.42 0.090 0.095
M 0.59 0.70 0.023 0.028
R 0.03 0.08 0.001 0.003
P 0.08 0.17 0.003 0.007

Dimensions are shown in

millimeters (inches)

DirectFET® Part Marking

GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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 IRF9383MPbF
DirectFET® Tape & Reel Dimension (Showing component orientation).

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. (ordered as IRF9383MTRPBF). For 1000 parts on 7"
reel, order IRF9383MTR1PBF

REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
METRIC IMPERIAL
CODE MIN MAX MIN MAX
A 330 N.C 12.992 N.C
B 20.2 N.C 0.795 N.C
C 12.8 13.2 0.504 0.520
D 1.5 N.C 0.059 N.C
E 100.0 N.C 3.937 N.C
F N.C 18.4 N.C 0.724
G 12.4 14.4 0.488 0.567
H 11.9 15.4 0.469 0.606

LOADED TAPE FEED DIRECTION

DIMENSIONS
METRIC IMPERIAL
NOTE: CONTROLLING
CODE MIN MAX MIN MAX
DIMENSIONS IN MM
A 7.90 8.10 0.311 0.319
B 3.90 4.10 0.154 0.161
C 11.90 12.30 0.469 0.484
D 5.45 5.55 0.215 0.219
E 5.10 5.30 0.201 0.209
F 6.50 6.70 0.256 0.264
G 1.50 N.C 0.059 N.C
H 1.50 1.60 0.059 0.063

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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 IRF9383MPbF

†
Qualification Information
Consumer ††
Qualification level
(per JEDEC JESD47F††† guidelines)
MSL1
Moisture Sensitivity Level DirectFET®
(per JEDEC J-STD-020D†††)
RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site

http://www.irf.com/product-info/reliability
†† Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
††† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comments
• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #264).
2/17/2014
• Updated data sheet with new IR corporate template.
2/25/2014 • Change MSL3 to MSL1, on page 9.
• Updated schematics from "N-Channel" to "P-Channel" on page 1.
6/2/2015
• Updated "IFX logo" on page 1 and page 10..

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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IMPORTANT NOTICE
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event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon WARNINGS
Technologies hereby disclaims any and all Due to technical requirements products may
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without limitation warranties of non-infringement the types in question please contact your nearest
of intellectual property rights of any third party. Infineon Technologies office.
In addition, any information given in this document Except as otherwise explicitly approved by Infineon
is subject to customer’s compliance with its Technologies in a written document signed by
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applicable legal requirements, norms and Technologies, Infineon Technologies’ products may
standards concerning customer’s products and any not be used in any applications where a failure of
use of the product of Infineon Technologies in the product or any consequences of the use thereof
customer’s applications. can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.