DLD Tamim 02
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oliketamimDLD Tamim 02
Uploaded by
oliketamimGreen University of Bangladesh
Department of Computer Science and Engineering
(CSE)
Faculty of Sciences and Engineering
Semester: (Fall, Year:2023), B.Sc. in CSE (Day)
Lab Report NO :02
Course Title: Digital Logic Design Lab
Course Code:CSE204 Section:D2
Lab Experiment Name: Implementing All Individual Gates with NAND & NOR.
Student Details
Name ID
1. Alik Ahmed Tamim 223002082
Lab Date : 18/10/2023
Submission Date : 24/10/2023
Course Teacher’s Name : Mr. Montaser Abdul Quader
Lab Report Status
Marks: ………………………………… Signature:.....................
Comments:.............................................. Date:..............................
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Experiment Name:
Implementing All Individual Gates with Universal Gates NAND & NOR.
Objective:
• To attain knowledge on the universal gates and how they work.
• To attain knowledge on how all individual gates can be implemented using universal
gates.
• To implement all individual gates using integrated circuits (IC’s) of NAND & NOR and
verify the truth tables. .
PROCEDURE:
NAND Gate:
The output is high when either of inputs A or B is high, or if neither is high. In other words,
it is normally high, going low only if both A and B are high.
NOR Gate:
A NOR gate (“not OR gate”) is a logic gate that produces a high output (1) only if all its
inputs are false, and low output (0) otherwise. Hence the NOR gate is the inverse of an OR
gate, and its circuit is produced by connecting an OR gate to a NOT gate. Just like an OR
gate, a NOR gate may have any number of input probes but only one output probe
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IMPLEMENTATION:
Complete implementation in Thinker Cad
NAND TO XOR:
NAND TO XNOR:
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NOR TO XOR
NOR TO XNOR
Discussion:
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• The IC Number needs to know the correct value. Which number IC is used for NAND
and NOR gate.
• 5 volts should be connected for the positive side and ground for negative.
• The IC should be properly seated on the Breadboard.
• Create a truth table and check if the correct value is found.
• Use LED light to verify Universal gate to XOR and XNOR.
• Equipment should be used carefully.
• How many inputs and output of NAND and NOR gate should be known. Only then
will we get the correct value.
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