Unit I

Digital computer: functional units and their

interconnections
contents
⚫Computer fundamental
● Cpu
● Memory
● I/O devices
⚫• Register Transfer Language

⚫• Register Transfer

⚫• Bus and Memory Transfers

⚫
Digital Computer
⚫It is a processing machine that process
the information in digital form i.e. (0’s &
1’s).
⚫Means digital computer can only
understand binary language (0’s & 1’s).
⚫If any analog quantity is to be processed,
they must be converted into digital form
before processing
Digital computer Process
⚫The block diagram of a digital computer
is shown below. Whatever may be the
type, size and capacity of the computer, it
should have these five blocks.

Input Processing Output

Digital Computer Functional Unit

Input Devices Storage Output Unit

Control Unit

ALU
Functional units of computer
⚫The computer consists of four main
parts. These are as follows:
(i) Central processing unit.
(ii) Memory
(iii) Input Devices
(iv) Output devices
CPU
⚫Central Processing Unit
The CPU is the place where computations are performed. It is the brain
and heart of a computer.
⚫ CPU interprets instruction and process data contained in computer
program.
⚫ CPU has two component
1. ALU ( Arithmetic & Logic Unit)
2. CU ( Control Unit )
The arithmetic logic unit (ALU) of the CPU performs the typical arithmetic
operations such as addition, subtraction, multiplication, and division.
Computers use the binary number system, to represent numbers. The
binary number system has only two digits 0 and 1.

Control Unit control all the operation in computer. It is the controller of the
system.
⚫ It also control all the devices connected to CPU.
⚫ It also control the flow of data from i/p devices to memory and memory
to o/p devices.
Memory
⚫Memory: Memory is the location where
data and programs are stored while being
processed by the CPU. Memory is the main
storage unit in a computer. Memory consists
of primary (main) memory and secondary
memory. The data stored in main memory
(RAM) is volatile and is erased as soon as
the power supply is cut off. Therefore,
secondary memory is used to store data. In
secondary memory (diskettes) data is stored
permanently.
Input Devices
⚫Input Devices: Input is the process of entering and
translating incoming data into machine readable form.
⚫Any hardware item which attached to the main unit
of a computer that houses the CPU is referred to as
peripheral
device.
⚫An input device is a peripheral device through which
data are entered and transformed into machine
readable form. Input devices are mainly used to
communicate information between humans and
computer. Example: Keyboard, Mouse.
Output devices
⚫Output Devices: An output device is a
peripheral device that allows a computer
to communicate information to humans
or another machine by accepting data
from the computer and transforming
them into a usable form. The output
devices gives the desired result to the
user. Example: Monitor, Printer etc.
BUS
BUS
⚫A group of wires connecting two or
more devices and providing a path to
perform communication is called bus.
⚫A bus that connect major computer
component such as ( CPU , Memory ,
I/O)
is called system bus
Bus
⚫A bus is a set of physical connections
(cables, printed circuits, etc.) which can be
shared by multiple hardware components in
order to communicate with one another.

⚫The purpose of buses is to reduce the

number of "pathways" needed for
communication between the components,
by carrying out all communications over a
single data channel. This is why the
metaphor of a "data highway" is sometimes
used.
Kinds of bus inside the System

There are three main bus groups or

System bus can be separated into
three functional group

● ADDRESS BUS

● DATA BUS

● CONTROL BUS
 Data Bus
• The Data Bus carries the data which is transferred
throughout the system.

Data Bus
• It is bi-directional.

• Examples of data transfers

– Program instructions being read from memory into MPU.
– Data being sent from MPU to I/O port
– Data being read from I/O port going to MPU
– Results from MPU sent to Memory

• These are called read and write operations

 Address Bus
• An address is a binary number that identifies a
specific memory storage location or I/O port
involved in a data transfer

• The Address Bus is used to transmit the

address of the location to the memory or the
I/O port. Address Bus

• The Address Bus is unidirectional (one way):

addresses are always issued by the MPU.
 Control Bus
• The Control Bus: is another group of signals
whose functions are to provide synchronization
(timing control) between the MPU and the
other system components.

• Control signals are unidirectional, and are

mainly outputs from the MPU.
Control Bus

• Example Control signals

– RD: read signal asserted to read data into MPU
– WR: write signal asserted to write data from MPU
Single Bus system
 Characteristics of a bus
⚫A bus is characterised by the amount of information that can
be transmitted at once. This amount, expressed in bits,
corresponds to the number of physical lines over which data
is sent simultaneously. A 32-wire ribbon cable can transmit
32 bits in parallel. The term "width" is used to refer to the
number of bits that a bus can transmit at once.

⚫ Additionally, the bus speed is also defined by its frequency

(expressed in Hertz), the number of data packets sent or
received per second. Each time that data is sent or received
is called a cycle.
Characteristics of Bus
⚫This way, it is possible to find the maximum
transfer speed of the bus, the amount of
data which it can transport per unit of time,
by multiplying its width by its frequency. A
bus with a width of 16 bits and a frequency
of 133 MHz, therefore, has a transfer speed
equal to:
⚫16 * 133.106 = 2128*106 bit/s,
⚫ or 2128*106/8 = 266*106 bytes/s
⚫ or 266*106 /1000 = 266*103 KB/s
⚫ or 266*103 /1000 = 266 MB/s
Bus and Memory Transfer
 contents

• Register Transfer
Language

• Register Transfer

• Bus and Memory

Transfers
4-1 Register Transfer Language (RTL)
⚫DigitalSystem: An interconnection of hardware
modules that do a certain task on the
information.
⚫Registers + Operations performed on the data
stored in them = Digital Module
⚫Modules are interconnected with common data
and control paths to form a digital computer
system
4-1 Register Transfer Language cont.
⚫ Microoperations: is an elementry operations executed
on data stored in one or more registers.
⚫ For any function of the computer, a sequence of
microoperations is used to describe it
⚫ The result of the operation may be:
◦ replace the previous binary information of a register
or
◦ transferred to another register

Shift Right Operation

101101110011 010110111001
⚫ADD R1,R2
 4-1 Register Transfer Language cont.
⚫ The internal hardware organization of a
digital computer is defined by specifying:
● The set of registers it contains and their function
● The sequence of microoperations performed on the
binary information stored in the registers
● The control that initiates the sequence of
microoperations
⚫Registers+ Microoperations Hardware +
Control Functions = Digital Computer
4-1 Register Transfer Language cont.
⚫ Register Transfer Language (RTL) : a
symbolic notation to describe the
microoperation transfers among registers
Next steps:
◦ Define symbols for various types of microoperations,
◦ Describe the hardware that implements these
microoperations
4-2 Register Transfer (our first
microoperation)
⚫Computer registers are designated by
capital letters (sometimes followed by
numerals) to denote the function of the
register
● R1: processor register
● MAR: Memory Address Register (holds an address
for a memory unit)
● PC: Program Counter
● IR: Instruction Register
● SR: Status Register
4-2 Register Transfer cont.

⚫The most common way to represent a register

,is by rectangle box with name of register
inside
⚫The individual flip-flops in an n-bit register are
numbered in sequence from 0 to n-1 (from the
right position toward the left position)
7 6 5 4 3 2 1 0
R1 R1

Register R1 Showing individual bits

A block diagram of a register

 4-2 Register Transfer cont.

Other ways of drawing the block diagram of a register:

15 0
PC

Numbering of bits
A 16 bit register is partitioned into two parts, bit 0 through 7 are
assigned the symbol L(for low byte) and 8-15 are assigned the symbol
H( for high byte)
15 87 0
Upper byte PC(H) PC(L) Lower byte
Partitioned into two parts
 4-2 Register Transfer cont.
⚫ Information transfer from one register to another is
described by a replacement operator: R2 ← R1
⚫ This statement denotes a transfer of the content of register
R1 into register R2
⚫ The transfer happens in one clock cycle
⚫ The content of the R1 (source) does not change
⚫ The content of the R2 (destination) will be lost and replaced
by the new data transferred from R1
⚫ We are assuming that the circuits are available from the
outputs of the source register to the inputs of the destination
register, and that the destination register has a parallel load
capability
4-2 Register Transfer cont.

⚫Conditional transfer occurs only under a

control condition

⚫Representation of a (conditional) transfer

P: R2 ← R1
⚫A binary condition (P equals to 0 or 1)
determines when the transfer occurs
⚫The content of R1 is transferred into R2 only
if P is 1
4-2 Register Transfer cont.
Hardware implementation of a controlled transfer: P: R2 ← R1

Block diagram: Control P Load

R2 Clock
Circuit

R1

Timing t t+1
diagram
Clock
Synchronized
Load
with the clock
Transfer occurs here
4-2 Register Transfer cont.

⚫ Unconditional
R1 ← R2
⚫ Conditional
P: R1 ← R2
⚫ Simultaneous
R1 ← R2 , R3 ← R2
SIMULTANEOUS OPERATIONS
⚫ Iftwo or more operations are to occur simultaneously, they
are separated with commas

P: R3 ← R5 ,, MAR ← IR

⚫ Here, if the control function P = 1, load the contents of R5

into R3, and at the same time (clock), load the contents of
register IR into register MAR
4-2 Register Transfer cont.

Basic Symbols for Register Transfers

Symbol Description Examples
Letters & Denotes a register MAR, R2
numerals
Parenthesis ( Denotes a part of a R2(0-7), R2(L)
) register
Arrow ← Denotes transfer of R2 ← R1
information
Comma , Separates two R2 ← R1, R1 ←
microoperations R2
4-2 Register Transfer cont.

Every statement written in a register transfer notation implies a H/W

construction for implementing the transfer.

The internal H/W organization of a digital computer is best defined by

specifying :

1. The set of register it contains.

1. Sequence of micro-operation performed on the binary information

stored in the register.

1. The control that initiates the sequence of micro-operation.

4-3 Bus and Memory Transfers
⚫A shared communication path consisting
of one or more connection lines is known
as bus
⚫Bus transfer : The transfer of data
through bus is known as bus transfer.
⚫Memory Transfer : When a data is read
from memory or is stored in memory is
referred to as memory transfer.
 4-3 Bus and Memory Transfers
⚫Paths must be provided to transfer information from
one register to another
⚫A Common Bus System is a scheme for transferring
information between registers in a multiple-register
configuration
⚫A bus: set of common lines, one for each bit of a
register, through which binary information is
transferred one at a time
⚫Control signals determine which register is selected
by the bus during each particular register transfer
4-3 Bus and Memory Transfers
Register A Register B Register C Register D

Bus lines

Register D Register C Register B Register A

3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0

D3 D2 D1 D0 C3 C2 C1 C0 B3 B2 B1 B0 A3 A2 A1 A0

D3 C3 B3 A3 D2 C2 B2 A2 D1 C1 B1 A1 D0 C0 B0 A0

3 2 1 0 3 2 1 0 3 2 1 0
3 2 1 0 S0
S0 S0 S0
MUX3 MUX2 MUX1 MUX0 S1
S1 S1 S1

4-Line Common Bus

4-3 Bus and Memory Transfers
⚫A bus system with multiplexer:
For k register of n bits, each produce an
n– line common bus.
The number of multiplexer needed is equal
to n( no of bits in each register)
The size of each multiplexer must be k ×1
4-3 Bus and Memory Transfers
⚫The transfer of information from a bus into one of
many destination registers is done:
◦ By connecting the bus lines to the inputs of all destination
registers and then:
◦ activating the load control of the particular destination
register selected
⚫We write: R2 ← C to symbolize that the content of
register C is loaded into the register R2 using the
common system bus
⚫ It is equivalent to: BUS ←C, (select C)
R2 ←BUS (Load R2)
4-3 Bus and Memory Transfers: Three-
State Bus Buffers
⚫A bus system can be constructed with
three-state buffer gates instead of
multiplexers
⚫A three-state buffer is a digital circuit
that exhibits three states: logic-0, logic-1,
and high-impedance (Hi-Z) Control input C

Normal input A Output B

Three-State Buffer
 4-3 Bus and Memory Transfers: Three-
State Bus Buffers cont.

C=1

Buffer
A B A B

C=0

Open Circuit
A B A B
 TRANSFER FROM BUS TO A DESTINATION REGISTER
Bus lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D0 D1 D2 D 3
z E (enable)
Select 2x4
w
Decoder

Three-State Bus Buffers

Normal input A Output Y=A if C=1
High-impedence if C=0
Control input C

Bus line with three-state buffers

Bus line for bit 0
A0
B0
C0
D0

S0 0
Select 1
S1 2
Enable 3
 4-3 Bus and Memory Transfers: Three-
State Bus Buffers cont.
S1 0
Select
S0 1
Bus line for bit 0
2×4 A0
Decoder 2
Enable E
3

B0

C0

Bus line with three-state buffer

(replaces MUX0 in the D0
previous diagram)
4-3 Bus and Memory Transfers: Memory
Transfer
⚫Memory read : Transfer from memory
⚫Memory write : Transfer to memory
⚫Data being read or wrote is called a memory word
(called M)- (refer to section 2-7)
⚫It is necessary to specify the address of M when
writing /reading memory
⚫This is done by enclosing the address in square
brackets following the letter M
⚫Example: M[0016] : the memory contents at address
0x0016
4-3 Bus and Memory Transfers:
Memory Transfer cont.
⚫Assume that the address of a memory
unit is stored in a register called the
Address Register AR
⚫Lets represent a Data Register with DR,
then:
⚫Read: DR ← M[AR]
⚫Write: M[AR] ← DR
4-3 Bus and Memory Transfers:
Memory Transfer cont.
AR
x0C 19
x12 x0E 34
R1 x10 45
100 x12 66
x14 0
x16 13
R1←M[AR] x18 22

RAM

R1 R1
100 66