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BJT 2 - Study Notes

The document discusses the basics of Bipolar Junction Transistors (BJT) including their symbolic representation, configurations, operating modes, current gains, active and saturation regions, AC and DC analysis methods using hybrid-π and h-parameter models, high frequency analysis considering various capacitances, and low frequency analysis of amplifiers accounting for coupling capacitors.

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16 views

BJT 2 - Study Notes

The document discusses the basics of Bipolar Junction Transistors (BJT) including their symbolic representation, configurations, operating modes, current gains, active and saturation regions, AC and DC analysis methods using hybrid-π and h-parameter models, high frequency analysis considering various capacitances, and low frequency analysis of amplifiers accounting for coupling capacitors.

Uploaded by

Pooja
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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BJT

GATE EC

Copyright © 2014-2020 TestBook Edu Solutions Pvt. Ltd.: All rights reserved
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BJT
Symbolic representation of BJT.

Configurations of Transistor (npn) (active mode)

I / P current O/P I / P voltage


Transistor configurations O / P voltage (Vo)
(Ii) current (Io) (Vi)
Common Base (CB) IE IC VBE VCB
Common Emitter (CE) IB IC VBE VCE
Common Collector (CC) IB IE VCB VCE

For AC → notation is ie

For Total → notation is Ie

For DC → notation is IE

Operating modes of BJT

Emitter Junction Collector Junction Region Operation

FB RB Active Amplifier

FB FB Saturation ON switch

RB RB Cut-off Off switch

RB FB Inverse active attenuator

GATE EC | BJT PAGE 2


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Common base DC current gain (α)

Common emitter DC current gain (β)

Common collector DC current gain (r)

IE = IC + IB

Active vs Saturation region (npn transistor)

Active region Saturation region


1) IC = β IB IC ≠ βIB
2) VBE = 0.7 V VCE = 0.2
3) VCE = depends on Ckt VBE = 0.7

Procedure to find region of transistor

Method 1

Assume active region

1) Apply kVL in Base-emitter Ckt & calculate IB

2) IC = βIB

VBE = 0.7 V

3) Apply kVL in CE Ckt & calculate VCE

4) Now from VCE

If VCE > 0.2 then active region

If VCE < 0.2 then saturation region

Method 2

Assume saturation region

→ Apply kVL in base Ckt. & calculate IB

→ Apply kVL in CE Ckt & calculate IC min

→ VCE = 0.2

IC ≠ βIB

GATE EC | BJT PAGE 3


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→ If IB min < IB → (saturation region)

If IB min > IB → (active region)

AC & DC analysis of BJT

CE = Emitter bypass capacitor

CC = Coupling capacitor

For DC analysis

1) frequency(w) = 0, so capacitors are open Ckt

2)

gm = trans conductance

rE = AC emitter resistance

rπ = AC base resistance

For AC analysis

1) Using hybrid-π model (IF CE is absent)

GATE EC | BJT PAGE 4


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Same structure modelling for CE, CC, CB or whether npn or pnp.

2) By using h-parameter

Where,

1) → Current gain

2) Zin = RB + hi + AI hr RL → Input impedance

3) → Voltage gain

4) → output admittance

High frequency analysis (for CE amplifies only)

Cπ = input capacitance between E & B

Cμ = capacitance between C & B

GATE EC | BJT PAGE 5


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Cπ = Cde + Cje

Voe = 0.9 V

m = 0.5

Voc = 0.7 V

m = 0.2 to 0.5

For external connections use ohmic contact.

→ AC > AE > AB (area)

→ RB > RE > Rc

→ Base width should be very less

GATE EC | BJT PAGE 6


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→ CE short circuit current gain (RL = 0)

Isc = -gm Vb’e

GATE EC | BJT PAGE 7


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…(1)

-gm / gb’e = hfe

Remembers here

rπ ≠ rb’e as rbb’ is there

If rbb’ is ignored them rb’e = rπ

yin = gb’e + j’w (Cμ + Cπ)

put this in (1)

3dB cut-off frequency is the Frequency at which | | or any gain become

GATE EC | BJT PAGE 8


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| | at f = 0 = hfe 180°

| | at f = fβ 135°

| | at f = ∞ = 0 90°

fT = unit gain B.W = frequency at which product of gain & frequency become 1.

GATE EC | BJT PAGE 9


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at very high frequencies

f = operating frequency

Let f = fT; | |=1

fT = hfe fβ

gain × B.W = fT

hfe = | | at f = 0

So fβ = B.W.

B.W of common base amplifier

BW = 3dB cut off frequency of CB = fα = (1 + β) fβ

GATE EC | BJT PAGE 10


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Low frequency analysis of amplifier

In L.F, coupling capacitors cannot be ignored

For finding effect of C1, put C2 & C3 as S.C

 For C2, put C1 & C3 as S.C and

 For C3, put C1 & C2 as S.C

Due to three capacitors we have 3 poles or break points.

1)

2)

3)

Find Rth by seeing through operating capacitor as we find it is Theremin Theorem

Equivalent resistance is Theremin resistance found by seeing it from capacitor by


felting I.S = 0

(RC + RC) is resistance seen between Terminals of C3 when Vs = 0.

GATE EC | BJT PAGE 11

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