Module 5
Module 5
• The operation specified by an instruction can be carried out by performing one or more of the
following actions:
1) Read the contents of a given memory-location and load them into a register.
2) Read data from one or more registers.
3) Perform an arithmetic or logic operation and place the result into a register.
4) Store data from a register into a given memory-location.
• The hardware-components needed to perform these actions are shown in Figure 5.1.
REGISTER TRANSFERS
• Instruction execution involves a sequence of steps in which data are transferred from one register to
another.
• For each register, two control-signals are used: Riin & Riout. These are called Gating Signals.
• Riin=1 data on bus is loaded into Ri. Riout=1
content of Ri is placed on bus.
Riout=0, bus can be used for transferring data from other registers.
• For example, Move R1, R2; This transfers the contents of register R1 to register R2. This can be
accomplished as follows:
1) Enable the output of registers R1 by setting R1out to 1 (Figure 7.2).
This places the contents of R1 on processor-bus.
2) Enable the input of register R2 by setting R2out to 1.
This loads data from processor-bus into register R4.
• All operations and data transfers within the processor take place within time-periods defined by the
processor-clock.
• The control-signals that govern a particular transfer are asserted at the start of the clock cycle.
Input & Output Gating for one Register Bit
• A 2-input multiplexer is used to select the data applied to the input of an edge-triggered D flip-flop.
• Riin=1 mux selects data on bus. This data will be loaded into flip-flop at rising-edge of clock.
Riin=0 mux feeds back the value currently stored in flip-flop (Figure 7.3).
• Q output of flip-flop is connected to bus via a tri-state gate.
Riout=0 gate's output is in the high-impedance state.
Riout=1 the gate drives the bus to 0 or 1, depending on the value of Q.
CONTROL-SIGNALS OF MDR
• The MDR register has 4 control-signals (Figure 7.4):
1) MDRin & MDRout control the connection to the internal processor data bus &
2) MDRinE & MDRoutE control the connection to the memory Data bus.
• MAR register has 2 control-signals.
1) MARin controls the connection to the internal processor address bus &
2) MARout controls the connection to the memory address bus.
Step4--> Contents of R3 are loaded into MAR & a memory read signal is issued.
Step5--> Contents of R1 are transferred to Y to prepare for addition.
Step6--> When Read operation is completed, memory-operand is available in MDR, and the
addition is performed.
Step7--> Sum is stored in Z, then transferred to R1.The End signal causes a new instruction
fetch cycle to begin by returning to step1.
BRANCHING INSTRUCTIONS
• Control sequence for an unconditional branch instruction is as follows:
COMPLETE PROCESSOR
• This has separate processing-units to deal with integer data and floating-point data.
Integer Unit To process integer data. (Figure 7.14).
• Using separate caches for instructions & data is common practice in many processors today.
• A processor may include several units of each type to increase the potential for concurrent
operations.
• The 80486 processor has 8-kbytes single cache for both instruction and data.
Whereas the Pentium processor has two separate 8 kbytes caches for instruction and data.
Note:
To execute instructions, the processor must have some means of generating the control-signals. There
are two approaches for this purpose:
1) Hardwired control and 2) Microprogrammed control.
Advantages
• It simplifies the design of c ontrol unit. Thus it is both, cheaper and less error prone implement.
• Control functions are impl emented in software rather than hardware.
• The design process is orderly and systematic.
• More flexible, can be cha nged to accommodate new system specifications or to correct the design
errors quickly and cheaply.
• Complex function such as floating point arithmetic can be realized efficient ly.
Disadvantages
• A microprogrammed contr ol unit is somewhat slower than the hardwired control unit, because time is
required to access the micr oinstructions from CM.
• The flexibility is achieved at some extra hardware cost due to the control memory and its access
circuitry.
MICROINSTRUCTIONS
• A simple way to structure microinstructions is to assign one bit position to
each control-signal required in the CPU.
• There are 42 signals and hence each microinstruction will have 42 bits.
• Drawbacks of microprogrammed control:
1) Assigning individual bits to each control-signal results in long
microinstructions because the number of required signals is usually
large.
2) Available bit-space is poorly used because
only a few bits are set to 1 in any given microinstruction.
• Solution: Signals can be grouped because
1) Most signals are not needed simultaneously.
2) Many signals are mutually exclusive. E.g. only 1 function of ALU can be
activated at a time. For ex: Gating signals: IN and OUT signals (Figure
7.19).
Control-signals: Read, Write.
ALU signals: Add, Sub, Mul, Div, Mod.
• Grouping control-signals into fields requires a little more hardware because
decoding-circuits must be used to decode bit patterns of each field into individual
control-signals.