Roll Number:

Thapar Institute of Engineering & Technology, Patiala

Department of Computer Science and Engineering
END SEMESTER EXAMINATION
B. E. (Third Year): Semester-VI (2021/22) Course Code: UCS617
(COE) Course Name: Microprocessor Based Systems Design
Date: May 25, 2022 Time: 11:25 AM - 1:25 PM
Duration: 2 Hours, M. Marks: 35 Name of Faculty: ANJ, MJU, HRS, SHI
Note: Attempt all questions with proper justification.
Assume missing data, if any, suitably.
Q1 WAP to transfer a block of 10 bytes from data segment to extra segment by using assembler directives DB, (7)
ASSUME, SEGMENT, ENDS, END.
Q2 Design Interrupt vector tables of 8086 Microprocessor also show and explain all the interrupts. (7)
Q3 Write a control word format and assembly language code when the ports of the 8255 are defined as follows: (7)
a) Port A as an output Port in Mode 0
b) Port B as an output Port in Mode 1
c) Port C-Upper as an Input port and Port C-Lower as an output port
d) Output the result to CWR-Control Word Register by assuming Port A is connected to 71506
e) Read the data from Port A and Port B and perform AND operation between Port -A and Port- B
f) Output the result to Port- C
Q4(a) Show the sequence of operations of Programmable Interrupt Controller with 8086 microprocessor. (4)
Q4(b) Describe the functions and working of CLK, GATE and OUT pins for Counter 0, Counter 1, and Counter 2 in (3)
PIT.
Q5 Differentiate between the following: (3+2+2)
a) 80386, 80486 and Pentium Processors through address, data bus and speed
b) Synchronous and Asynchronous data transfer for 8251 (USART)
c) LOOP and REPEAT (REP) in 8086 along with example

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 Roll No. Name Group

Computer Science & Engineering Department

Thapar Institute of Engineering & Technology, Patiala
Microprocessor Based Systems Design (UCS617)
Theory Quiz-2 [May 25, 20221
Time: 10 min 111:15AM - 11:25AM1 Max Marks: 10
Instructions for students:
• Any cutting or overwriting will be considered as a wrong answer.
• Missing roll number or name will be considered as an absent.
• No Negative marking is there and No extra material is allowed.
1. What is the output of following code? 5. Which of the following is a Processor Control
X DB 90 Instructions
start: a. CLC
CMP AX, X b. STC
JG exit c. CMC
MOV BL, 55 d. All of the above
HLT
6. What will be the value of DX after executing the
exit:
following code
HLT
MOV AX, 1114H
a. 0000 in AX while 0000 in BX
MOV DX, 1116H
b. 0000 in AX while 0037 in BX
c. 90 in AX while 0000 in BX PUSH AX
d. Error PUSHF
a. 1114
2. Consider the following program for moving a
b. 1111
block of data from one memory location to
c. 1116
another memory location. Fill in the blank with
d. All of the above
the instruction that should come at that place.
7. In mode 3 of 8254, when count N loaded in
MOV SI, 2000
MOV DI, 2008 counter is even, then:
MOV CX, 0008 a. Output remains high for N/2 count and low
REP for N/2 count
b. Output remains high for (N+1)/2 count and
HLT low for (N-1)/2 count
a. MOV c. Output does not depend on the value of N
b. MOVS d. None of the above
c. MOVSB 8. Which of the following signal indicates that the
d. MOVSW output register is empty and USART is ready to
3. What is the output of following code? accept the next data byte?
X DB -8 a. T x D
MOV AL, OFFh
b. T x C
IDIV X
c. T x RDY
HLT
d. T x E
a. Generates 07E1 in AX and 0000 in DX
b. Generates 07E1 in AX and 0001 in DX 9. In non-buffered mode, SP pin of master 8259 is:
c. Generates 70E0 in AX and 0000 in DX a. Grounded
d. Error in the code b. Kept high
c. Connected to Vcc
4. When Divide by zero error occurs which Interrupt
d. Both b and c
will takes place?
a. INTO 10. A high on Ao pin of 8279 indicates the transfer of
b. INT1 over the data bus:
c. INT2 a. Command or status information
d. INT3 b. Data
c. Address
d. None of the above
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