FA21-EEE-5 Assignment# 1 Solution

Microprocessor and System Interfacing

Instructions:

• Please submit the Assignment by Thursday, October 07, 2021.

• Answers must be in original text and not copied.
• Submit your assignments in PDF format on portal.

Questions

1. What is the difference between a microprocessor and a microcontroller? Discuss Harvard

and von Neumann architectures for microprocessor and microcontroller.
A microprocessor is usually a computer chip also called a CPU. A microprocessor takes
instructions step by step from the program memory and perform operation accordingly, like
on the data memory. Microprocessors required program memory and data memory to be
externally attached in order to operate.
Microprocessor IC
Data Bus

ROM
CPU
Addres s Bus
Data Bus
General-
Purpose
I/O Serial
Microprocessor RAM Timer
Port Port

Addres s Bus

A microcontroller includes a microprocessor and other essential components like Program

Memory (ROM), Data memory (RAM), Timers and I/O Ports etc. There are almost no
external wires required. A microcontroller is cheaper and easy to setup and run, but offers
little to no flexibility.
Microcontroller IC
Data Bus

ROM
CPU
Addres s Bus
Data Bus
General-
Purpose
I/O Serial
Microprocess or RAM Timer
Port Port

Addres s Bus

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FA21-EEE-5 Assignment# 1 Solution
Microprocessor and System Interfacing

A microprocessor based system requires more time to setup, is costly due to required
external components. External components are connected using wires (busses) to the
microprocessor. However, microprocessors offers flexibility and one can use a program
memory and ram according to requirements.
Von Neumann architecture has single bus for accessing data and instructions while Harvard
architecture has separate busses for accessing data and instructions. Harvard architecture
offers superior performance (allows simultaneous access to instructions and data) at the
cost of extra wires, cost is significant if the memories are connected externally to chip.
Harvard architecture is more suitable for microcontrollers where both the memories and
busses are on-chip, this does not significantly increase cost, as there is no increase in
external wires.
2. Discuss the components inside a CPU, along with the functions they perform to make a
CPU? What is the role of Program and Data memory?
The major components of the CPU are:
I. Program counter (contains address of the instruction to be executed next)
II. Instruction register (contains the read instruction from Program memory)
III. Instruction Decoder
a. Translate fetched instruction
b. CPU Control signals
i. Like enable ALU or write register
IV. ALU (Arithmetic and Logic unit)
a. Name well explained
b. ALU performs a specific arithmetic of logic function (depends on control
signals)
V. Status Register, has flags which store additional information about the result of ALU
a. Whether the result is zero, or negative or carry (overflow) etc.
VI. Registers, contains data on which CPU performs operations
a. Registers are highest (fastest) data memory

Program memory contains instructions, which guide CPU in performing a task. Data memory is
the workspace where the CPU performs operations. Data memory includes CPU internal
Registers, RAM and Special functions registers. Special function registers allows CPU to access
other peripherals.

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FA21-EEE-5 Assignment# 1 Solution
Microprocessor and System Interfacing

CPU
Registers
Program
Memory
(ROM)

ALU Other
RAM
data bus Instruction Peripherals
Decoder
Status
address bus Program Register
PROGRAM Bus Counter

DATA Bus

3. Discuss the various aspects of comparison when choosing a microcontroller for a particular
application.
When choosing a microcontroller, following a considered
a. Meeting computing needs and cost
i. Speed, packaging, power consumption, RAM, ROM & I/Os etc.
ii. cost per unit
b. Availability of software and hardware tools
i. An efficient C compiler, even cost of the compiler
ii. Third party solutions available like WinAVR, Kiel, COSMIC
c. Wide availability of microcontroller from various sources
i. Ready availability for various suppliers
ii. Future availability
4. Draw waveforms for accessing a memory showing all interfaces
a. Reading location 0x39 which has data 0x49.
CS

OE

WE

Address 0x39

Data (out) 0x49

b. Writing value 0b10111011 to memory location 0x20

CS

OE

WE

Address 0x20

Data (in) 0b10111011

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FA21-EEE-5 Assignment# 1 Solution
Microprocessor and System Interfacing

5. Write an Assembly program that writes 0b00000011 to PortC and increments PortC 2×NNN
times. NNN is the last three digits of your registration number.
let NNN =100

LDI R16, 0xFF

OUT DDRC, R16 ;Port C is output
LDI R16, 0b00000011
OUT PORTC, R16 ;writes 0b00000011 to PortC
LDI R17, NNN ;count variable R17
REP: INC R16 ;increment R16
INC R16 ;increment R16 again
OUT PORTC, R16 ;write incremented value to PortC
DEC R17
BRNE REP ;Loop until R17 is not equal to zero

6. Write an Assembly program that makes a running LEDs program controlled by two
switches. SW1 switches to previous state, SW2 switches to next state. When SW1
is pressed PB.0 goes zero, when SW2 is pressed SW2 is press PB.1 goes zero. Also
draw schematic.
SW1

State PortD 1 8
SW1
SW1
1. SW2
2. SW2 SW2
3. 2 7

4. SW1 SW2 SW2 SW1

5.
3 6
6. SW2 SW2
7. SW2
SW1
8. SW1
4 5

SW1

U1
9 22
RESET PC0/SCL
23
PC1/SDA
13 24
XTAL1 PC2/TCK
12 25
XTAL2 PC3/TMS
26
PC4/TDO
40 27
PA0/ADC0 PC5/TDI
39 28
PA1/ADC1 PC6/TOSC1
38 29
PA2/ADC2 PC7/TOSC2 RN1 U2
37
PA3/ADC3
R2 R1 36
PA4/ADC4 PD0/RXD
14 1 16 1 20
35 15 2 15 2 19
SW1 10k 10k
34
PA5/ADC5 PD1/TXD
16 3 14 3 18
PA6/ADC6 PD2/INT0
33 17 4 13 4 17
PA7/ADC7 PD3/INT1
Previous 18 5 12 5 16
PD4/OC1B
1 19 6 11 6 15
PB0/T0/XCK PD5/OC1A
2 20 7 10 7 14
SW2 3
PB1/T1 PD6/ICP1
21 8 9 8 13
PB2/AIN0/INT2 PD7/OC2
4 9 12
PB3/AIN1/OC0
Next 5 220 10 11
PB4/SS
6
PB5/MOSI
7 32 LED-BARGRAPH-GRN
PB6/MISO AREF
8 30
PB7/SCK AVCC
ATMEGA16

Figure 1 - Schematic for Question6

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FA21-EEE-5 Assignment# 1 Solution
Microprocessor and System Interfacing

CODE for Question 6

MAIN:
CBI DDRB, 0
CBI DDRB, 1
LDI R16, 0xFF
OUT DDRD, R16

LDI R20, 0 ;initial state 1

CPREV:
SBIC PINB, 0
RJMP CNEXT
DEC R20
WAIT_PREV:
SBIS PINB, 0
RJMP WAIT_PREV
CNEXT:
SBIC PINB, 1
RJMP UPDATE
INC R20
WAIT_NEXT:
SBIS PINB, 1
RJMP WAIT_NEXT
UPDATE:
;3 bit state only 0 to 7 (states 1 to 8)
ANDI R20, 0x07
MOV R21, R20
LDI R19, 0b00000101
CPI R21, 0
BREQ ZERO
LOOPSHIFT:
LSL R19
BRCC CONT
ORI R19, 0b00000001
CONT:
DEC R21
BRNE LOOPSHIFT
ZERO:
OUT PORTD, R19
RJMP CPREV

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