EECS 16B Notes

Simon Kuang, Seth Sanders

Spring (now Fall) 2020

Introduction
These are notes for EECS 16B, a freshman-level survey of topics in electrical
engineering. I (Simon) mostly wrote them during the Spring 2020 semester
of EECS 16B paraphrasing Prof. Sanders’s lectures the same semester. The
sentences are my own; the source graphics1 and a lot of proofreading are Seth’s.
If you find a mistake or can suggest an improvement, let me know on
GitHub.
I release these notes under Creative Commons Attribution-NonCommercial-
ShareAlike 4.0 International (c b n a).
The file you’re viewing was compiled at 2020-10-01 20:59:50-07:00.

1 which I lightly edited in GIMP

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i

Contents ii

List of Figures iv

1 16A review and prerequisites 1

1.1 The language of circuits . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Current-voltage characteristic . . . . . . . . . . . . . . . . . . . . 2
1.3 Linear algebra . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Transistor Circuits 4
2.1 m o s f e t behavior at a low level . . . . . . . . . . . . . . . . . . . 4
2.2 An n m o s inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 A c m o s inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 A c m o s inverter chain with capacitance . . . . . . . . . . . . . . 10

3 Transient Analysis 13
3.1 RC transient in an inverter chain . . . . . . . . . . . . . . . . . . 13
3.2 Uniqueness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4 Differential equations with inputs 19

4.1 RC with exponential input . . . . . . . . . . . . . . . . . . . . . . 19
4.2 General scalar differential equation . . . . . . . . . . . . . . . . . 21

5 Vector differential equations and second-order circuits 22

5.1 Guess-and-check for RC filter with cosine input . . . . . . . . . . 22
5.2 Second-order filter with two capacitors . . . . . . . . . . . . . . 23
5.3 General state-space linear ODEs . . . . . . . . . . . . . . . . . . . 23

6 Diagonalization to solve vector differential equations 27

6.1 Solution technique . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.2 Numerical example from RCRC circuit . . . . . . . . . . . . . . . 28
6.3 Introduction to inductors . . . . . . . . . . . . . . . . . . . . . . . 30
6.4 Example: RL circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7 Inductors and RLC Circuits 32

ii
 Contents

7.1 LR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7.2 LC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7.3 LRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

8 Phasors 38
8.1 Exponential inputs and outputs . . . . . . . . . . . . . . . . . . . 38
8.2 Phasor representation of a sinusoid . . . . . . . . . . . . . . . . . 39
8.3 Current and voltage phasors in circuits . . . . . . . . . . . . . . . 41

9 Frequency Response and Bode Plots 43

9.1 Phasors review . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.2 Transfer functions . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

10 Resonance in RLC Circuits 47

10.1 Time-domain analysis . . . . . . . . . . . . . . . . . . . . . . . . 48
10.2 Reparameterized transfer function . . . . . . . . . . . . . . . . . 50
10.3 Applications of (R)LC filtering . . . . . . . . . . . . . . . . . . . 50

iii
List of Figures

1.1 Current and voltage annotated on a passive element. . . . . . . . . 1

1.2 I-V characteristic of a resistor. . . . . . . . . . . . . . . . . . . . . . . 2
1.3 I-V characteristic of a voltage source. . . . . . . . . . . . . . . . . . . 2
1.4 I-V characteristic of a current source. . . . . . . . . . . . . . . . . . . 3

2.1 Physical construction of a simple m o s f e t. . . . . . . . . . . . . . . . 4

2.2 Currents and voltages labeled on an n m o s transistor. . . . . . . . . 5
2.3 I-V characteristic of an n m o s transistor at different values of vGS . . 5
2.4 Regions of an n m o s I-V characteristic. . . . . . . . . . . . . . . . . . 6
2.5 Currents and voltages labeled on a p m o s transistor. . . . . . . . . . 6
2.6 I-V characteristic of a P M O S transistor at different values of vGS . . 7
2.7 A inverter built using an n m o s transistor. . . . . . . . . . . . . . . . 7
2.8 Truth table of the n m o s inverter. . . . . . . . . . . . . . . . . . . . . 8
2.9 A inverter built using the c m o s design.. . . . . . . . . . . . . . . . . 8
2.10 Equivalent circuit of Figure 2.9 when vin = VDD . . . . . . . . . . . . 9
2.11 A chain of inverters, which is kind of similar to a computer. . . . . . 10
2.12 An inverter taken from a chain with a capacitor modeling the next
stage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.13 An inverter outputting VDD with load capacitor. . . . . . . . . . . . 10
2.14 Energy stored in a capacitor can be computed by an integral under
the V = Q/C curve. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.15 c m o s load capacitor forced from voltage VDD to 0. . . . . . . . . . . 11

3.1 Model of n m o s transistor with G-S capacitance. . . . . . . . . . . . 13

3.2 Model of p m o s transistor with G-S capacitance. . . . . . . . . . . . 14
3.3 A c m o s inverter at three levels of abstraction. . . . . . . . . . . . . . 14
3.4 Two consecutive c m o s inverters, part of a longer chain. . . . . . . . 14
3.5 Input signal to the first inverter of Figure 3.4 . . . . . . . . . . . . . 15
3.6 Analog redrawing of Figure 3.4, showing switch actions of the first
inverter, as well as a distinguished node. . . . . . . . . . . . . . . . . 15
3.7 Sketch of transient from t1 to t2 in Figure 3.6. . . . . . . . . . . . . . 17

4.1 An amp with three knobs to adjust playback. . . . . . . . . . . . . . 19

4.2 RC circuit as a filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

iv
 List of Figures

5.1 Filter with two resistors and two capacitors. . . . . . . . . . . . . . . 23

5.2 Decomposition of ~x along eigenbasis directions ~v1 and ~v2 . . . . . . 25

6.1 Illustration of multiplication actions of A, Λ, V, and V −1 . . . . . . . 28

6.2 Parallels between capacitors and inductors. . . . . . . . . . . . . . . 30
6.3 RL circuit, which is similar to an RC circuit (cf. Figure 4.2). . . . . . 31

7.1 An RL circuit with an (AC) voltage source. . . . . . . . . . . . . . . 32

7.2 An LC circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
7.3 Current and voltage of an oscillating LC circuit. . . . . . . . . . . . 34
7.4 Phase portrait of an oscillating LC circuit. . . . . . . . . . . . . . . . 34
7.5 An LRC circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
7.6 The effects of the real and imaginary parts of an eigenvalue λ =
λr + jλi , when neither is zero. . . . . . . . . . . . . . . . . . . . . . . 36

8.1 An RC circuit with a sinusoidal voltage source and its phasor domain
representation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

9.1 Bode magnitude plot of Equation 9.19. . . . . . . . . . . . . . . . . . 45

9.2 Bode phase plot of Equation 9.19. . . . . . . . . . . . . . . . . . . . . 46

10.1 An LRC circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

10.2 Eigenvalue locus from imaginary pair at R = 0 to negative real at
critical R, as R increases from 0. . . . . . . . . . . . . . . . . . . . . . 48
10.3 Figure 10.1, but reparameterized using ωn and ξ. . . . . . . . . . . 49
10.4 Homogeneous response of an LRC circuit with R > 0. . . . . . . . . 49
10.5 Bode plot of an LRC filter with ξ = 0.1. . . . . . . . . . . . . . . . . . 50
10.6 An R ≈ 0 LC circuit used as an matching network. . . . . . . . . . . 51
10.7 An R ≈ 0 LC circuit used in a DC-DC converter. . . . . . . . . . . . 51
10.8 Output of the switch in Figure 10.7, approximated as an offset sine
wave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

v
Lecture 1

16A review and prerequisites

1.1 The language of circuits

Electrical circuits are models, specifically, abstractions of underlying physics-
based descriptions of realities that govern behavior of an electrical system
under analysis. Mathematically, circuits are collections of nodes joined by branch
elements. Between every pair of adjacent nodes there is a voltage difference,
measured in volts, as well as a current, measured in amps. You should be able to
explain, both in approximate physical terms, and, if possible, by a mechanical
analog, what voltage and current are. Given a circuit drawing, you should
be able to write a comprehensive set of voltage-current constraints that fully
predicts what is happening in the circuit. For a well-posed circuit model with N
nodes, one preferred method is Nodal Analysis, which involves writing N − 1
linearly independent KCL node equations, and incorporating KVL and element
branch consraints while writing the node equations.

Figure 1.1: Current and voltage annotated on a passive element.

Understand how current and voltage are annotated on a circuit. Our terms
are “voltage across branch element X” and “current through branch element
X.” The phrases “voltage through. . . ” or “current across. . . ” do not make sense.
Understand, as shown in Fig. 1.1, that the reference directions for voltage

1
 1.2. Current-voltage characteristic

Figure 1.2: I-V characteristic of a resistor.

Figure 1.3: I-V characteristic of a voltage source.

and current are such that power absorbed by a circuit element is given by the
formula vi.

1.2 Current-voltage characteristic

Resistor
As shown in Fig. 1.2, resistors enforce a proportionality relationship between
current and voltage:
V = RI (1.1)
I = GV (1.2)
The ratio V/I is called resistance. The ratio I/V is called conductance.

Voltage source
As shown in Fig. 1.3, a voltage source will provide any current (or none at all)
to maintain its target voltage.

Current source
As shown in Fig. 1.4, a current source will provide any voltage (or none at all)
to maintain its target current.

2
 1.3. Linear algebra

Figure 1.4: I-V characteristic of a current source.

Circuit-solving techniques
Be familiar with the following methods for solving circuits:
• Series elements, e.g. two resistors in series
• Parallel elements, e.g. two resistors in parallel.
• Voltage and current dividers
• Kirchoff’s voltage and current laws
• Norton and Thévenin equivalent circuits
• Nodal analysis
• Power calculations

1.3 Linear algebra

Know what a vector is. Know what eigenvalues and eigenvectors are, and know
how to solve for the eigenvalues and eigenvectors of a matrix, by solving for the
null space of A − λI, where λ is an indeterminate. Know why this technique
works.

3
Lecture 2

Transistor Circuits

2.1 m osfet behavior at a low level

Transistors are nonlinear circuit elements that are integral to building digital
electronics. We’ll focus on a class of transistor called m o s f e t (metal-oxide
semiconductor field-effect transistor), of which there are two types, n m o s and
p m o s. For the most part, we will view m o s f e ts from a digital perspective as
voltage-controlled switches (more on that later), but we’ll first have a look at
the analog world under the hood.
The physical makeup of a m o s f e t is shown in Figure 2.1. It is a device
built on a silicon substrate with three terminals: source (S), drain (D), and gate
(G). What makes a transistor a transistor is 2) mediated by gate voltage. (No
current enters the gate of a mosfet: IG = 0.) 1) a current-voltage characteristic
between drain and source, These quantities are labeled on Figure 2.2. Notice
that voltages are understood with reference to their difference from VS , so:

• D-S current-voltage characteristic is between ID and vDS = vD − vS ,

• parameterized by vGS = vG − vS .

Figure 2.1: Physical construction of a simple m o s f e t.

4
 2.1. m o s f e t behavior at a low level

Figure 2.2: Currents and voltages labeled on an n m o s transistor.

Figure 2.3: I-V characteristic of an n m o s transistor at different values of vGS .

The role of vGS in n m o s

Figure 2.3 depicts several current-voltage characteristics of an nmos, parame-
terized by vGS . There’s a lot happening on this graph in both the vertical and
horizontal directions. Here’s a self-guided tour:

• Notice the horizontal line lying along the positive vDS -axis. This is the plot
of the I-V characteristic when vGS < vt,n , where vt,n > 0 is the threshold
voltage for an n m o s transistor. The current-voltage characteristic is
I = 0, the transistor is behaving as a current source corresponding to zero
current—in other words, it’s an open circuit. The transistor is “off.” 1
• Notice that three I-V curves, parameterized by how much vGS exceeds
vt,n , lie above the line I = 0. Each of them is intersected by what looks
like the eastern half of a dotted upward-facing parabola rising from the
origin. This parabola divides the quadrant into two regions, one left and
1 English semantics for “on” and “off” in circuits can be counterintuitive. An open circuit/switch

is off, and vice versa.

5
 2.1. m o s f e t behavior at a low level

region # on/off? vGS predicate vDS predicate name

0 off vGS < vt,n any
1 on vGS > vt,n low “linear region”
2 on vGS > vt,n high “saturation”

Figure 2.4: Regions of an n m o s I-V characteristic.

Figure 2.5: Currents and voltages labeled on a p m o s transistor.

one right. The left region is called region 1; the right region is called
region 2.
• Focus on region 1, which is called the Linear Region. Notice that in region
1 near the origin, ID and vDS are proportional for every value of vGS . The
slope G = ID /vDS increases for higher values of vGS . This means that the
D-S resistance R = G−1 transitions from ∞ to a finite (perhaps small)
value as vGS increases past vt,n . A resistor that can alternate between
finite and infinite resistance is called a switch: in the Linear Region the
transistor is a voltage-controlled switch.
• Focus on region 2, which is called Saturation, Here the ID increases only
very weakly as vDS increases.For a given VDS , ID increases with increasing
vGS : the transistor behaves approximately as a voltage-controlled current
source!
These characteristics are summarized in Figure 2.4. Regions 0 and 1 can be used
to implement a switch. Region 2 is used for analog electronics—dependent
sources, amplifiers, etc.

pmos transistors: opposite of n m o s

Another kind of m o s f e t is the p m o s. They have a similar construction as
nmos transistors, but their behavior is opposite, and for the “on” condition of
VGS < Vt,p , Vt,p < 0. Figure 2.5 and Figure 2.6 are the counterparts of Figure 2.2
and Figure 2.3, respectively.
For most of this class, we’ll use more idealized models of these transistors
in digital logic settings. In the voltage-controlled switch perspective, n m o s

6
 2.2. An n m o s inverter

Figure 2.6: I-V characteristic of a P M O S transistor at different values of vGS .

Figure 2.7: A inverter built using an n m o s transistor.

transistors open at lower voltages and close at higher voltages, and p m o s

transistors close at lower voltages and open at high ones.

2.2 An nmos inverter

One building block we need to understand digital logic is the inverter, which
is a circuit that outputs a high voltage when its input is a low voltage, and
vice versa. The high voltage represents a digital value of 1 (true), and the low
voltage represents a digital value of 0 (false).
It’s possible to build an inverter using an n m o s transistor, as shown in
Figure 2.7. The high voltage is called VDD , which stands for the voltage supplied
by the high power rail, and in this example has a value of 1 volt.2 In this example,
our reference voltage will be ground—0 volts.
2 For obscure historical reasons.

7
 2.3. A c m o s inverter

vin vout
0 VDD
VDD 0

Figure 2.8: Truth table of the n m o s inverter.

Figure 2.9: A inverter built using the c m o s design..

Analysis
• (Case vin = 0) The transistor, as a switch, is off. As a result, the terminal
vout is connected directly to VDD by a resistor. Because no current flows
into the voltage terminal, by Ohm’s law there can be no voltage drop
across the resistor. Therefore vout = VDD .
• (Case vin = VDD ) The transistor, as a switch, is on. The terminal vout has a
short to ground, so vout = 0.

Figure 2.8 shows the truth table of this circuit and verifies that this circuit is
indeed an inverter.

Power consumption
When vin = 0, the circuit consumes no power, as we have established that there
is no current through the resistor between VDD and vout . When vin = VDD , there
is a path from VDD through the resistor, then the transistor, to ground. The
2
circuit consumes power VI = VDD /R. While this might not necessarily be a lot,
in computing applications with countless transistors, it adds up, and moving
heat away from a dense circuit poses engineering challenges. Dense digital
circuits were made possible by the discovery of the CMOS inverter architecture,
which avoids a path from VDD to ground.

8
 2.3. A c m o s inverter

Figure 2.10: Equivalent circuit of Figure 2.9 when vin = VDD .

2.3 A cmos inverter

Figure 2.9 shows an inverter circuit that exemplifies the cmos design strategy
of using p m o s and n m o s transistors together.

Analysis
• (Case vin = VDD )
– The p m o s having as its source VDD and vout as its drain VGS,1 = 0,
which is higher than Vt,p . Therefore there is no path from VDD to
vout .
– The n m o s having vout as its drain and ground as its source has
VGS,2 = VDD , which is higher than Vt,n . Therefore, due to the
terminal’s short to ground, vout = 0.
The equivalent circuit once the switch model has been applied is shown
in Figure 2.10.
• (Case vin = 0)
– The p m o s, having VGS,1 = −VDD < Vt,p , turns on.
– The n m o s, having VGS,2 = 0 < Vt,n , turns off.
Therefore Vout = VDD .

Power consumption
All currents are zero in this model, so no power is consumed.

9
 2.4. A c m o s inverter chain with capacitance

Figure 2.11: A chain of inverters, which is kind of similar to a computer.

Figure 2.12: An inverter taken from a chain with a capacitor modeling the next
stage.

Figure 2.13: An inverter outputting VDD with load capacitor.

2.4 A cmos inverter chain with capacitance

Contrary to our last conclusion, inverters in real electronics certainly do consume
some power. We’ll pretend digital circuits are chains of inverters (Figure 2.11)—
although this model won’t teach you how to build a computer, it is close enough
to real c m o s networks to illustrate when and where power is expended.
We will concentrate our analysis on just one stage of the c m o s inverter
chain. A single inverter is shown in Figure 2.12, with a capacitor between vout
and ground to model the next stage’s load. Figure 2.13 shows the equivalent
circuit when the output of this inverter settles at VDD .

10
 2.4. A c m o s inverter chain with capacitance

Figure 2.14: Energy stored in a capacitor can be computed by an integral under

the V = Q/C curve.

Figure 2.15: c m o s load capacitor forced from voltage VDD to 0.

Potential energy in a capacitor

The energy stored in the capacitor when it has voltage VDD is given by the
formula
1
Ecap = CV 2 , (2.1)
2 DD
which can be derived by using the facts that 1) that voltage is energy per unit
charge and 2) a capacitor obeys Q = CV, and integrating through the total
RCV
charge stored in the capacitor: 0 DD vC dq (Figure 2.14).
When the inverter’s input changes from low to high, the output must change
from VDD to 0 (Figure 2.15). That means that the load capacitor must discharge

11
 2.4. A c m o s inverter chain with capacitance

fully, burning 21 CVDD

2
of potential energy as heat.

Total energy supplied

Even though the capacitor only stores and discharges 12 CVDD 2
, an up-down
2
cycle costs CVDD . This is because the voltage source must offer Q = CVDD of
charge at VDD energy per unit charge. Where does this go? Let’s follow the
energy as the output changes from 0 to 1 and back to 0.

1. (qC = 0, vC = 0)
2. Voltage source loads CVDD of charge at VDD energy per unit charge, at a
2
total expense of CVDD . Half of its energy output is burned by “parasitic”
resistance en route to the capacitor, and the other half is stored in the
capacitor.
3. (qC = CVDD , vC = VDD )
4. Transistors toggle, and the capacitor drains, generating 12 CVDD
2
of heat on
the pull-down circuit.
5. (qC = 0, vC = 0)

Where does the energy in a device go?

With reference to our chain-of-inverters model, power consumption in digital
devices is mainly explained by three phenomena:
• If the inverter flips every cycle at a clock speed of fs , the circuit will burn
2
fs CVDD charging its capacitors.
• Leakage: a transistor that’s “off” isn’t 100% off, and a small amount of
current flows and burns some energy.
• Short-circuit current (smaller): when the input is flipping between 0 and
1, there’s a very short instant during which both transistors may be on,
and some current flows through the momentary VDD -ground short.

12
Lecture 3

Transient Analysis

(For this lecture, a m o s f e t transistor is considered to transition between “on”

and “off” at vGS = 21 VDD .)
We’ll enrich our analog model of mosfets as voltage-controlled switches by
acknowledging capacitance between the mosfet’s gate and source. Figure 3.1
and Figure 3.2 depict n m o s and p m o s transistors in this model.
Figure 3.3 summarizes the three levels of abstraction with which we are
able to reason about cmos inverters. On the very left is a digital symbol for an
inverter that hides how the inverter works. In the center is the construction of an
inverter using complementary mosfets. On the right is a fairly faithful analog
representation of an inverter that will allow us to interrogate the assumptions
that, thus far, have enabled us to treat the analog circuit as a digital one.

3.1 RC transient in an inverter chain

Let’s return to the case study of a chain of inverters, this time focusing on just
two consecutive inverters. In Figure 3.4 three wires are labeled as follows:

Figure 3.1: Model of n m o s transistor with G-S capacitance.

13
 3.1. RC transient in an inverter chain

Figure 3.2: Model of p m o s transistor with G-S capacitance.

Figure 3.3: A c m o s inverter at three levels of abstraction.

Figure 3.4: Two consecutive c m o s inverters, part of a longer chain.

• vin is the input to the first inverter,

• vo1 is the output of the first inverter (and the input to the second), and
• vo2 is the output of the second.

The digital logic interpretation is that vo2 is the double negation of vin , that is,
vo2 = vin .
We will study what happens when vin is driven by the input depicted in
Figure 3.5. It will begin having remained at 0 for a long time, change to vDD at
time t1 , then return to 0 at time t2 > t1 . Figure 3.6 shows the actions of the
switches of the first inverter’s transistors at times t1 and t2 . For the rest of this
section, we’ll just concentrate on what happens to vo1 .

14
 3.1. RC transient in an inverter chain

Figure 3.5: Input signal to the first inverter of Figure 3.4

Figure 3.6: Analog redrawing of Figure 3.4, showing switch actions of the first
inverter, as well as a distinguished node.

Before t1
As vin = 0 well before t1 , we can assume that the circuit has settled, and the
output of the first inverter is vDD .

After t1 , before t2
At t1 , the pull-up switch opens, and the pull-down switch closes. KCL applied
to the distinguished (red) middle node of Figure 3.6 requires the outgoing
currents to sum to zero. Using Ohm’s Law once and the capacitor current-
voltage relationship twice, we have the following equation:

v o1 d d

+ CN v o1 + C P vo1 − vDD = 0 (3.1)
RN dt dt
d 1
vo + vo = 0 (3.2)
dt 1 RN (CN + CP ) 1

This is a differential equation that we will analyze with initial condition

vo1 (t1 ) = VDD . For equations of this sort we will identify a characteristic
quantity τ as follows:

τ = RN (CN + CP ) (3.3)

15
 3.1. RC transient in an inverter chain

The International System of Units means that τ is measured in Ohm-Farads,

or seconds. For this reason, τ is called the time constant of the system. A
time constant on the order of tens of picoseconds is considered state-of-the-art
for modern devices, arising from resistances on the order of kiloOhms and
capacitances on the order of femtofarads. Rewriting using τ,

d 1
v o = − v o1 (3.4)
dt 1 τ
d
We will refer to the constant of proportionality between dt vo1 and vo1 as λ.

d
vo = λvo1 (3.5)
dt 1
There are many heuristic techniques to propose a solution to this differential
equation. One of them is called Separation of Variables, which involves
R dv R
equations such as voo1 = λ dt. The resulting solution form, where A is a
1
constant that remains to be determined, is all that you will need to know about
this variety of differential equation:

vo1 (t) = Aeλt (3.6)

(As an aside, you can verify that vo1 (t) = Aeλt is a solution— differentiating
both sides with respect to t results in dtd
vo1 (t) = Aλeλt = λ(Aeλt ).) Our next
goal is to determine A. We can do so by choosing A to meet the initial condition
vo1 (t1 ) = VDD . Substituting vo1 (t) = Aeλt ,

Aeλt1 = VDD (3.7)

−λt1
A = VDD e (3.8)
 
vo1 = VDD e−λt1 eλt (3.9)
 
t−t1
−
= VDD e τ
(3.10)

Figure 3.7 is a sketch of vin and vo1 after t1 and before t2 . Notice that vo1
doesn’t immediately jump to 0 like the digital model assumes. Rather, vo1
decays exponentially toward 0 at a rate predicted by τ. Discharging a capacitor
takes time, and digital devices’ clock speed is limited by how quickly binary
values settle in between logic gates.

After t2
We will try to write a differential equation describing the evolution of vo1 at
time t2 and beyond. Figure 3.6 shows that at time t2 , the pull-up switch closes,
and the pull-down switch opens. KCL applied to the same central node yields

16
 3.2. Uniqueness

Figure 3.7: Sketch of transient from t1 to t2 in Figure 3.6.

the following differential equation:

vo1 − VDD d
+ (CP + CN ) vo = 0 (3.11)
RP dt 1
d 1 vDD
vo + vo = (3.12)
dt 1 RP (CP + CN ) 1 RP (CP + CN )

The previous solution for vo1 , which is valid up until time t2 , may be evaluated
at t2 for a boundary condition valid past t2 :
 
t −t
− 2τ 1
vo1 (t2 ) = VDD e (3.13)

A solution for vo1 from t2 onwards is:

 

− t−t2
vo1 = VDD + vo1 (t2 ) − VDD e τP
, (3.14)

where τP = RP (CP + CN ).

3.2 Uniqueness
We solved a differential equation. Differential equations are universal and
ubiquitous in science and engineering.
A theorem states that a large class of differential equations with boundary
conditions have unique solutions. These differential equations are of the form

d
x = f(x, t), x(0) = x0 , (3.15)
dt
where

17
 3.2. Uniqueness

∂f
1. for all values of t, f(x, t) is differentiable with respect to x and ∂x (x, t) <
M for some nonnegative real number M; and
2. for all values of x, f(x, t) has a finite number of discontinuities in t in any
unit interval [t0 , t0 + 1].

If these conditions hold, then our differential equation has a unique solution.
Note that these conditions are in fact quite loose, and are more than
enough to certify that unique solutions exist to differential equations of the
d
form dt x = f(x) = λx. It is important that we have proofs of existence and
uniqueness because methods such as Separation of Variables are not inherently
rigorous. Only once we have verifed that a proposed solution satisfies the
differential equation and boundary condition may we claim that it is a solution.
Because these problems have unique solutions, we may be certain that the
model we are using is physically deterministic—it tells precisely what must
happen, not just what may happen.

18
Lecture 4

Differential equations with inputs

4.1 RC with exponential input

In this section we will derive, in a more hands-on way, the behavior of an RC
circuit forced by an exponential input. If you have ever used an ampwith knobs
for treble and bass (Figure 4.1), then you have interacted with two circuits
similar to the one shown in Figure 4.2. The resistor with a arrow is a variable
resistor, or potentiometer,1 that might be controlled by one of the amp’s knobs.
In Figure 4.2,
• vin represents the amp’s analog input,
• vo is used to drive the speakers after subsequent amplification, and
• R represents the setting on one of the potentiometers.
By studying the distinguished (green) node, we can write the following differ-
ential equation:
d 1 1
vo (t) = − vo (t) + vin (t). (4.1)
dt RC RC
1 Electric guitars use this circuit component, which guitarists call “pots,” to blend the pickups’

signals.

Figure 4.1: An amp with three knobs to adjust playback.

19
 4.1. RC with exponential input

Figure 4.2: RC circuit as a filter.

We’ll constrain vin to have the following form:

vin (t) = Vin est . (4.2)

While it seems that this form is arbitrary, it will prove insightful, because est is
an eigenfunction for input-output behavior of this circuit, i.e. we expect
vo (t) = Vo est . (4.3)
We can determine Vo by substituting our parameterization of vo into Equa-
tion 4.1, whose LHS. . .
d d
vo (t) = Vo est (4.4)
dt dt
= sVo est (4.5)
. . . is equated with the RHS:
1 1
sVo est = − Vo est + Vin est . (4.6)
RC RC
Now we can isolate Vo .
1 1
sV0 + Vo = Vin (4.7)
RC RC !
 
1 1
Vo = 1
Vin (4.8)
RC s + RC
1
Substituting λ = − RC ,
1
Vo = s Vin (4.9)
1− λ

All together, our solution for vo (t) is the following:

1
vo (t) = Vo est = s Vin est . (4.10)
1− λ

20
 4.2. General scalar differential equation

Suppose that we have an initial condition for vo at time 0.

vo = v1 (4.11)
t=0

Then our solution, taking this fact into account, will be

!
t
− RC 1 Vin est
vo (t) = Ae + 1
, (4.12)
RC s + RC

where A remains to be determined, viz. by evaluating both sides at t = 0:

!
1 Vin
v1 = A + 1
(4.13)
RC s + RC
!
1 Vin
A = v1 − 1
. (4.14)
RC s + RC

This concludes our example. A solution to a linear differential equation will,

generally, have the following structure:

v(t) = vhomogeneous (t) + vparticular (t), (4.15)

where vhomogeneous (t) corresponds to the initial condition, and vparticular (t) to the
input term.

(4.16)

4.2 General scalar differential equation

We will verify that the following general differential equation:
d
x(t) = λx(t) + u(t); x(t0 ) = x0 (4.17)
dt
has the following solution, which is a sum of a homogeneous and a particular
term:
Zt
x(t) = eλ(t−t0 ) x0 + eλ(t−τ) u(τ) dτ. (4.18)
t0

We can check the initial condition x(t0 ) = x0 : the former term evaluates to
d
x0 and the latter to 0. Next, we can verify that dt x(t) = λx(t) + u(t) holds by
differentiating.
Zt
d
x(t) = λeλ(t−t0 ) x0 + u(t) + λeλ(t−τ) u(τ) dτ (4.19)
dt t0

The two terms in curly braces sum to λx(t), so Equation 4.17 is satisfied.

21
Lecture 5

Vector differential equations and

second-order circuits

5.1 Guess-and-check for RC filter with cosine input

Last lecture we derived the folowing equation modeling the input-output
properties of an amp: (where R is set by a potentiometer)
d 1 1
vout (t) = − vout (t) + vin (t); vout =V (5.1)
dt RC RC t0

In this section we will try to determine the result in vout when vin has the
following sinusoidal form:
vin (t) = Vin cos (ωt) (5.2)
This defines a sinusoid with amplitude Vin and a frequency of ω, which is
angular frequency, in rad/ s. Angular frequency is related to cycles/second by
ω = 2πf, where f is in units of Hz.
We can solve for vout by guessing that the particular solution—-the summand
that corresponds to vin —has the form A cos (ωt + φ). The second summand of
vout is the homogeneous solution, which corresponds to the initial condition. It
1
has the form Be− RC (t−t0 ) .
1
vout (t) = A cos (ωt + φ) + Be− RC (t−t0 ) (5.3)
Substitution into the differential equation and initial conditions result in the
following constants:
Vin
A= q (5.4)
ω2 (RC)2 + 1
φ = − tan−1 (ωRC) (5.5)

B = vout − A cos(ωt0 + φ) (5.6)

t0

22
 5.2. Second-order filter with two capacitors

Figure 5.1: Filter with two resistors and two capacitors.

5.2 Second-order filter with two capacitors

Perhaps a “better” filter could be constructed by using two capacitors and two
resistors instead of just one. Figure 5.1 depicts the proposed circuit, which is
a “second-order circuit” or “second-order” filter, with values C1 = C2 = 1 µF,
R1 = 31 MΩ, and R2 = 12 MΩ. KCL at the two dotted-circled upper nodes
yields:
d v1 − vin (t) v1 − v2
C1 v1 + + =0 (5.7)
dt R1 R2
d v2 − v1
C2 v2 + =0 (5.8)
dt R2
In order to view this system of differential equations in state-space form, we
will isolate derivatives on the LHS and emphasize that the RHS consists of
linear combinations of v1 , v2 , and vin (t):
  !    
d 1 1 1 1 1
v1 = −v1 + + v2 + vin (t) (5.9)
dt R1 R2 C1 R2 C1 R1 C1
   
d 1 1
v2 = v1 − v2 (5.10)
dt R2 C2 R2 C2
Written in matrix-vector form with physical parameters substituted,
" # " #" # " #
d v1 −5 2 v1 3
= + v (t) (5.11)
dt v2 2 −2 v2 0 in

5.3 General state-space linear ODEs

Generally, a system of linear differential equations similar to the one derived
above has the following form:
d
~x = A~x + ~bu(t), (5.12)
dt

23
 5.3. General state-space linear ODEs

where ~x is a vector and A is a 2 × 2 matrix.

Suppose that A has an eigenvector ~v for an eigenvalue λ. We propose the
d
following solution to the homogeneous problem dt ~x = A~x:

~x(t) = ~veλt (5.13)

d
and verify that “ dt ~x” and “A~x” for this candidate solution are equal:

d  λt 
~ve = λ~veλt (5.14)
dt  
A ~veλt = λ~veλt (5.15)

Detour: diagonalization of A
Let’s additionally assume that A has two linearly independent eigenvectors:

A~v1 = λ1~v1 (5.16)

A~v2 = λ2~v2 (5.17)

These two relationships can be expressed simultaneously using matrices that

consolidate the eigenvectors (side by side) and eigenvalues (on a diagonal):
" #
h i h i λ 0
1
A ~v1 ~v2 = ~v1 ~v2 (5.18)
0 λ2

Calling the former two matrices V and the latter Λ,

AV = VΛ (5.19)

Because we chose two linearly independent eigenvectors to constitute V, V is

invertible. Stating A in terms of its eigenvectors and eigenvalues is called the
eigenvector-eigenvalue decomposition of A:

A = VΛV −1 (5.20)

Second-order homogeneous solution from modes

Generally, ~x(0) will be a linear combination of ~v1 and ~v2 :

~x(0) = x̃1 (0)~v1 + x̃2 (0)~v2 (5.21)

These coefficients can be solved by inverting V:

" #
x̃1 (0)
= V −1~x(0) (5.22)
x̃2 (0)

24
 5.3. General state-space linear ODEs

Figure 5.2: Decomposition of ~x along eigenbasis directions ~v1 and ~v2 .

We can build a homogeneous solution for ~x(t) by superposing one-dimensional

solutions in each eigenvector’s respective direction:

~x(t) = ~v1 eλ1 t x̃1 (0) + ~v2 eλ2 t x̃2 (0) (5.23)
" #" #
eλ1 t 0 x̃1 (0)
=V (5.24)
0 eλ2 t x̃2 (0)

To verify the initial condition, we can observe that the diagonal matrix of
exponentials becomes an identity matrix at time 0:
" #" #
1 0 x̃1 (0)
h i
~x(0) = ~v1 ~v2 , (5.25)
0 1 x̃2 (0)

which is true by construction (Equation 5.21).

Modal decomposition
In the previous section, we wrote ~x(0) in eigenbasis-aligned coordinates x̃1 (0)
and x̃2 (0). In this section, we will follow x̃1 and x̃2 as functions of t. Recall that
the eigenbasis-aligned coordinates are defined as follows:
" #
h i x̃
1
~x = ~v1 ~v2 = V~x̃. (5.26)
x̃2

In reverse,

~x̃ = V −1~x. (5.27)

25
 5.3. General state-space linear ODEs

We can use the Chain Rule to obtain a differential equation for ~x̃:

d ~ d
x̃ = V −1 x (5.28)
dt dt
 
= V −1 A~x + ~bu (5.29)
= V −1 AV~x̃ + V −1~bu (5.30)
" #
λ1 0 ~ ~
= x̃ + b̃u, ~b̃ = V −1 b (5.31)
0 λ2

This vector differential equation is effectively scalar in each variable, in which

scalar techniques can be applied separately. The separation of x into its
eigenbasis-aligned components is called modal decomposition; ~v1 eλ1 t and ~v2 eλ2 t
are the two modes of this system.

26
Lecture 6

Diagonalization to solve vector

differential equations

In the last lecture, a second-order low-pass filter circuit using two resistors and
two capacitors led us to the following differential equation:
d
~x = A~x + ~bu, (6.1)
dt
" #
v1 (t)
where ~x = and ~x(0) or ~x(t0 ) is known. We represented ~x as a linear
v2 (t)
combination of A’s eigenvectors ~v1 (for eigenvalue λ1 ) and ~v2 (for eigenvalue
λ2 ):
~x = ~v1 x̃1 + ~v2 x̃2 (6.2)
" #
x̃1
h i
= ~v1 ~v2 = V~x̃ (6.3)
x̃2

We will assume that λ1 and λ2 are distinct, which implies that A has an invertible
matrix of linearly independent eigenvectors V.We established that
" #
λ1 0
h i
AV = VΛ, V = ~v1 ~v2 , Λ = . (6.4)
0 λ2

These findings are summarized in Figure 6.1, which shows how ~x, A~x, ~x̃, and
Λ~x̃ are related by matrix multiplication (along arrows).

6.1 Solution technique

A system
d
~x = A~x + ~bu; ~x(t0 ) (6.5)
dt
is solved as follows:

27
 6.2. Numerical example from RCRC circuit

Figure 6.1: Illustration of multiplication actions of A, Λ, V, and V −1 .

1. Compute eigenvalues λ1 and λ2 of A, as well as their respective eigenvec-

tors ~v1 and ~v2 .
h i
2. Construct V = ~v1 ~v2 and define ~x̃ = V −1 x.
" #
λ1 0
3. Construct Λ = and b̃ = V −1 b. Solve the differential equation
0 λ2
d ~
x̃ = Λ~x̃ + b̃u with initial condition x̃(t0 ) = V −1 x(t0 ). (More on this
dt
later.)
4. Recover a solution for ~x using ~x = V~x̃.

6.2 Numerical example from RCRC circuit

Equation 5.11 captured a second-order low-pass filter using
" # " #
−5 2 3
A= and ~b = . (6.6)
2 −2 0
" #
v
We will solve the differential equation for ~x = 1 using the technique of the
v2
previous section.

Eigenvalues and eigenvectors

We will solve for eigenvectors λ as roots of det (λI − A), the characteristic
polynomial of A.
" #
λ + 5 −2
det = λ2 + 7λ + 6 = 0 (6.7)
−2 λ + 2

28
 6.2. Numerical example from RCRC circuit

This quadratic equation in the indeterminate λ is called the characteristic equation

of A. It has the following roots:
λ1 = −1; λ2 = −6. (6.8)
Next we will solve for an eigenvector belonging to eigenvalue λ1 , by choosing a
nonzero vector from the null space of λ1 I − A:
" #
4 −2
λ1 I − A = (6.9)
−2 1
" #
1
~v1 = (6.10)
2

. . . and, mutatis mutandis, for λ2 :

" #
−1 −2
λ2 I − A = (6.11)
−2 −4
" #
2
~v2 = (6.12)
−1

Differential equation in new coordinates

In our example,
" #
1 2
V= , so (6.13)
2 −1
" #
1 2
5 5
V −1 = 2
. (6.14)
5 − 51

Our differential equation in ~x̃ will be

d ~
x̃ = Λ~x̃ + V −1~bu (6.15)
dt " # " #
3
−1 0 ~ 5
= x̃ + . (6.16)
0 −6 6
5

With t0 = 0, ~x̃ is solved as follows:

~x̃(t) = homogeneous solution + particular solution



(6.17)
" # Z t " λ1 (t−τ) #
eλ1 t 0 ~ e 0 ~b̃u(τ) dτ,
= x̃(0) + (6.18)
0 eλ2 t 0 0 eλ2 (t−τ)

viz., in individual components,


x̃1 (t) = eλ1 t x̃1 (0) + Rt eλ1 (t−τ) b̃1 u(τ) dτ
0
R (6.19)
x̃2 (t) = eλ2 t x̃2 (0) + t eλ2 (t−τ) b̃2 u(τ) dτ
0

29
 6.3. Introduction to inductors

Figure 6.2: Parallels between capacitors and inductors.

Solution in original coordinates

A solution for ~x(t) may be reconstituted from eigenbasis-aligned coordinates
using the following equation:
" #
h i x̃ (t)
1
~x(t) = ~v1 ~v2 . (6.20)
x̃2 (t)

6.3 Introduction to inductors

Inductors are a branch element that are analogous to capacitors. Figure 6.2
compares them with capacitors, and the parallels are repeated below.

q = charge (Coulomb) λ = flux (Weber = Volt-second) (6.21)

d d
q=i λ=v (6.22)
dt dt
q λ
v= i= (6.23)
C L
1 2 1
EC = Cv EL = Li2 (6.24)
2 2

30
 6.4. Example: RL circuit

Figure 6.3: RL circuit, which is similar to an RC circuit (cf. Figure 4.2).

6.4 Example: RL circuit

Figure 6.3 shows a circuit with a time-varying voltage source, a resistor, and an
inductor. KCL at the marked upper right node yields
v − vin
+ i = 0. (6.25)
R
In addition, from the current-voltage relationship of an inductor,

d
L i = v. (6.26)
dt
d
Eliminating v and isolating i, we have
dt
d R vin
i=− i+ . (6.27)
dt L L
The state variable for an inductor is i, and this differential equation may be
solved the same way we solved RC circuits.

31
Lecture 7

Inductors and RLC Circuits

7.1 LR
The RL circuit in Figure 7.1 can be described by the following differential
equation:

d R 1
i = − i + vin . (7.1)
dt L L
It has eigenvalue λ = − R L
L and time constant τ = R . Inductance is a ratio
of magnetic flux (volt-seconds) to current (amps), so inductance divided by
resistance works out to units of seconds.

7.2 LC
The LC circuit in Figure 7.2 can be described by the following two differential
equations, which originate in Kirchoff’s voltage and current laws, respectively.

d
C v+i=0 (7.2)
dt
d
L i=v (7.3)
dt

Figure 7.1: An RL circuit with an (AC) voltage source.

32
 7.2. LC

Figure 7.2: An LC circuit.

" #
v
In vector form, with ~x = ,
i
" #
1
d 0 −C
~x = 1
~x (7.4)
dt L 0
This equation can be solved given an initial condition (knowing the value ~x(t0 )
at some particular time t0 ), yielding a solution for v and i that is good at every
point in time. Substituting L = 1 H and C = 1 F,
" #
d 0 −1
~x = ~x (7.5)
dt 1 0

We will
" analyze
# this system by taking eigenvalues and eigenvectors of the matrix
0 −1
A= . Its eigenvalues are the roots of its characteristic polynomial
1 0
det (λI − A) = λ2 + 1, which are ±j. Call them λ1 = j and λ2 = −j. Solving for
eigenvectors,
" # " #
j 1 ~ 1
λ1 ~v = 0 =⇒ ~v1 = (7.6)
−1 j 1 −j
" # " #
−j 1 1
λ2 ~v = ~0 =⇒ ~v2 = (7.7)
−1 −j 2 j

Conjugate pairs
Notice that λ2 = λ1 and ~v2 = ~v1 . The eigenvalues and eigenvectors come in
conjugate pairs because A is real, and the characteristic polynomial p(λ) =
det (λI − A) has real-valued coefficients. The Fundamental Theorem of Algebra
states that a polynomial of degree n has n roots. When the polynomial has
real coefficients, then roots are real or occur in complex conjugate pairs: let
p(λ) = 0. Then p(λ) = 0 = 0:
p(λ) = λn + an−1 λn−1 + . . . + a1 λ + a0 = 0 (7.8)
 n  n−1
= λ + an−1 λ + . . . + a1 λ + a0 = 0 (7.9)

33
 7.2. LC

Figure 7.3: Current and voltage of an oscillating LC circuit.

Figure 7.4: Phase portrait of an oscillating LC circuit.

From this we can see that whenver λ1 is a root of the real polynomial p(λ), so is
λ1 .
Conjugate pairing also happens with eigenvectors when A is real. If
A~v1 = λ1~v1 , then conjugating both sides, we have

(A~v1 ) = (λ1~v1 ) (7.10)

A~v1 = λ1~v1 (7.11)

This shows that ~v1 is an eigenvector as well, completing a pair with ~v1 .

Back to LC circuit
" #
1V
Let’s take initial condition ~x(0) = . As a combination of ~v1 and ~v2 ,
0A
" # " #
1 1 1 1
~x(0) = + (7.12)
2 −j 2 j
| {z } |{z}
~
v1 ~
v2

34
 7.3. LRC

Therefore, the same linear combination will construct ~x(t) from its constituent
modes.
" # " #
1 1 jt 1 1 −jt
~x(t) = e + e (7.13)
2 −j 2 j
| {z } |{z}
~
v1 ~
v2
"1 1 −jt
# " #
jt
2e + 2e cos t
= 1 jt 1 −jt = , (7.14)
j e − 2j e
sin t

which follows from the identities cos θ = 12 ejθ + e−jθ and sin θ = 2j 1



ejθ − e−jθ ,
which are both consequences of Euler’s formula ejθ = cos θ + j sin θ.
Under an oscilloscope, v(t) = sin t and i(t) = cos t might appear as they do
in Figure 7.3. If ~x(t) is plotted as a parametric curve in the plane (called a phase
portrait), the result is a counterclockwise traversal of the unit circle, shown in
Figure 7.4. This means that the ~x vector has constant length:
v2 + i2 = 1 for all t. (7.15)

Euler’s formula
Euler’s formula states that ejθ = cos θ + j sin θ. This can be derived from the
series expansion of the exponential function around θ = 0,
1 2
ez = 1 + z + z + ... (7.16)
2!
Substituting z = jθ, we have
−1 2 −j 3
ejθ = 1 + jθ + θ + θ + ..., (7.17)
2! 3!
whose even terms add to cos θ:
1 2 1
cos θ = 1 − θ + θ4 + . . . , (7.18)
2! 4!
and whose odd terms add to j sin θ:
1 3 1
sin θ = θ − θ + θ5 . . . . (7.19)
3! 5!

7.3 LRC
The following node equations describe the LRC circuit in Figure 7.5:
v1 − v
(1) −i + =0 (7.20)
R
v − v1 d
(2) +C v=0 (7.21)
R dt
d
(3) L i = −v1 (7.22)
dt

35
 7.3. LRC

Figure 7.5: An LRC circuit.

Figure 7.6: The effects of the real and imaginary parts of an eigenvalue λ =
λr + jλi , when neither is zero.

After using Equation 7.20 to eliminate v1 , we have the following two differential
equations:

d
C v=i (7.23)
dt
d
L i = −Ri − v (7.24)
dt
or, in vector form,
" # " #" #
1
d v 0 C v
= (7.25)
dt i − L1 −R
L
i

From its characteristic equation

R 1
0 = λ2 + λ+ , (7.26)
L LC

36
 7.3. LRC

we obtain eigenvalues
s
 2
1R 1R 1
λ1,2 =− ±j − . (7.27)
2L 2L LC

As R increases from zero, the eigenvalues move in significant ways.

q
1
1. When R = 0, the eigenvalues are the imaginary pair ±j LC .
 2
1R 1
2. When 2L = − LC , the eigenvalues are both − 12 R
L.

 2
1R 1
3. When 2L > − LC , the eigenvalues are distinct and real-valued.

Between (1) and (2), the eigenvalues are neither real nor pure imaginary:
s
 2
1R 1R 1
λ1,2 = − ±j − = λr ± jλi (7.28)
2 L
| {z } 2 L LC
| {z }
λr
λi

The time domain response will incorporate eλt , which has the following
trigonometric interpretation:

e(λr +jλi )t = eλr t ejλi t (7.29)

λr t
=e (cos λi t + j sin λi t) , (7.30)

a sinusoid of angular frequency λi under an envelope with rate λr , as shown in

Figure 7.6.

37
Lecture 8

Phasors

8.1 Exponential inputs and outputs

Phasors are a ubiquitous method for understanding particular responses of
linear differential equations, given sinusoidal input. The following differential
equation is familiar as the capacitor voltage of an RC circuit with vin across
both components:

d 1 1 1
vo = − vo + vin , λ=− (8.1)
dt RC RC RC
Equation 5.3 showed the solution to this differential equation with vin =
Vin cos ωt, purportedly obtained by direct substitution. While that works, an
easier way to the solution is to practice on a general exponential input:

vin = Vin est . (8.2)

Assuming that vo = Vo est is also exponential with the same rate s,

1 1
sVo est = − Vo est + Vin est (8.3)
RC RC
1 1
Vo = Vin = Vin (8.4)
1 + sRC 1 − λs

If our circuit has not existed with its input forever, then the solution for vo is a
superposition of Vo est with a homogeneous response, in which A is a constant
that depends on the initial condition.

vo = Vo est |+ Ae
λt
{z } (8.5)
→0 if Re{λ}<0

38
 8.2. Phasor representation of a sinusoid

If λ has a negative real part, then the impact of the initial condition tends
to zero as t → ∞. Sinusoidal inputs and outputs arise as superpositions of
exponentials where s has no real part:
s = jω est = cos ωt + j sin ωt (8.6)
cos ωt = Re ejωt = Re{cos ωt + j sin ωt} (8.7)
1  jωt 
cos ωt = e + e−jωt (8.8)
2
1  jωt 
sin ωt = e − e−jωt (8.9)
2j

8.2 Phasor representation of a sinusoid

A phasor is a complex number that has amplitude and phase information of
a time-domain sinusoid. By writing the following cosine as the real part of a
complex exponential, we can factor the phasor part from the time-varying part.
x(t) = A cos(ωt + φ), A real, positive (8.10)
h i
= Re Aej(ωt+φ) (8.11)
 
 jφ jωt 
= Re Ae
| {z } e  (8.12)
phasor

The phasor representation of A cos(ωt + φ) is Aejφ . φ is the phase of this

sinusoid.

Uniqueness
Phasors uniquely represent the sinusoids that they represent. Suppose we
assign the phasors A1 and A2 to sinusoids x1 and x2 , respectively:
phasor representation
x1 (t) = Re A1 ejωt −−−−−−−−−−−−→ A1 (8.13)
phasor representation
x2 (t) = Re A2 ejωt −−−−−−−−−−−−→ A2 (8.14)

Uniqueness means that (x1 = x2 ) ⇐⇒ (A1 = A2 ). We can see  see that
A1 = A2 implies x1 = x2 , because the identity Re A1 ejωt = Re A2 ejωt
follows immediately from A1 = A2 .
To show that x1 = x2 implies A1 = A2 , we verify the real and imaginary
layers of this equation independently. The real part emerges at t = 0: x1 (0) =
Re {A1 } and x2 (0) = Re {A2 }. Therefore Re {A1 } = Re {A2 }. On the other hand,
we need t = π2 ω 1
to access the imaginary part. From

x1 = x2 (8.15)
t= π
2
1
ω t= π
2
1
ω

39
 8.2. Phasor representation of a sinusoid

follows
π π
Re A1 ej 2 = Re A2 ej 2 . (8.16)
π
Applying ej 2 = j,

Re (A1 j) = Re (A2 j) (8.17)

h i h i
Re Re (A1 ) j + j2 Im (A1 ) = Re Re (A1 ) j + j2 Im (A1 ) (8.18)
− Im (A1 ) = − Im (A2 ) (8.19)

Linearity
Linearity of the phasor transformation means that a real linear combination
of sinusoids is represented as the same linear combination of the sinusoids’
respective phasors. For real constants a1 and a2 , the phasor representation of
a1 x1 (t) + a2 x2 (t) is a1 A1 + a2 A2 . Beginning with our two sinusoids as real
parts of scaled complex exponentials,
 
x1 (t) = Re A1 ejωt (8.20)
 
x2 (t) = Re A2 ejωt , (8.21)

we may form the following linear combination with real coefficients a1 and a2 :
   
a1 x1 (t) + a2 x2 (t) = Re a1 A1 ejωt + Re a2 A2 ejωt (8.22)
h i
= Re (a1 A1 + a2 A2 ) ejωt . (8.23)

Differentiation
Phasors represent differentiation in time as multiplication by jω: if
h i
x(t) = Re Aejωt , (8.24)

then
 
d
x(t) = Re  jωA ejωt  .
 
(8.25)
dt | {z }
new phasor

40
 8.3. Current and voltage phasors in circuits

Figure 8.1: An RC circuit with a sinusoidal voltage source and its phasor domain
representation.

8.3 Current and voltage phasors in circuits

These three properties translate circuit laws from time domain into phasor
domain:

time ←→ phasor
X X
(k v l ) v=0 ←→ V=0 (8.26)
loop loop
X X
(kc l ) i=0 ←→ I=0 (8.27)
node node

as well as current-voltage relationships:

(resistor) v = Ri ←→ V = RI (8.28)
(capacitor) i= d
C dt v ←→ I = jωCV (8.29)
(inductor) v= d
L dt i ←→ V = jωLI (8.30)

RC revisited
Because capacitors establish a proportional relationship between their voltage
and current phasors, they may be regarded as impedances in phasor domain
1
having impedance jωC . A sinusoidally-excited RC circuit is translated into
phasor domain in Figure 8.1. In phasor domain, Vo is recognized as the lower
half of a voltage divider spanning Vin :
1
jωC
Vo = 1
Vin (8.31)
jωC + R
1
= Vin (8.32)
1 + jωCR

41
 8.3. Current and voltage phasors in circuits

Converting back to time domain,

vo (t) = Re Vo ejωt (8.33)

1
= Re Vin ejωt (8.34)
1 + jωCR

Changing Vo to polar form,

 
1
= Re Vin ejωt (8.35)
|1 + jωCR|ej∠(1+jωCR)
 
1
= Re Vin ejωt (8.36)
|1 + jωCR|ej tan (ωCR)
−1

Vin
ej(ωt−tan (ωCR))
−1
= Re (8.37)
|1 + jωCR|
Vin  
vo (t) = cos ωt − tan−1 (ωCR) (8.38)
|1 + jωCR|

For low frequencies (ωRC  1), |1 + jωCR|. The output has about the same
amplitude as the input. For high frequencies (ωRC  1),1 |1 + jωCR|. As
the amplitude at the filter output vanishes at high frequencies, this RC circuit
functions as a low-pass filter.

1 The approximation is good when ωRC > 10.

42
Lecture 9

Frequency Response and Bode Plots

9.1 Phasors review

Phasors analyze a system at a single frequency ω. Because the period of a
complex exponential is 2π, ω is naturally expressed in rad/s. Conversion to
cycles per second (f, in Hz) is given by ω = 2πf, and the period is T = 1f .
In the differential equation

d
~x = A~x(t) + ~bu(t) (9.1)
dt
with sinusoidal input u(t), phasor analysis can lead to a particular solution for
x(t) with sinusoidal components.
The following identities relate complex numbers to sinusoids:

ejωt = cos ωt + j sin ωt (9.2)

h i 1 
cos ωt = Re ejωt = ejωt + e−jωt (9.3)
2
h i 1 
sin ωt = Im ejωt = ejωt + e−jωt (9.4)
2
Phasors respect the following properties when translating to and from time
domain:

uniqueness There is a one-to-one correspondence between functions A cos(ωt + φ)

and phasors Aejφ , where A is real and positive.
linearity If a1 and a2 are real numbers, then the following addition law holds
vertically:

a1 x1 (t) = A1 cos(ωt + φ1 ) ←→ A1 ejφ1 (9.5)

jφ2
a2 x2 (t) = A2 cos(ωt + φ2 ) ←→ A2 e (9.6)
a1 x1 (t) + a2 x2 (t) = . . . ←→ A1 ejφ1 + A2 ejφ2 (9.7)

43
 9.1. Phasors review

differentiation Differentiation in time domain corresponds to multiplication

by jω in phasor domain.
x(t) ←→ Aejφ (9.8)
d
x(t) ←→ jωAejφ (9.9)
dt
In a vector-valued system excited by sinusoidal input u,
d
~x(t) = A~x(t) + ~bu(t), (9.10)
dt
~ be a (vector) phasor representing ~x:
Let X
−
→ h ~ jωt i
~x(t) = Re Xe , (9.11)

and U a (scalar) phasor representing u:

h i
u(t) = Re ejωt U , (9.12)

so that Equation 9.10 translates,

~ = AX
jωX ~ + ~bU. (9.13)
The particular solution has phasor X.
~ = (jωI − A)−1 ~bU
X (9.14)

Because of the linearity property, linear laws such as KVL (a linear relationship
of branch voltages) and KCL (a linear relationship of branch currents) apply to
phasor voltages and currents, respectively.
Resistors are linear circuit elements, with a proportionality relationship
between voltage and current that holds in phasor domain:
v = Ri ←→ V = RI (9.15)
Capacitors are also linear circuit elements, however the current-voltage propor-
tionality in phasor domain has an imaginary ratio.
d
i=C v ←→ I = jωC V (9.16)
dt | {z }
admittance

The proportionality i = Gv (time domain, G real) is called conductance. In

phasor domain with a complex ratio, it is called admittance. The inverse of
admittance is called impedance, and generalizes resistance.
d 1
i=C v ←→ V = I (9.17)
dt jωC
| {z }
cap. impedance

d
v=L i ←→ V = jωL I (9.18)
dt | {z }
ind. impedance

44
 9.2. Transfer functions

Figure 9.1: Bode magnitude plot of Equation 9.19.

9.2 Transfer functions

We can now solve for particular solutions algebraically. From the RC filter
example, Equation 8.32 can be solved for a phasor ratio Vo /Vin :

Vo 1
H(jω) = = . (9.19)
Vin 1 + jωRC

H(jω) is called the transfer function of this system. It is a complex-valued

function of angular frequency ω whose magnitude is the amplitude scaling
factor of this input-output signal pair, and whose phase is the phase shift.
Analyzing systems by following algebraic functions of a frequency parameter
ω is a strategy generally called “frequency domain.”1

Bode plots
Engineers like to examine information at log scales, especially when it spans
orders of magnitude.2 Frequency perception in human hearing ranges from
roughly 20 Hz to 20 kHz.
A Bode plot of the transfer function H(jω) is the following two things:
1. A log-log plot of H(jω) vs. ω.
2. A angle-log plot of ∠H(jω) vs. ω.

Magnitude
For H(jω) above,

1
H(jω) = (9.20)
1 + jωRC
1
= p (9.21)
1 + ω2 (RC)2
1 An ideal hi-fi audio system, for example, would convert data on the recording medium to

sound pressure in the air in a way that treats all frequencies equally.
2 A piano keyboard lays out fundamental frequencies from left to right on a log scale.

45
 9.2. Transfer functions

Figure 9.2: Bode phase plot of Equation 9.19.

On a log-log scale (Figure 9.1), this looks approximately like a flat left asymptote
and a downhill right asymptote, meeting at H(jω) ω= 1 ≈ 1.3
τ

Phase
To find the phase of H(jω), we can write it as a complex number in rectangular
form, times a real coefficient:
1 1 − jωRC 1 − jωτ
H(jω) = = = (9.22)
1 + jωRC 1 + ω2 (RC)2 (positive real)

The numerator is in the fourth quadrant of the complex plane, and its angle of
depression is given by
 
rise
θ = tan−1 (9.23)
run
 
−ωτ
= tan−1 = tan−1 (−ωτ) (9.24)
1
= − tan−1 (ωτ) . (9.25)

For positive inputs on a log scale, the inverse tangent function smoothly
transitions from 0 to 90 degrees, crossing 45 degrees at 1. Our function, plotted
in Figure 9.2, is the opposite. It has a left asymptote of 0 degrees and a right
asyptote of -90 degrees. The transition, centered at ω∗ = τ1 , is so fast within a
multiple by 10 of ω that the asymptotes look nearly flat left and right of the
transition region.

3 It’s 1
√
actually (a real number) but this approximation works better with the piecewise linear
2
style.

46
Lecture 10

Resonance in RLC Circuits

To analyze the LRC circuit in Figure 10.1, assign phasors to both vin and vo :
 

vin (t) = Re  Vin ejωt 

 
(10.1)
|{z}
phasor
 

vo (t) = Re  Vo ejωt 
 
(10.2)
|{z}
also phasor

Vo spans the rightmost leg of a a three-way voltage divider (Vin among

1
impedances jωL, R, and jωC , so the transfer function is the following impedance
ratio:
1
Vo jωC
= H(jω) = 1
(10.3)
Vin jωC + R + jωL
1
= 2
(10.4)
LC (jω) + jωRC + 1

Figure 10.1: An LRC circuit.

47
 10.1. Time-domain analysis

Figure 10.2: Eigenvalue locus from imaginary pair at R = 0 to negative real at

critical R, as R increases from 0.

10.1 Time-domain analysis

Eigenvalues, two ways
In Equation 7.25, we found a state space differential equation model of this
circuit with the following matrix:
" #
1
0 C
A= (10.5)
− L1 − R
L

Its eigenvalues,
s
 2
1R 1R 1
λ1,2 =− ±j − (10.6)
2L 2L LC

are a complex conjugate pair on the imaginary axis when R = 0. As R approches

a critical value, they slowly approach the same point on the negative real axis.
Their rendezvous is depicted in Figure 10.2. (Afterwards, they separate but
remain real and negative.) We will reparameterize these eigenvalues in a way
that traces their trajectory. Call the undamped (angular) frequency ωn :
r
1
λ1,2 =± − = ±jωn , (10.7)
R=0 LC

and define a damping coefficient ξ (Greek letter xi) that goes from 0 to 1 as the
two eigenvalues leave the imaginary axis and meet at a negative real.

1 R
ξ= q (10.8)
2 L
C

This parameterization appears in Figure 10.3.

48
 10.2. Reparameterized transfer function

Figure 10.3: Figure 10.1, but reparameterized using ωn and ξ.

Figure 10.4: Homogeneous response of an LRC circuit with R > 0.

Homogeneous response
With the same choices of ωn and ξ, the eigenvalues of A can be expresssed as
p
λ1,2 = −ξωn ± jωn 1 − ξ2 . (10.9)

The general form of the homogeneous response (modulo possible scaling and
phase shift) is

v(t) = Re eλ1 t (10.10)

√
2
= e−ξωn t Re ejωn 1−ξ t (10.11)
 p 
= e−ξωn t cos ωn 1 − ξ2 t (10.12)

2π
√
The graph of v(t), sketched in Figure 10.4, is a sinusoid with period ,
ωn 1−ξ2
trapped inside an exponential decaying at rate ξωn .

49
 10.2. Reparameterized transfer function

Figure 10.5: Bode plot of an LRC filter with ξ = 0.1.

10.2 Reparameterized transfer function

With the ωn -ξ parameterization, this circuit’s transfer function becomes

Vo ω2n
= H(jω) = 2
(10.13)
Vin (jω) + (jω) 2ξωn + ω2n

We can imagine the Bode plot of H(jω) as having three pieces:

• When ω  ωn , H(jω) ≈ 1.
• When ω = ωn , H(jω) = −j
2ξ . The magnitude is called “Q.”1
−ω2
• When ω  ωn , H(jω) ≈ ω2
n
.

A possible plot is shown in Figure 10.5.

10.3 Applications of (R)LC filtering

Radio
The power amplifier in a cellular handset runs off a low voltage, limited by
the typical single cell lithium-ion battery voltage of about 3.6 V. Internally,
the amplifier circuit is only able to generate a sinusoid of voltage in the 1–2 V
range. This would create an extreme challenge in driving an antenna with
1 Quality factor, or how selective this filter is of its favorite frequency.

50
 10.3. Applications of (R)LC filtering

Figure 10.6: An R ≈ 0 LC circuit used as an matching network.

Figure 10.7: An R ≈ 0 LC circuit used in a DC-DC converter.

impedance in the 50–75 Ω range; namely, it would be impossible to develop

the ≈ 1 W power level without somehow boosting the voltage between the
solid-state amplifier and the antenna. This is exactly where the LC network
of Figure 10.6 comes to the rescue. In this example, the LC network is called
a matching network, and is used to boist the voltage to better “match” the
antenna impedance. A matching network as in Figure 10.6 before the antenna
improves the performance by altering the effective impedance of the antenna.
 

vin = a(t) cos ωn t + φ(t)

 
(10.14)
|{z} |{z} | {z }
slow fast slow

Taking the capacitor voltage as an output, we have |vo | ≈ 1

|v |.
2ξ a

DC-DC converter
To step down a DC voltage source by 50%, we can use an inverter operating
alternating at a 50% duty cycle to generate an offset square wave whose DC
component is the voltage we are trying to deliver.2 An LC filter reduces the AC
component of the switch output, without dissipating power.
2 Forefficiency, we can use parallel NMOS and PMOS transistors to realize the switch to reduce
resistance. We also want an inductor with the smallest possible parasitic resistance.

51
 10.3. Applications of (R)LC filtering

Figure 10.8: Output of the switch in Figure 10.7, approximated as an offset sine
wave.

The inverter output va can be approximated as a sine wave with a DC offset

(Figure 10.8):

1 1
va (t) = Vbat sin(ωt) + Vbat (10.15)
|2 {z } |2 {z }
ac dc

We can use superposition to compute vo . The filter passes DC at unity gain,

and it scales and shifts the AC component.

1
vo (t) = Vbat + Vo cos(ωt + φ) (10.16)
2
In order to have a convincing DC output, we need Vo  Vbat . That sinusoid, as
well as everything else that makes a square wave a square wave, will have to fit
2
into the H(jω) ≈ ω n
ω2
high-frequency region of Equation 10.13. That means
we need to choose an ωn such that ωn  ω. For the DC amplitude to exceed
the AC “ripple” amplitude by a factor of 100, for instance, ω would have to
exceed 10ωn .

52